)]}'
{"cyborg/accelerator/drivers/fpga/intel/sysinfo.py":[{"author":{"_account_id":25738,"name":"Xinran WANG","email":"xin-ran.wang@intel.com","username":"Xinran"},"change_message_id":"d39ce79b1c2feb35d9959d3e9300fe886fc7e758","unresolved":false,"context_lines":[{"line_number":32,"context_line":""},{"line_number":33,"context_line":"PCI_DEVICES_PATH \u003d \"/sys/bus/pci/devices\""},{"line_number":34,"context_line":"PCI_DEVICES_PATH_PATTERN \u003d \"/sys/bus/pci/devices/*\""},{"line_number":35,"context_line":"# TODO(shaohe) The KNOW_FPGAS can be configable."},{"line_number":36,"context_line":"KNOW_FPGAS \u003d [(\"0x8086\", \"0x09c4\")]"},{"line_number":37,"context_line":""},{"line_number":38,"context_line":"INTEL_FPGA_DEV_PREFIX \u003d \"intel-fpga-dev\""}],"source_content_type":"text/x-python","patch_set":5,"id":"7faddb67_939a75b6","line":35,"range":{"start_line":35,"start_character":37,"end_line":35,"end_character":48},"updated":"2019-07-18 06:53:24.000000000","message":"s/configable/configurable","commit_id":"ebaf69cc847e3c45527f3ac35569ec1b0a82ea22"}]}