)]}'
{"/COMMIT_MSG":[{"author":{"_account_id":21672,"name":"Sundar Nadathur","email":"sundar.nadathur@intel.com","username":"nsundar"},"change_message_id":"e3125ba747db68080aea694e5f9d7921e5609e67","unresolved":false,"context_lines":[{"line_number":6,"context_line":""},{"line_number":7,"context_line":"fake driver bug fix"},{"line_number":8,"context_line":""},{"line_number":9,"context_line":"1. rebase fake driver on master branch."},{"line_number":10,"context_line":"2. add new attach_type \"TEST_PCI\" in Cyborg DB."},{"line_number":11,"context_line":"3. Change PGPU device to FPGA device in order to avoid add new device"},{"line_number":12,"context_line":"type in Cyborg DB."}],"source_content_type":"text/x-gerrit-commit-message","patch_set":1,"id":"7faddb67_81c1be82","line":9,"range":{"start_line":9,"start_character":3,"end_line":9,"end_character":38},"updated":"2019-08-20 15:24:20.000000000","message":"The fake driver was alreayd merged on the master branch [1]. Not sure what this means.\n\n[1] https://opendev.org/openstack/cyborg/commit/8c26ba469667c1c86d8bf0b31c55cf79f35151b1","commit_id":"7af4eca6577d8891549de5e42d1416c3b095dcdf"},{"author":{"_account_id":25738,"name":"Xinran WANG","email":"xin-ran.wang@intel.com","username":"Xinran"},"change_message_id":"447290cac7ef0faff2d18a1596d1f34d4d88e53f","unresolved":false,"context_lines":[{"line_number":6,"context_line":""},{"line_number":7,"context_line":"fake driver bug fix"},{"line_number":8,"context_line":""},{"line_number":9,"context_line":"1. rebase fake driver on master branch."},{"line_number":10,"context_line":"2. add new attach_type \"TEST_PCI\" in Cyborg DB."},{"line_number":11,"context_line":"3. Change PGPU device to FPGA device in order to avoid add new device"},{"line_number":12,"context_line":"type in Cyborg DB."}],"source_content_type":"text/x-gerrit-commit-message","patch_set":1,"id":"7faddb67_eb2ba57e","line":9,"range":{"start_line":9,"start_character":3,"end_line":9,"end_character":38},"in_reply_to":"7faddb67_81c1be82","updated":"2019-08-21 02:34:31.000000000","message":"the fake driver did not work with current master branch because new field \"stub\" added in driver device.","commit_id":"7af4eca6577d8891549de5e42d1416c3b095dcdf"}],"cyborg/accelerator/drivers/fake.py":[{"author":{"_account_id":21672,"name":"Sundar Nadathur","email":"sundar.nadathur@intel.com","username":"nsundar"},"change_message_id":"e6afc0eb92727d5ee904cdc3664179f5ef920208","unresolved":false,"context_lines":[{"line_number":53,"context_line":"        pci_dict \u003d {"},{"line_number":54,"context_line":"            \u0027slot\u0027: pci_addr,                    # PCI slot address"},{"line_number":55,"context_line":"            \u0027device\u0027: \u0027FakeDevice\u0027,              # Name of the device"},{"line_number":56,"context_line":"            \u0027vendor_id\u0027: \u0027fake\u0027,                 # ID of the vendor"},{"line_number":57,"context_line":"            \u0027class\u0027: \u0027Fake class\u0027,               # Name of the class"},{"line_number":58,"context_line":"            \u0027device_id\u0027: \u0027fake\u0027,                 # ID of the device"},{"line_number":59,"context_line":"            \u0027revision\u0027: \u002720\u0027                     # Revision number"}],"source_content_type":"text/x-python","patch_set":1,"id":"7faddb67_73c1f94d","line":56,"range":{"start_line":56,"start_character":25,"end_line":56,"end_character":31},"updated":"2019-08-20 16:10:01.000000000","message":"Better to make vendor_id and device_id as hex numbers like 0xABCD.","commit_id":"7af4eca6577d8891549de5e42d1416c3b095dcdf"},{"author":{"_account_id":25738,"name":"Xinran WANG","email":"xin-ran.wang@intel.com","username":"Xinran"},"change_message_id":"447290cac7ef0faff2d18a1596d1f34d4d88e53f","unresolved":false,"context_lines":[{"line_number":53,"context_line":"        pci_dict \u003d {"},{"line_number":54,"context_line":"            \u0027slot\u0027: pci_addr,                    # PCI slot address"},{"line_number":55,"context_line":"            \u0027device\u0027: \u0027FakeDevice\u0027,              # Name of the device"},{"line_number":56,"context_line":"            \u0027vendor_id\u0027: \u0027fake\u0027,                 # ID of the vendor"},{"line_number":57,"context_line":"            \u0027class\u0027: \u0027Fake class\u0027,               # Name of the class"},{"line_number":58,"context_line":"            \u0027device_id\u0027: \u0027fake\u0027,                 # ID of the device"},{"line_number":59,"context_line":"            \u0027revision\u0027: \u002720\u0027                     # Revision number"}],"source_content_type":"text/x-python","patch_set":1,"id":"7faddb67_ab212da0","line":56,"range":{"start_line":56,"start_character":25,"end_line":56,"end_character":31},"in_reply_to":"7faddb67_73c1f94d","updated":"2019-08-21 02:34:31.000000000","message":"Do you like 0xFAKE?","commit_id":"7af4eca6577d8891549de5e42d1416c3b095dcdf"},{"author":{"_account_id":21672,"name":"Sundar Nadathur","email":"sundar.nadathur@intel.com","username":"nsundar"},"change_message_id":"829048488204dd1d81fc9f130c4de5cb100d8bc1","unresolved":false,"context_lines":[{"line_number":53,"context_line":"        pci_dict \u003d {"},{"line_number":54,"context_line":"            \u0027slot\u0027: pci_addr,                    # PCI slot address"},{"line_number":55,"context_line":"            \u0027device\u0027: \u0027FakeDevice\u0027,              # Name of the device"},{"line_number":56,"context_line":"            \u0027vendor_id\u0027: \u0027fake\u0027,                 # ID of the vendor"},{"line_number":57,"context_line":"            \u0027class\u0027: \u0027Fake class\u0027,               # Name of the class"},{"line_number":58,"context_line":"            \u0027device_id\u0027: \u0027fake\u0027,                 # ID of the device"},{"line_number":59,"context_line":"            \u0027revision\u0027: \u002720\u0027                     # Revision number"}],"source_content_type":"text/x-python","patch_set":1,"id":"7faddb67_4b4bd929","line":56,"range":{"start_line":56,"start_character":25,"end_line":56,"end_character":31},"in_reply_to":"7faddb67_ab212da0","updated":"2019-08-21 02:52:47.000000000","message":"K is not a hex digit :). Could be FADE, DEAD, whatever.","commit_id":"7af4eca6577d8891549de5e42d1416c3b095dcdf"},{"author":{"_account_id":21672,"name":"Sundar Nadathur","email":"sundar.nadathur@intel.com","username":"nsundar"},"change_message_id":"6f42f3dc4ecd8c7729f8414be1a80f01716f9cae","unresolved":false,"context_lines":[{"line_number":56,"context_line":"            \u0027vendor_id\u0027: \u0027fake\u0027,                 # ID of the vendor"},{"line_number":57,"context_line":"            \u0027class\u0027: \u0027Fake class\u0027,               # Name of the class"},{"line_number":58,"context_line":"            \u0027device_id\u0027: \u0027fake\u0027,                 # ID of the device"},{"line_number":59,"context_line":"            \u0027revision\u0027: \u002720\u0027                     # Revision number"},{"line_number":60,"context_line":"        }"},{"line_number":61,"context_line":"        device \u003d driver_device.DriverDevice()"},{"line_number":62,"context_line":"        device.vendor \u003d pci_dict[\"vendor_id\"]"}],"source_content_type":"text/x-python","patch_set":1,"id":"7faddb67_fbc145e5","line":59,"range":{"start_line":59,"start_character":24,"end_line":59,"end_character":29},"updated":"2019-08-20 14:44:30.000000000","message":"What is the significance of the value \u002720\u0027?","commit_id":"7af4eca6577d8891549de5e42d1416c3b095dcdf"},{"author":{"_account_id":21672,"name":"Sundar Nadathur","email":"sundar.nadathur@intel.com","username":"nsundar"},"change_message_id":"829048488204dd1d81fc9f130c4de5cb100d8bc1","unresolved":false,"context_lines":[{"line_number":56,"context_line":"            \u0027vendor_id\u0027: \u0027fake\u0027,                 # ID of the vendor"},{"line_number":57,"context_line":"            \u0027class\u0027: \u0027Fake class\u0027,               # Name of the class"},{"line_number":58,"context_line":"            \u0027device_id\u0027: \u0027fake\u0027,                 # ID of the device"},{"line_number":59,"context_line":"            \u0027revision\u0027: \u002720\u0027                     # Revision number"},{"line_number":60,"context_line":"        }"},{"line_number":61,"context_line":"        device \u003d driver_device.DriverDevice()"},{"line_number":62,"context_line":"        device.vendor \u003d pci_dict[\"vendor_id\"]"}],"source_content_type":"text/x-python","patch_set":1,"id":"7faddb67_6b46d523","line":59,"range":{"start_line":59,"start_character":24,"end_line":59,"end_character":29},"in_reply_to":"7faddb67_cb4d8972","updated":"2019-08-21 02:52:47.000000000","message":"Ok, no objection.","commit_id":"7af4eca6577d8891549de5e42d1416c3b095dcdf"},{"author":{"_account_id":25738,"name":"Xinran WANG","email":"xin-ran.wang@intel.com","username":"Xinran"},"change_message_id":"447290cac7ef0faff2d18a1596d1f34d4d88e53f","unresolved":false,"context_lines":[{"line_number":56,"context_line":"            \u0027vendor_id\u0027: \u0027fake\u0027,                 # ID of the vendor"},{"line_number":57,"context_line":"            \u0027class\u0027: \u0027Fake class\u0027,               # Name of the class"},{"line_number":58,"context_line":"            \u0027device_id\u0027: \u0027fake\u0027,                 # ID of the device"},{"line_number":59,"context_line":"            \u0027revision\u0027: \u002720\u0027                     # Revision number"},{"line_number":60,"context_line":"        }"},{"line_number":61,"context_line":"        device \u003d driver_device.DriverDevice()"},{"line_number":62,"context_line":"        device.vendor \u003d pci_dict[\"vendor_id\"]"}],"source_content_type":"text/x-python","patch_set":1,"id":"7faddb67_cb4d8972","line":59,"range":{"start_line":59,"start_character":24,"end_line":59,"end_character":29},"in_reply_to":"7faddb67_fbc145e5","updated":"2019-08-21 02:34:31.000000000","message":"Not sure, it exists in previous fake driver, do we need to remove it. It seems there is nowhere use this value.","commit_id":"7af4eca6577d8891549de5e42d1416c3b095dcdf"},{"author":{"_account_id":21672,"name":"Sundar Nadathur","email":"sundar.nadathur@intel.com","username":"nsundar"},"change_message_id":"6f42f3dc4ecd8c7729f8414be1a80f01716f9cae","unresolved":false,"context_lines":[{"line_number":65,"context_line":"                          \u0027class\u0027: pci_dict.get(\u0027class\u0027, None)}"},{"line_number":66,"context_line":"        device.std_board_info \u003d jsonutils.dumps(std_board_info)"},{"line_number":67,"context_line":"        device.vendor_board_info \u003d \u0027fake_vendor_info\u0027"},{"line_number":68,"context_line":"        device.type \u003d orc.FPGA"},{"line_number":69,"context_line":"        device.stub \u003d False"},{"line_number":70,"context_line":"        device.controlpath_id \u003d self._generate_controlpath_id(pci_dict)"},{"line_number":71,"context_line":"        device.deployable_list \u003d self._generate_dep_list(pci_dict)"}],"source_content_type":"text/x-python","patch_set":1,"id":"7faddb67_9b9b7115","line":68,"range":{"start_line":68,"start_character":22,"end_line":68,"end_character":30},"updated":"2019-08-20 14:44:30.000000000","message":"The device type is not a resource class. This should be constants.DEVICE_FPGA.","commit_id":"7af4eca6577d8891549de5e42d1416c3b095dcdf"},{"author":{"_account_id":25738,"name":"Xinran WANG","email":"xin-ran.wang@intel.com","username":"Xinran"},"change_message_id":"447290cac7ef0faff2d18a1596d1f34d4d88e53f","unresolved":false,"context_lines":[{"line_number":65,"context_line":"                          \u0027class\u0027: pci_dict.get(\u0027class\u0027, None)}"},{"line_number":66,"context_line":"        device.std_board_info \u003d jsonutils.dumps(std_board_info)"},{"line_number":67,"context_line":"        device.vendor_board_info \u003d \u0027fake_vendor_info\u0027"},{"line_number":68,"context_line":"        device.type \u003d orc.FPGA"},{"line_number":69,"context_line":"        device.stub \u003d False"},{"line_number":70,"context_line":"        device.controlpath_id \u003d self._generate_controlpath_id(pci_dict)"},{"line_number":71,"context_line":"        device.deployable_list \u003d self._generate_dep_list(pci_dict)"}],"source_content_type":"text/x-python","patch_set":1,"id":"7faddb67_4b3c39c7","line":68,"range":{"start_line":68,"start_character":22,"end_line":68,"end_character":30},"in_reply_to":"7faddb67_9b9b7115","updated":"2019-08-21 02:34:31.000000000","message":"Will fix it.","commit_id":"7af4eca6577d8891549de5e42d1416c3b095dcdf"}],"cyborg/db/sqlalchemy/alembic/versions/b81b47f3c6b3_add_test_pci_attach_type.py":[{"author":{"_account_id":21672,"name":"Sundar Nadathur","email":"sundar.nadathur@intel.com","username":"nsundar"},"change_message_id":"829048488204dd1d81fc9f130c4de5cb100d8bc1","unresolved":false,"context_lines":[{"line_number":1,"context_line":"\"\"\"add_test_pci_attach_type"},{"line_number":2,"context_line":""},{"line_number":3,"context_line":"Revision ID: b81b47f3c6b3"},{"line_number":4,"context_line":"Revises: c1b5abada09c"}],"source_content_type":"text/x-python","patch_set":1,"id":"7faddb67_6bf495cf","line":1,"updated":"2019-08-21 02:52:47.000000000","message":"We don\u0027t need new migration script just for this.","commit_id":"7af4eca6577d8891549de5e42d1416c3b095dcdf"}],"cyborg/db/sqlalchemy/alembic/versions/c1b5abada09c_update_for_nova_integ.py":[{"author":{"_account_id":21672,"name":"Sundar Nadathur","email":"sundar.nadathur@intel.com","username":"nsundar"},"change_message_id":"698bc47e623c8924b3602f8f1cbc466c1e318b99","unresolved":false,"context_lines":[{"line_number":65,"context_line":"    op.alter_column("},{"line_number":66,"context_line":"        \u0027extended_accelerator_requests\u0027, \u0027state\u0027,"},{"line_number":67,"context_line":"        existing_type\u003dns, nullable\u003dFalse, default\u003dconstants.ARQ_INITIAL)"},{"line_number":68,"context_line":"    # update attach type fields"},{"line_number":69,"context_line":"    new_attach_type \u003d sa.Enum(constants.AH_TYPE_PCI,"},{"line_number":70,"context_line":"                              constants.AH_TYPE_MDEV,"},{"line_number":71,"context_line":"                              constants.AH_TYPE_TEST_PCI,"}],"source_content_type":"text/x-python","patch_set":2,"id":"7faddb67_d3a8d478","line":68,"updated":"2019-08-21 16:27:03.000000000","message":"Minor: Good to give a blank line between tables.","commit_id":"3747d4b75094314f6c38dfcc62acc5065dd3f263"}],"cyborg/objects/attach_handle.py":[{"author":{"_account_id":21672,"name":"Sundar Nadathur","email":"sundar.nadathur@intel.com","username":"nsundar"},"change_message_id":"e3125ba747db68080aea694e5f9d7921e5609e67","unresolved":false,"context_lines":[{"line_number":22,"context_line":""},{"line_number":23,"context_line":"LOG \u003d logging.getLogger(__name__)"},{"line_number":24,"context_line":""},{"line_number":25,"context_line":"ATTACH_TYPE \u003d [\"PCI\", \"MDEV\", \"TEST_PCI\"]"},{"line_number":26,"context_line":""},{"line_number":27,"context_line":""},{"line_number":28,"context_line":"@base.CyborgObjectRegistry.register"}],"source_content_type":"text/x-python","patch_set":1,"id":"7faddb67_81469e20","line":25,"updated":"2019-08-20 15:24:20.000000000","message":"The db schema [1] does not allow for this new type. I\u0027l add it in my patch.\n\n[1] https://opendev.org/openstack/cyborg/src/branch/master/cyborg/db/sqlalchemy/alembic/versions/ede4e3f1a232_new_db_schema.py#L19","commit_id":"7af4eca6577d8891549de5e42d1416c3b095dcdf"},{"author":{"_account_id":25738,"name":"Xinran WANG","email":"xin-ran.wang@intel.com","username":"Xinran"},"change_message_id":"40f8f3c52c876b325723dc05fc48b940f226bd4e","unresolved":false,"context_lines":[{"line_number":22,"context_line":""},{"line_number":23,"context_line":"LOG \u003d logging.getLogger(__name__)"},{"line_number":24,"context_line":""},{"line_number":25,"context_line":"ATTACH_TYPE \u003d [\"PCI\", \"MDEV\", \"TEST_PCI\"]"},{"line_number":26,"context_line":""},{"line_number":27,"context_line":""},{"line_number":28,"context_line":"@base.CyborgObjectRegistry.register"}],"source_content_type":"text/x-python","patch_set":1,"id":"7faddb67_0bb5e131","line":25,"in_reply_to":"7faddb67_4b13d95c","updated":"2019-08-21 02:59:00.000000000","message":"User will not need to drop all DB and rebuild it, they just need to run upgrade commands in this way.","commit_id":"7af4eca6577d8891549de5e42d1416c3b095dcdf"},{"author":{"_account_id":21672,"name":"Sundar Nadathur","email":"sundar.nadathur@intel.com","username":"nsundar"},"change_message_id":"829048488204dd1d81fc9f130c4de5cb100d8bc1","unresolved":false,"context_lines":[{"line_number":22,"context_line":""},{"line_number":23,"context_line":"LOG \u003d logging.getLogger(__name__)"},{"line_number":24,"context_line":""},{"line_number":25,"context_line":"ATTACH_TYPE \u003d [\"PCI\", \"MDEV\", \"TEST_PCI\"]"},{"line_number":26,"context_line":""},{"line_number":27,"context_line":""},{"line_number":28,"context_line":"@base.CyborgObjectRegistry.register"}],"source_content_type":"text/x-python","patch_set":1,"id":"7faddb67_cb0589c3","line":25,"in_reply_to":"7faddb67_4b13d95c","updated":"2019-08-21 02:52:47.000000000","message":"We need to have a new migration script per release. Having too many migration scripts will slow down install/upgrade.","commit_id":"7af4eca6577d8891549de5e42d1416c3b095dcdf"},{"author":{"_account_id":25738,"name":"Xinran WANG","email":"xin-ran.wang@intel.com","username":"Xinran"},"change_message_id":"447290cac7ef0faff2d18a1596d1f34d4d88e53f","unresolved":false,"context_lines":[{"line_number":22,"context_line":""},{"line_number":23,"context_line":"LOG \u003d logging.getLogger(__name__)"},{"line_number":24,"context_line":""},{"line_number":25,"context_line":"ATTACH_TYPE \u003d [\"PCI\", \"MDEV\", \"TEST_PCI\"]"},{"line_number":26,"context_line":""},{"line_number":27,"context_line":""},{"line_number":28,"context_line":"@base.CyborgObjectRegistry.register"}],"source_content_type":"text/x-python","patch_set":1,"id":"7faddb67_4b13d95c","line":25,"in_reply_to":"7faddb67_81469e20","updated":"2019-08-21 02:34:31.000000000","message":"I have a DB migration script in this patch: https://review.opendev.org/#/c/677436/1/cyborg/db/sqlalchemy/alembic/versions/b81b47f3c6b3_add_test_pci_attach_type.py\n\nIt\u0027s better to have DB migration script at each DB modification instead of code in new schemas script.","commit_id":"7af4eca6577d8891549de5e42d1416c3b095dcdf"},{"author":{"_account_id":25738,"name":"Xinran WANG","email":"xin-ran.wang@intel.com","username":"Xinran"},"change_message_id":"40f8f3c52c876b325723dc05fc48b940f226bd4e","unresolved":false,"context_lines":[{"line_number":22,"context_line":""},{"line_number":23,"context_line":"LOG \u003d logging.getLogger(__name__)"},{"line_number":24,"context_line":""},{"line_number":25,"context_line":"ATTACH_TYPE \u003d [\"PCI\", \"MDEV\", \"TEST_PCI\"]"},{"line_number":26,"context_line":""},{"line_number":27,"context_line":""},{"line_number":28,"context_line":"@base.CyborgObjectRegistry.register"}],"source_content_type":"text/x-python","patch_set":1,"id":"7faddb67_0bc64169","line":25,"in_reply_to":"7faddb67_cb0589c3","updated":"2019-08-21 02:59:00.000000000","message":"Please see https://github.com/openstack/nova/tree/master/nova/db/sqlalchemy/migrate_repo/versions \nI don\u0027t think there is only one new migration script per release.  Even if in Cyborg, there is https://github.com/openstack/cyborg/blob/master/cyborg/db/sqlalchemy/alembic/versions/589ff20545b7_add_aichip_type.py","commit_id":"7af4eca6577d8891549de5e42d1416c3b095dcdf"}]}