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{"doc/source/configuration/index.rst":[{"author":{"_account_id":14070,"name":"Eric Fried","email":"openstack@fried.cc","username":"efried"},"change_message_id":"4dad204fb53d97f4b0c0719b2a402cbe38a16225","unresolved":false,"context_lines":[{"line_number":3,"context_line":"\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d"},{"line_number":4,"context_line":""},{"line_number":5,"context_line":".. toctree::"},{"line_number":6,"context_line":"   :maxdepth: 2"},{"line_number":7,"context_line":""},{"line_number":8,"context_line":"   config-options"},{"line_number":9,"context_line":"   sample_config"}],"source_content_type":"text/x-rst","patch_set":15,"id":"3fa7e38b_6ae0e1fb","line":6,"range":{"start_line":6,"start_character":0,"end_line":6,"end_character":15},"updated":"2019-10-02 12:25:31.000000000","message":"I think you should leave this at 1. Using 2 blows out config-options into its respective sections, and that\u0027s overkill IMO.","commit_id":"78cdb4600531fe7c5a0745f0ffec8566e6db2121"}],"doc/source/index.rst":[{"author":{"_account_id":21672,"name":"Sundar Nadathur","email":"sundar.nadathur@intel.com","username":"nsundar"},"change_message_id":"af3d682c18503e212c4401127afc769d597f0221","unresolved":false,"context_lines":[{"line_number":17,"context_line":"Documentation for Operators"},{"line_number":18,"context_line":"----------------------------"},{"line_number":19,"context_line":""},{"line_number":20,"context_line":"The documentation in this section is aimed at Cloud"},{"line_number":21,"context_line":"Operators needing to install or configure Cyborg."},{"line_number":22,"context_line":""},{"line_number":23,"context_line":"Installation"}],"source_content_type":"text/x-rst","patch_set":6,"id":"3fa7e38b_f0265068","line":20,"range":{"start_line":20,"start_character":46,"end_line":20,"end_character":47},"updated":"2019-09-26 17:10:16.000000000","message":"\u0027cloud operators\u0027 -- why is it capitalized?","commit_id":"6d9f7871386d475b65d4f0ae034c326810737233"},{"author":{"_account_id":14070,"name":"Eric Fried","email":"openstack@fried.cc","username":"efried"},"change_message_id":"05751e4bc42e4c38dff9ae92ab363d20232646d8","unresolved":false,"context_lines":[{"line_number":44,"context_line":".. toctree::"},{"line_number":45,"context_line":"   :maxdepth: 1"},{"line_number":46,"context_line":""},{"line_number":47,"context_line":"   configuration/index"},{"line_number":48,"context_line":"   configuration/config-options"},{"line_number":49,"context_line":"   configuration/sample_config"},{"line_number":50,"context_line":"   configuration/sample_policy"}],"source_content_type":"text/x-rst","patch_set":14,"id":"3fa7e38b_bff14098","line":47,"range":{"start_line":47,"start_character":0,"end_line":47,"end_character":22},"updated":"2019-10-01 21:25:42.000000000","message":"Consider omitting this, or using maxdepth of 2 and removing the next three links.","commit_id":"d73b35f01f57ee66f743278d74459c66b0fc34b3"},{"author":{"_account_id":20754,"name":"Donny Davis","email":"donny@fortnebula.com","username":"donnydavis"},"change_message_id":"a04dbb11a1850cf3848f0b2901d94bbd5f941ac2","unresolved":false,"context_lines":[{"line_number":44,"context_line":".. toctree::"},{"line_number":45,"context_line":"   :maxdepth: 1"},{"line_number":46,"context_line":""},{"line_number":47,"context_line":"   configuration/index"},{"line_number":48,"context_line":"   configuration/config-options"},{"line_number":49,"context_line":"   configuration/sample_config"},{"line_number":50,"context_line":"   configuration/sample_policy"}],"source_content_type":"text/x-rst","patch_set":14,"id":"3fa7e38b_aa87b961","line":47,"range":{"start_line":47,"start_character":0,"end_line":47,"end_character":22},"in_reply_to":"3fa7e38b_bff14098","updated":"2019-10-02 12:04:41.000000000","message":"I see what you are saying and it makes sense to me.","commit_id":"d73b35f01f57ee66f743278d74459c66b0fc34b3"},{"author":{"_account_id":14070,"name":"Eric Fried","email":"openstack@fried.cc","username":"efried"},"change_message_id":"4dad204fb53d97f4b0c0719b2a402cbe38a16225","unresolved":false,"context_lines":[{"line_number":42,"context_line":"~~~~~~~~~~~~~~~~~~~~~~~"},{"line_number":43,"context_line":""},{"line_number":44,"context_line":".. toctree::"},{"line_number":45,"context_line":"   :maxdepth: 2"},{"line_number":46,"context_line":""},{"line_number":47,"context_line":"   configuration/index"},{"line_number":48,"context_line":"   configuration/config-options"}],"source_content_type":"text/x-rst","patch_set":15,"id":"3fa7e38b_aad6d926","line":45,"updated":"2019-10-02 12:25:31.000000000","message":"sorry, what I meant was that, regardless of maxdepth,\n\n configuration/index\n\n*contains*\n\n configuration/config-options\n configuration/sample_config\n configuration/sample_policy\n\nso you don\u0027t need both.\n\nNow with maxdepth of 2, this is even more obvious [1] because the latter links are inlined twice.\n\nI tried leaving maxdepth at 2 and removing L48-50 and IMO that turns out the prettiest, like:\n\n Configuration Reference\n   * Configuration Guide\n     . Configuration options for the Acceleration service\n     . Cyborg Configuration Sample\n     . Cyborg Sample Policy\n   * Cyborg Support Matrix\n     . FPGA Driver Support\n     . GPU Driver Support\n     . Driver Removal History\n     . References\n\n[1] https://d911d826a9adef891545-1b788d41ec0a41acec6291a07b7875be.ssl.cf5.rackcdn.com/677715/15/check/openstack-tox-docs/3084c52/docs/#configuration-reference","commit_id":"78cdb4600531fe7c5a0745f0ffec8566e6db2121"}],"doc/source/install/common.rst":[{"author":{"_account_id":21672,"name":"Sundar Nadathur","email":"sundar.nadathur@intel.com","username":"nsundar"},"change_message_id":"af3d682c18503e212c4401127afc769d597f0221","unresolved":false,"context_lines":[{"line_number":2,"context_line":"---------------------"},{"line_number":3,"context_line":""},{"line_number":4,"context_line":"Regardless of the package or code source you must do the following"},{"line_number":5,"context_line":"to properly setup the Accelerator Life Cycle Management service."},{"line_number":6,"context_line":"A database, service credentials, and API endpoints must be created."},{"line_number":7,"context_line":""},{"line_number":8,"context_line":"#. To create the database, complete these steps:"}],"source_content_type":"text/x-rst","patch_set":6,"id":"3fa7e38b_80b8f5e4","line":5,"range":{"start_line":5,"start_character":22,"end_line":5,"end_character":55},"updated":"2019-09-26 17:10:16.000000000","message":"Why not just call it Cyborg throughout? Different names/phrases for the service may confuse readers.","commit_id":"6d9f7871386d475b65d4f0ae034c326810737233"}],"doc/source/install/installation.rst":[{"author":{"_account_id":21672,"name":"Sundar Nadathur","email":"sundar.nadathur@intel.com","username":"nsundar"},"change_message_id":"af3d682c18503e212c4401127afc769d597f0221","unresolved":false,"context_lines":[{"line_number":1,"context_line":"\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d"},{"line_number":2,"context_line":"Installation with pip"},{"line_number":3,"context_line":"\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d"},{"line_number":4,"context_line":""},{"line_number":5,"context_line":"At the command line::"}],"source_content_type":"text/x-rst","patch_set":6,"id":"3fa7e38b_90c35c57","line":2,"updated":"2019-09-26 17:10:16.000000000","message":"May be we should change this file name to \u0027installation_with_pip\u0027, the other being installation from git.","commit_id":"6d9f7871386d475b65d4f0ae034c326810737233"}],"doc/source/reference/support-matrix-fpga.ini":[{"author":{"_account_id":20754,"name":"Donny Davis","email":"donny@fortnebula.com","username":"donnydavis"},"change_message_id":"2a945ba0b538112845a5d3898bcef92ad21fc7f3","unresolved":false,"context_lines":[{"line_number":30,"context_line":"status\u003doptional"},{"line_number":31,"context_line":"notes\u003dA vendor driver is considered supported if the vendor is"},{"line_number":32,"context_line":"  running a third party CI that regularly runs and reports"},{"line_number":33,"context_line":"  accurate results."},{"line_number":34,"context_line":"driver.fpga.fake\u003dpartial"},{"line_number":35,"context_line":"driver.fpga.intel.opae\u003dpartial"},{"line_number":36,"context_line":""}],"source_content_type":"text/x-properties","patch_set":5,"id":"7faddb67_af27d9c7","line":33,"range":{"start_line":33,"start_character":18,"end_line":33,"end_character":19},"updated":"2019-08-22 12:27:12.000000000","message":"We can get rid of any requirements statements, and just talk about why it is a particular status","commit_id":"28ffbeae5c05de843e7b38abc6059b8740de1e80"},{"author":{"_account_id":14131,"name":"shaohef","email":"shaohe.feng@intel.com","username":"shaohefeng"},"change_message_id":"d36be3a1516a50d2ca9e443191f52199e34520e4","unresolved":false,"context_lines":[{"line_number":44,"context_line":"[operation.delete_accelerator]"},{"line_number":45,"context_line":"title\u003dDelete Accelerator"},{"line_number":46,"context_line":"status\u003dmandatory"},{"line_number":47,"context_line":"notes\u003dSupports the ability to create an accelerator."},{"line_number":48,"context_line":"driver.fpga.fake\u003dcomplete"},{"line_number":49,"context_line":"driver.fpga.intel.opae\u003dcomplete"},{"line_number":50,"context_line":""}],"source_content_type":"text/x-properties","patch_set":16,"id":"3fa7e38b_e0b47084","line":47,"range":{"start_line":47,"start_character":30,"end_line":47,"end_character":36},"updated":"2019-10-10 12:52:03.000000000","message":"delete","commit_id":"86f10e29f7f15f69936ac40df5d19d2483c5bfdb"},{"author":{"_account_id":14131,"name":"shaohef","email":"shaohe.feng@intel.com","username":"shaohefeng"},"change_message_id":"d36be3a1516a50d2ca9e443191f52199e34520e4","unresolved":false,"context_lines":[{"line_number":58,"context_line":"[operation.delete_bitstream]"},{"line_number":59,"context_line":"title\u003dDelete Bitstream"},{"line_number":60,"context_line":"status\u003doptional"},{"line_number":61,"context_line":"notes\u003dSupports the ability to load a bitstream to an FPGA."},{"line_number":62,"context_line":"driver.fpga.fake\u003dmissing"},{"line_number":63,"context_line":"driver.fpga.intel.opae\u003dmissing"},{"line_number":64,"context_line":""}],"source_content_type":"text/x-properties","patch_set":16,"id":"3fa7e38b_c0aff427","line":61,"range":{"start_line":61,"start_character":30,"end_line":61,"end_character":34},"updated":"2019-10-10 12:52:03.000000000","message":"erasure...from an FPGA?","commit_id":"86f10e29f7f15f69936ac40df5d19d2483c5bfdb"}],"doc/source/reference/support-matrix-gpu.ini":[{"author":{"_account_id":30759,"name":"Shogo Saito","email":"shogo.saito.ac@hco.ntt.co.jp","username":"s.shogo"},"change_message_id":"5eac1d051b29235c368b985061bbd7abe7b28cdd","unresolved":false,"context_lines":[{"line_number":51,"context_line":"[operation.update_firmware]"},{"line_number":52,"context_line":"title\u003dUpdate GPU Firmware"},{"line_number":53,"context_line":"status\u003doptional"},{"line_number":54,"context_line":"notes\u003dSupports the ability to update firmware for FPGA."},{"line_number":55,"context_line":"driver.gpu.fake\u003dmissing"},{"line_number":56,"context_line":"driver.gpu.nvidia\u003dmissing"}],"source_content_type":"text/x-properties","patch_set":13,"id":"3fa7e38b_bbc094e2","line":54,"range":{"start_line":54,"start_character":50,"end_line":54,"end_character":54},"updated":"2019-09-30 09:39:16.000000000","message":"Nit: Is \"GPU\"?","commit_id":"8a49cd245724209d07eb88c21f8107c1b4ccb703"},{"author":{"_account_id":21672,"name":"Sundar Nadathur","email":"sundar.nadathur@intel.com","username":"nsundar"},"change_message_id":"b42e8641c910490a53105135eb4eb7afb95fbddb","unresolved":false,"context_lines":[{"line_number":31,"context_line":"notes\u003dA vendor driver is considered supported if the vendor is"},{"line_number":32,"context_line":"  running a third party CI that regularly runs and reports"},{"line_number":33,"context_line":"  accurate results."},{"line_number":34,"context_line":"driver.gpu.fake\u003dmissing"},{"line_number":35,"context_line":"driver.gpu.nvidia\u003dcomplete"},{"line_number":36,"context_line":""},{"line_number":37,"context_line":"[operation.create_accelerator]"}],"source_content_type":"text/x-properties","patch_set":16,"id":"3fa7e38b_c826a8bb","line":34,"updated":"2019-10-03 15:02:57.000000000","message":"I don\u0027t think this is true.","commit_id":"86f10e29f7f15f69936ac40df5d19d2483c5bfdb"},{"author":{"_account_id":20754,"name":"Donny Davis","email":"donny@fortnebula.com","username":"donnydavis"},"change_message_id":"9e467f22576ebf58d82eb7670be5efe2d7c77242","unresolved":false,"context_lines":[{"line_number":31,"context_line":"notes\u003dA vendor driver is considered supported if the vendor is"},{"line_number":32,"context_line":"  running a third party CI that regularly runs and reports"},{"line_number":33,"context_line":"  accurate results."},{"line_number":34,"context_line":"driver.gpu.fake\u003dmissing"},{"line_number":35,"context_line":"driver.gpu.nvidia\u003dcomplete"},{"line_number":36,"context_line":""},{"line_number":37,"context_line":"[operation.create_accelerator]"}],"source_content_type":"text/x-properties","patch_set":16,"id":"3fa7e38b_28e09c96","line":34,"in_reply_to":"3fa7e38b_c826a8bb","updated":"2019-10-03 15:07:20.000000000","message":"I don\u0027t disagree - however\nThe GPU content here is just boilerplate stuff to get the ball rolling. We need to get with those who are covering GPU for specifics of what needs to be in here.","commit_id":"86f10e29f7f15f69936ac40df5d19d2483c5bfdb"},{"author":{"_account_id":14131,"name":"shaohef","email":"shaohe.feng@intel.com","username":"shaohefeng"},"change_message_id":"d36be3a1516a50d2ca9e443191f52199e34520e4","unresolved":false,"context_lines":[{"line_number":44,"context_line":"[operation.delete_accelerator]"},{"line_number":45,"context_line":"title\u003dDelete Accelerator"},{"line_number":46,"context_line":"status\u003dmandatory"},{"line_number":47,"context_line":"notes\u003dCyborg supports the ability to create an accelerator."},{"line_number":48,"context_line":"driver.gpu.fake\u003dmissing"},{"line_number":49,"context_line":"driver.gpu.nvidia\u003dcomplete"},{"line_number":50,"context_line":""}],"source_content_type":"text/x-properties","patch_set":16,"id":"3fa7e38b_a08998ca","line":47,"range":{"start_line":47,"start_character":37,"end_line":47,"end_character":43},"updated":"2019-10-10 12:52:03.000000000","message":"delete","commit_id":"86f10e29f7f15f69936ac40df5d19d2483c5bfdb"}],"doc/source/reference/support-matrix.ini":[{"author":{"_account_id":20754,"name":"Donny Davis","email":"donny@fortnebula.com","username":"donnydavis"},"change_message_id":"87cbf6455ee0c66368e69fffd87f16a0ff688c42","unresolved":false,"context_lines":[{"line_number":13,"context_line":"# under the License."},{"line_number":14,"context_line":""},{"line_number":15,"context_line":"#####################################################################"},{"line_number":16,"context_line":"# Drivers:"},{"line_number":17,"context_line":""},{"line_number":18,"context_line":"[driver.fake]"},{"line_number":19,"context_line":"title\u003dCyborg Fake Driver"}],"source_content_type":"text/x-properties","patch_set":2,"id":"7faddb67_a27947fc","line":16,"updated":"2019-08-21 12:42:43.000000000","message":"The drivers that are listed in here are just to get something started. We will likely need some discussion on what to call the drivers in here and how will organize the matrix. This is just to get something to work from","commit_id":"6eaa3134933cb8d156fdbfec29ec0ca8c574b1d7"},{"author":{"_account_id":21672,"name":"Sundar Nadathur","email":"sundar.nadathur@intel.com","username":"nsundar"},"change_message_id":"b7fe746e8c8563b32709d47409efc9c85b7796c4","unresolved":false,"context_lines":[{"line_number":19,"context_line":"title\u003dCyborg Fake Driver"},{"line_number":20,"context_line":""},{"line_number":21,"context_line":"[driver.fpga]"},{"line_number":22,"context_line":"title\u003dCyborg FPGA Driver"},{"line_number":23,"context_line":""},{"line_number":24,"context_line":"[driver.gpu]"},{"line_number":25,"context_line":"title\u003dCyborg GPU Driver"}],"source_content_type":"text/x-properties","patch_set":3,"id":"7faddb67_6b4d5c70","line":22,"updated":"2019-08-22 05:45:59.000000000","message":"driver.fpga.intel \ntitle \u003d Intel FPGA driver based on OPAE","commit_id":"a39edf4097145733162f4a7121d5a25cf04ac695"},{"author":{"_account_id":21672,"name":"Sundar Nadathur","email":"sundar.nadathur@intel.com","username":"nsundar"},"change_message_id":"b7fe746e8c8563b32709d47409efc9c85b7796c4","unresolved":false,"context_lines":[{"line_number":30,"context_line":"title\u003dSupported Vendor Driver"},{"line_number":31,"context_line":"status\u003doptional"},{"line_number":32,"context_line":"notes\u003dA vendor driver is considered supported if the vendor is"},{"line_number":33,"context_line":"  running a third party CI that regularly runs and reports"},{"line_number":34,"context_line":"  accurate results. If a vendor doesn\u0027t meet this requirement"},{"line_number":35,"context_line":"  the driver is marked unsupported and is removed if the problem"},{"line_number":36,"context_line":"  isn\u0027t resolved before the end of the subsequent release."}],"source_content_type":"text/x-properties","patch_set":3,"id":"7faddb67_8b79b893","line":33,"range":{"start_line":33,"start_character":12,"end_line":33,"end_character":46},"updated":"2019-08-22 05:45:59.000000000","message":"Many Cyybrog drivers proposed for Train do not meet this requirement.","commit_id":"a39edf4097145733162f4a7121d5a25cf04ac695"}],"doc/source/reference/support-matrix.rst":[{"author":{"_account_id":20754,"name":"Donny Davis","email":"donny@fortnebula.com","username":"donnydavis"},"change_message_id":"b96ce2d7d875bacf12640e49c588d4cadc87610a","unresolved":false,"context_lines":[{"line_number":14,"context_line":"There are a number of functions that are required to be accepted as"},{"line_number":15,"context_line":"a Cyborg driver.  Rather than list all the required functionality in the"},{"line_number":16,"context_line":"matrix we include the list of required functions here for reference."},{"line_number":17,"context_line":""},{"line_number":18,"context_line":"* Create accelerator"},{"line_number":19,"context_line":"* Delete accelerator"},{"line_number":20,"context_line":""}],"source_content_type":"text/x-rst","patch_set":2,"id":"7faddb67_825beb83","line":17,"updated":"2019-08-21 12:43:44.000000000","message":"This section will need to have the required functions of the matrix. I added two, but we need to have some discussion on what belongs here and what doesn\u0027t","commit_id":"6eaa3134933cb8d156fdbfec29ec0ca8c574b1d7"},{"author":{"_account_id":20754,"name":"Donny Davis","email":"donny@fortnebula.com","username":"donnydavis"},"change_message_id":"2a945ba0b538112845a5d3898bcef92ad21fc7f3","unresolved":false,"context_lines":[{"line_number":35,"context_line":""},{"line_number":36,"context_line":"The following table of drivers lists support status for FPGA accelerators"},{"line_number":37,"context_line":""},{"line_number":38,"context_line":".. support_matrix:: support-matrix-fpga.ini"},{"line_number":39,"context_line":""},{"line_number":40,"context_line":"GPU Driver Support"},{"line_number":41,"context_line":"~~~~~~~~~~~~~~~~~~~"}],"source_content_type":"text/x-rst","patch_set":5,"id":"7faddb67_0f370d01","line":38,"range":{"start_line":38,"start_character":0,"end_line":38,"end_character":43},"updated":"2019-08-22 12:27:12.000000000","message":"So I thought it may be better to break them down into groupings of major type. FGPA GPU (NETWORK down the road), etc","commit_id":"28ffbeae5c05de843e7b38abc6059b8740de1e80"}]}