)]}'
{"cyborg/accelerator/drivers/fpga/intel/sysinfo.py":[{"author":{"_account_id":21672,"name":"Sundar Nadathur","email":"sundar.nadathur@intel.com","username":"nsundar"},"change_message_id":"36a33c297a0574ad084f5e80f5be173c64c66fb7","unresolved":false,"context_lines":[{"line_number":183,"context_line":""},{"line_number":184,"context_line":"def get_traits(device_name, product_id, vf\u003dTrue):"},{"line_number":185,"context_line":"    \"\"\"Generate traits for devices."},{"line_number":186,"context_line":"    : param devices_name: name of PF/VF, for example, \"intel-fpga-dev.0\"."},{"line_number":187,"context_line":"    : param product_id: product id of PF/VF, for example, \"0x09c4\"."},{"line_number":188,"context_line":"    : param vf: True if device_name is a VF, otherwise False."},{"line_number":189,"context_line":"    \"\"\""}],"source_content_type":"text/x-python","patch_set":1,"id":"5faad753_a04a5524","line":186,"range":{"start_line":186,"start_character":12,"end_line":186,"end_character":39},"updated":"2019-09-09 18:12:57.000000000","message":"Throughout the code, I see this mixup of PFs, VFs and devices. We can say, at least for now, that a PF corresponds to a device. However, a VF is an attach handle that is associated with a deployable, not a device.\n\nMore below.","commit_id":"f989dba1552b5609e21286d1e42a59639daf540d"},{"author":{"_account_id":25738,"name":"Xinran WANG","email":"xin-ran.wang@intel.com","username":"Xinran"},"change_message_id":"301e1b3e2047e8ebb0a23b457bfd05b32b697f08","unresolved":false,"context_lines":[{"line_number":183,"context_line":""},{"line_number":184,"context_line":"def get_traits(device_name, product_id, vf\u003dTrue):"},{"line_number":185,"context_line":"    \"\"\"Generate traits for devices."},{"line_number":186,"context_line":"    : param devices_name: name of PF/VF, for example, \"intel-fpga-dev.0\"."},{"line_number":187,"context_line":"    : param product_id: product id of PF/VF, for example, \"0x09c4\"."},{"line_number":188,"context_line":"    : param vf: True if device_name is a VF, otherwise False."},{"line_number":189,"context_line":"    \"\"\""}],"source_content_type":"text/x-python","patch_set":1,"id":"5faad753_45ab6b1c","line":186,"range":{"start_line":186,"start_character":12,"end_line":186,"end_character":39},"in_reply_to":"5faad753_a04a5524","updated":"2019-09-10 02:14:35.000000000","message":"it is not a mixup, the \"device_name\" here is not same as \"device\" definition in cyborg DB. It is a definition in driver level, from driver\u0027s point of view, a device could be PF or VF, e.g. \"intel-fpga-dev.*\" . Besides there is a parameter vf indicating whether the device is a VF or not. \nIf this confused you, what kind of name you think is better? I am willing to change.","commit_id":"f989dba1552b5609e21286d1e42a59639daf540d"},{"author":{"_account_id":21672,"name":"Sundar Nadathur","email":"sundar.nadathur@intel.com","username":"nsundar"},"change_message_id":"36a33c297a0574ad084f5e80f5be173c64c66fb7","unresolved":false,"context_lines":[{"line_number":187,"context_line":"    : param product_id: product id of PF/VF, for example, \"0x09c4\"."},{"line_number":188,"context_line":"    : param vf: True if device_name is a VF, otherwise False."},{"line_number":189,"context_line":"    \"\"\""},{"line_number":190,"context_line":"    # \"region_id\" not support at present, \"CUSTOM_FPGA_REGION_INTEL_UUID\""},{"line_number":191,"context_line":"    # \"CUSTOM_PROGRAMMABLE\" not support at present"},{"line_number":192,"context_line":"    traits \u003d []"},{"line_number":193,"context_line":"    if not vf:"}],"source_content_type":"text/x-python","patch_set":1,"id":"5faad753_9d8f89cb","line":190,"updated":"2019-09-09 18:12:57.000000000","message":"Why is it not supported?","commit_id":"f989dba1552b5609e21286d1e42a59639daf540d"},{"author":{"_account_id":25738,"name":"Xinran WANG","email":"xin-ran.wang@intel.com","username":"Xinran"},"change_message_id":"301e1b3e2047e8ebb0a23b457bfd05b32b697f08","unresolved":false,"context_lines":[{"line_number":187,"context_line":"    : param product_id: product id of PF/VF, for example, \"0x09c4\"."},{"line_number":188,"context_line":"    : param vf: True if device_name is a VF, otherwise False."},{"line_number":189,"context_line":"    \"\"\""},{"line_number":190,"context_line":"    # \"region_id\" not support at present, \"CUSTOM_FPGA_REGION_INTEL_UUID\""},{"line_number":191,"context_line":"    # \"CUSTOM_PROGRAMMABLE\" not support at present"},{"line_number":192,"context_line":"    traits \u003d []"},{"line_number":193,"context_line":"    if not vf:"}],"source_content_type":"text/x-python","patch_set":1,"id":"5faad753_65a8e71e","line":190,"in_reply_to":"5faad753_9d8f89cb","updated":"2019-09-10 02:14:35.000000000","message":"Done","commit_id":"f989dba1552b5609e21286d1e42a59639daf540d"},{"author":{"_account_id":21672,"name":"Sundar Nadathur","email":"sundar.nadathur@intel.com","username":"nsundar"},"change_message_id":"36a33c297a0574ad084f5e80f5be173c64c66fb7","unresolved":false,"context_lines":[{"line_number":196,"context_line":"    for i in get_afu_ids(device_name):"},{"line_number":197,"context_line":"        l \u003d \"CUSTOM_FPGA_FUNCTION_ID_INTEL_\" + i.upper()"},{"line_number":198,"context_line":"        traits.append(l)"},{"line_number":199,"context_line":"    for i in get_region_ids(device_name):"},{"line_number":200,"context_line":"        l \u003d \"CUSTOM_FPGA_REGION_INTEL_\" + i.upper()"},{"line_number":201,"context_line":"        traits.append(l)"},{"line_number":202,"context_line":"    return {\"traits\": traits}"}],"source_content_type":"text/x-python","patch_set":1,"id":"5faad753_20e98519","line":199,"range":{"start_line":199,"start_character":13,"end_line":199,"end_character":27},"updated":"2019-09-09 18:12:57.000000000","message":"This still does not get the region IDs in OPAE 1.0.*. Try this diff:\ndiff --git a/cyborg/accelerator/drivers/fpga/intel/sysinfo.py b/cyborg/accelerator/drivers/fpga/intel/sysinfo.py\nindex 6afcfab..16d0337 100644\n--- a/cyborg/accelerator/drivers/fpga/intel/sysinfo.py\n+++ b/cyborg/accelerator/drivers/fpga/intel/sysinfo.py\n@@ -175,8 +175,8 @@ def get_region_ids(device_name):\n         read_line,\n         glob.glob(\n             os.path.join(\n-                SYS_FPGA, device_name, \"device/physfn/fpga\",\n-                \"intel-fpga-dev.*\", \"intel-fpga-fme.*\", \"pr/interface_id\")\n+                SYS_FPGA, device_name,\n+                \"intel-fpga-fme.*\", \"pr/interface_id\")\n         )\n     )\n\n\nGiven a PF, we can get a region ID from:\n    /sys/class/fpga/intel-fpga-dev.0/intel-fpga-fme.0/pr/interface_id\n\nSince the pr/interface_id (region id) is under FME, which is part of the blue bits, it is best read from PF.","commit_id":"f989dba1552b5609e21286d1e42a59639daf540d"},{"author":{"_account_id":25738,"name":"Xinran WANG","email":"xin-ran.wang@intel.com","username":"Xinran"},"change_message_id":"301e1b3e2047e8ebb0a23b457bfd05b32b697f08","unresolved":false,"context_lines":[{"line_number":196,"context_line":"    for i in get_afu_ids(device_name):"},{"line_number":197,"context_line":"        l \u003d \"CUSTOM_FPGA_FUNCTION_ID_INTEL_\" + i.upper()"},{"line_number":198,"context_line":"        traits.append(l)"},{"line_number":199,"context_line":"    for i in get_region_ids(device_name):"},{"line_number":200,"context_line":"        l \u003d \"CUSTOM_FPGA_REGION_INTEL_\" + i.upper()"},{"line_number":201,"context_line":"        traits.append(l)"},{"line_number":202,"context_line":"    return {\"traits\": traits}"}],"source_content_type":"text/x-python","patch_set":1,"id":"5faad753_0563331c","line":199,"range":{"start_line":199,"start_character":13,"end_line":199,"end_character":27},"in_reply_to":"5faad753_20e98519","updated":"2019-09-10 02:14:35.000000000","message":"Done","commit_id":"f989dba1552b5609e21286d1e42a59639daf540d"}]}