)]}'
{"id":"openstack%2Fcyborg~995079","triplet_id":"openstack%2Fcyborg~master~I62cd6f519b95b484b082d75c1767be8fb127f819","project":"openstack/cyborg","branch":"master","topic":"vf_personality","attention_set":{"11604":{"account":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"last_update":"2026-06-28 09:49:46.000000000","reason":"\u003cGERRIT_ACCOUNT_12393\u003e replied on the change","reason_account":{"_account_id":12393,"name":"chandan kumar","display_name":"Chandan Kumar","email":"chkumar@redhat.com","username":"chkumar246"}}},"removed_from_attention_set":{"12393":{"account":{"_account_id":12393,"name":"chandan kumar","display_name":"Chandan Kumar","email":"chkumar@redhat.com","username":"chkumar246"},"last_update":"2026-06-28 09:49:38.000000000","reason":"Change was marked work in progress"}},"hashtags":[],"change_id":"I62cd6f519b95b484b082d75c1767be8fb127f819","subject":"pci-sim: add NVMe 1.4 controller ops-table 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14:25:31.000000000","permitted_voting_range":{"min":-2,"max":2},"_account_id":22348,"name":"Zuul","username":"zuul","tags":["SERVICE_USER"]}],"values":{"-2":"Fails","-1":"Doesn\u0027t seem to work"," 0":"No score","+1":"Works for me","+2":"Verified"},"description":"","value":1,"default_value":0,"optional":true},"Code-Review":{"all":[{"value":0,"permitted_voting_range":{"min":-2,"max":2},"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},{"value":0,"permitted_voting_range":{"min":-1,"max":1},"_account_id":12393,"name":"chandan kumar","display_name":"Chandan Kumar","email":"chkumar@redhat.com","username":"chkumar246"},{"value":0,"permitted_voting_range":{"min":-1,"max":1},"_account_id":22348,"name":"Zuul","username":"zuul","tags":["SERVICE_USER"]}],"values":{"-2":"Do not merge","-1":"This patch needs further work before it can be merged"," 0":"No score","+1":"Looks good to me, but someone else must approve","+2":"Looks good to me (core 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sean-k-mooney on irc\nhosted at zuul.teim.app"},"state":"CC"},{"updated":"2026-06-26 15:48:22.000000000","updated_by":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"reviewer":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"state":"REVIEWER"},{"updated":"2026-06-26 15:57:15.000000000","updated_by":{"_account_id":22348,"name":"Zuul","username":"zuul","tags":["SERVICE_USER"]},"reviewer":{"_account_id":22348,"name":"Zuul","username":"zuul","tags":["SERVICE_USER"]},"state":"REVIEWER"}],"messages":[{"id":"efd62be7628c3c93f2edc6a973fe6276d4c63743","tag":"autogenerated:gerrit:newPatchSet","author":{"_account_id":12393,"name":"chandan kumar","display_name":"Chandan Kumar","email":"chkumar@redhat.com","username":"chkumar246"},"date":"2026-06-26 14:54:42.000000000","message":"Uploaded patch set 1.","accounts_in_message":[],"_revision_number":1},{"id":"0a5fe818e48b39b8a384aa986932df17fbd071c6","tag":"autogenerated:zuul:automatic-ci","author":{"_account_id":28006,"name":"teim-ci","display_name":"teim-ci","email":"ci@seanmooney.info","username":"ci-sean-mooney","status":"this is a third-party ci account run by sean-k-mooney on irc\nhosted at zuul.teim.app"},"date":"2026-06-26 14:54:50.000000000","message":"Patch Set 1:\n\nStarting automatic-ci jobs.","accounts_in_message":[],"_revision_number":1},{"id":"1afc7d4f00f55d2845e98936f9c027e121cb24d3","tag":"autogenerated:zuul:automatic-ci","author":{"_account_id":28006,"name":"teim-ci","display_name":"teim-ci","email":"ci@seanmooney.info","username":"ci-sean-mooney","status":"this is a third-party ci account run by sean-k-mooney on irc\nhosted at zuul.teim.app"},"date":"2026-06-26 15:16:00.000000000","message":"Patch Set 1:\n\n(9 comments)\n\nBuild succeeded (automatic-ci pipeline).\nhttps://zuul.teim.app/t/main/buildset/6cc02215b315404093c932cb0228e392\n\n- teim-code-review https://zuul.teim.app/t/main/build/7d02d7ceb62d425e9b0e2a4982296b4a : SUCCESS in 17m 52s\n\nWarning:\n  The poll_check_doorbells loop iterates to nvme-\u003enum_io_queues, but num_io_queues only grows (set in create_sq) and never shrinks on delete. Deleted-then-recreated lower-qid queues leave a stale max, wasting poll cycles harmlessly. Impact: Minor performance overhead in the polling kthread, polling doorbells for queues that no longer exist. Recommendation: Consider recomputing num_io_queues on delete operations, or iterating up to PCI_SIM_NVME_MAX_IO_QUEUES unconditionally since the shadow comparison is cheap.\n  Cleanup ordering in sriov_configure calls pci_disable_sriov() then poll_stop() then numvfs_write(0). kthread_stop() blocks until the kthread exits; if mid-batch in process_sq, cleanup delays. Impact: Potential delay in SR-IOV disable path if the kthread is mid-batch. Recommendation: The batch limit (64) with cond_resched() mitigates this, but verify the kthread checks kthread_should_stop() frequently enough. The current loop checks between VF iterations, which may be sufficient.","accounts_in_message":[],"_revision_number":1},{"id":"824bae2e6e30e5fcbebb77526e2bc9607367b100","author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"date":"2026-06-26 15:48:22.000000000","message":"Patch Set 1: Code-Review-1\n\n(9 comments)","accounts_in_message":[],"_revision_number":1},{"id":"50ee5a68c1311132ac4b5da1fab9c27ea64406dc","tag":"autogenerated:zuul:check","author":{"_account_id":22348,"name":"Zuul","username":"zuul","tags":["SERVICE_USER"]},"date":"2026-06-26 15:57:15.000000000","message":"Patch Set 1: Verified+1\n\nBuild succeeded (check pipeline).\nhttps://zuul.opendev.org/t/openstack/buildset/aa7dcc9e263849ed8db596ff5c20bea4\n\n- openstack-tox-cover https://zuul.opendev.org/t/openstack/build/c3a570fcccca4520934986a1a456d6ff : SUCCESS in 5m 12s\n- build-openstack-releasenotes https://zuul.opendev.org/t/openstack/build/0975bc23f49d41b9bb020e4748f1ea4a : SUCCESS in 2m 54s\n- openstack-tox-docs https://zuul.opendev.org/t/openstack/build/56fb2978604f4dea8ccb85b4bc4696f9 : SUCCESS in 8m 16s\n- openstack-tox-pep8 https://zuul.opendev.org/t/openstack/build/98d9a79c0f35415a829486c47ddf63eb : SUCCESS in 2m 31s\n- openstack-tox-py311 https://zuul.opendev.org/t/openstack/build/3a69052abb974330880cc6ffbd8002e2 : SUCCESS in 5m 37s\n- openstack-tox-py313 https://zuul.opendev.org/t/openstack/build/6ade8588961e457daa7054b8ea569a0f : SUCCESS in 3m 48s\n- openstack-tox-py314 https://zuul.opendev.org/t/openstack/build/08caff0fd3c547cb81a90db88aaa58ed : SUCCESS in 6m 11s (non-voting)\n- cyborg-tempest-py3 https://zuul.opendev.org/t/openstack/build/da71bb51bb4b427396b26265ce3995ce : SUCCESS in 42m 58s\n- cyborg-tempest-ipv6 https://zuul.opendev.org/t/openstack/build/17ea612228664eddb4cfb8685c81eb30 : SUCCESS in 29m 53s\n- cyborg-grenade https://zuul.opendev.org/t/openstack/build/528ae4d8f76c4d799fb1c35a76811472 : SUCCESS in 40m 50s\n- cyborg-grenade-skip-level-always https://zuul.opendev.org/t/openstack/build/0a6ec4ef1fb04aa2ac93d78ce43d5cf3 : SUCCESS in 56m 51s","accounts_in_message":[],"_revision_number":1},{"id":"73c5a74f4a46b9289875e2da8eb543d765c5b3ff","author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"date":"2026-06-27 11:46:39.000000000","message":"Patch Set 1:\n\n(1 comment)","accounts_in_message":[],"_revision_number":1},{"id":"cd7633afdd8a9311c9c93c38d24c693fdb8ed064","tag":"autogenerated:gerrit:newPatchSet","author":{"_account_id":12393,"name":"chandan kumar","display_name":"Chandan Kumar","email":"chkumar@redhat.com","username":"chkumar246"},"date":"2026-06-28 09:17:56.000000000","message":"Uploaded patch set 2.\n\nOutdated Votes:\n* Code-Review-1 (copy condition: \"changekind:TRIVIAL_REBASE OR is:MIN\")\n* Verified+1 (copy condition: \"NEVER\")\n","accounts_in_message":[],"_revision_number":2},{"id":"805509dae89e99de9a6cbe37527084aa0d03eba8","tag":"autogenerated:zuul:automatic-ci","author":{"_account_id":28006,"name":"teim-ci","display_name":"teim-ci","email":"ci@seanmooney.info","username":"ci-sean-mooney","status":"this is a third-party ci account run by sean-k-mooney on irc\nhosted at zuul.teim.app"},"date":"2026-06-28 09:18:04.000000000","message":"Patch Set 2:\n\nStarting automatic-ci jobs.","accounts_in_message":[],"_revision_number":2},{"id":"3b320a3f4182c132f5ba4851ff7c197822c10050","author":{"_account_id":12393,"name":"chandan kumar","display_name":"Chandan Kumar","email":"chkumar@redhat.com","username":"chkumar246"},"date":"2026-06-28 09:20:26.000000000","message":"Patch Set 2: Workflow-1\n\n(1 comment)","accounts_in_message":[],"_revision_number":2},{"id":"bfdfe1ed6f9b6a72a6330826ec1a044b94b3c318","author":{"_account_id":12393,"name":"chandan kumar","display_name":"Chandan Kumar","email":"chkumar@redhat.com","username":"chkumar246"},"date":"2026-06-28 09:30:10.000000000","message":"Patch Set 2:\n\n(1 comment)","accounts_in_message":[],"_revision_number":2},{"id":"64996d6bb6b27192b8bb9dfc540fd713b0dd9187","tag":"autogenerated:zuul:automatic-ci","author":{"_account_id":28006,"name":"teim-ci","display_name":"teim-ci","email":"ci@seanmooney.info","username":"ci-sean-mooney","status":"this is a third-party ci account run by sean-k-mooney on irc\nhosted at zuul.teim.app"},"date":"2026-06-28 09:42:28.000000000","message":"Patch Set 2:\n\n(4 comments)\n\nBuild succeeded (automatic-ci pipeline).\nhttps://zuul.teim.app/t/main/buildset/d52387604fd74ea29693d21a2cf7958f\n\n- teim-code-review https://zuul.teim.app/t/main/build/6ba7d7b7e1044f6c9c4f2d343d11d9a0 : SUCCESS in 15m 29s\n\nWarning:\n  The commit is marked [WIP] and adds ~2000 lines of kernel code. Before merge, the close-on-zeroing behavior (finding B) and the host ioctl allocation bound (finding C) should be resolved, as both affect host stability and behavior, not just the emulated device. Impact: These are behavioral issues visible to any consumer of the VFIO device or the host char device, not internal emulation details. Recommendation: Resolve the two high-severity findings and re-run the 34-test suite plus a multi-VM detach/reattach cycle to confirm backing-file semantics. Drop [WIP] once addressed.","accounts_in_message":[],"_revision_number":2},{"id":"e1db20e750de58a2493560b5cec2c742f5924710","tag":"autogenerated:gerrit:newPatchSet","author":{"_account_id":12393,"name":"chandan kumar","display_name":"Chandan Kumar","email":"chkumar@redhat.com","username":"chkumar246"},"date":"2026-06-28 09:47:24.000000000","message":"Uploaded patch set 3.\n\nOutdated Votes:\n* Workflow-1 (copy condition: \"NEVER\")\n","accounts_in_message":[],"_revision_number":3},{"id":"b0ef172cf3606d9da409080ab52a3e94a7b5b3bf","tag":"autogenerated:zuul:automatic-ci","author":{"_account_id":28006,"name":"teim-ci","display_name":"teim-ci","email":"ci@seanmooney.info","username":"ci-sean-mooney","status":"this is a third-party ci account run by sean-k-mooney on irc\nhosted at zuul.teim.app"},"date":"2026-06-28 09:47:30.000000000","message":"Patch Set 3:\n\nStarting automatic-ci jobs.","accounts_in_message":[],"_revision_number":3},{"id":"9e549bffd86e36ae852d7f90a767c61abde1fe77","tag":"autogenerated:gerrit:setWorkInProgress","author":{"_account_id":12393,"name":"chandan kumar","display_name":"Chandan Kumar","email":"chkumar@redhat.com","username":"chkumar246"},"date":"2026-06-28 09:49:38.000000000","message":"Set Work In Progress","accounts_in_message":[],"_revision_number":3},{"id":"779ec193d3db780cdddde004250fe7fd78fa88d2","author":{"_account_id":12393,"name":"chandan kumar","display_name":"Chandan Kumar","email":"chkumar@redhat.com","username":"chkumar246"},"date":"2026-06-28 09:49:46.000000000","message":"Patch Set 3: Workflow-1","accounts_in_message":[],"_revision_number":3},{"id":"4bc11ce7a56cd6279855972d2749219558d13616","tag":"autogenerated:zuul:automatic-ci","author":{"_account_id":28006,"name":"teim-ci","display_name":"teim-ci","email":"ci@seanmooney.info","username":"ci-sean-mooney","status":"this is a third-party ci account run by sean-k-mooney on irc\nhosted at zuul.teim.app"},"date":"2026-06-28 10:09:47.000000000","message":"Patch Set 3:\n\n(30 comments)\n\nBuild succeeded (automatic-ci pipeline).\nhttps://zuul.teim.app/t/main/buildset/21349bbdee4047fdbd025c2d659f2718\n\n- teim-code-review https://zuul.teim.app/t/main/build/6d9436f9e8604a479d2f89da350acb56 : SUCCESS in 22m 10s\n\nWarning:\n  Concurrency model splits two locks with overlapping scopes and no documented ownership rule: sim-\u003elock (VFIO path) guards bar0_rw processing, while nvme-\u003epoll_lock guards poll kthread dispatch/teardown. The same queues[] and sq_base/cq_base pointers are mutated under different locks. Impact: In Phase 2 the poll kthread is the sole dispatcher and the VFIO path is not used, so today the locks do not overlap in practice. But the design does not enforce this invariant, and a future change that drives both paths (or a rebind race) silently corrupts queue pointers. Recommendation: Document at the struct pci_sim_nvme definition which lock protects queues[], sq_base/cq_base, created, and cc/csts. Either converge on a single lock (poll_lock) for all queue/register mutation including the VFIO reg_write32 path, or add a clear comment that the VFIO and poll paths are mutually exclusive configurations and enforce it (e.g. WARN if signal_irq is set in both modes).\n  Commit message subject \u0027[WIP]pci-sim: add NVMe 1.4 controller emulation with host visibility\u0027 (a) retains the [WIP] tag and (b) exceeds 50 characters. The missing space after [WIP] is also a formatting issue. Impact: A [WIP] subject with an overlong line is a review-blocking style issue for OpenStack merge. OpenStack convention is \u003c50 char imperative subject with no period; WIP status is conveyed via Gerrit\u0027s Hold/WorkInProgress tag. The Generated-By and Signed-off-by footers are correctly present. Recommendation: Drop the [WIP] prefix (use Gerrit\u0027s WIP/Hold workflow instead) and rewrap the subject to \u003c\u003d 50 characters, e.g. \u0027pci-sim: add NVMe controller emulation\u0027. Keep the Generated-By and Signed-off-by footers.\n  The change adds ~2400 lines of new kernel C with no checkpatch.pl evidence in the change and no CI step verifying kernel coding style on these files. Impact: Without a checkpatch gate, kernel-style regressions (line length over 80 where not justified, indentation, comment style) can accumulate. This is a process gap rather than a per-line defect. Recommendation: Add a CI step (or pre-commit hook) that runs scripts/checkpatch.pl --no-tree --file on the pci-sim/*.c and pci-sim/*.h files, or at minimum run it manually and record the result.\n  The pre-run playbook runs ansible.builtin.reboot on the test node before devstack starts. Not all Zuul nodesets survive a reboot cleanly. Impact: If the nodeset is a pod rather than a VM, the reboot kills the pod and the job fails opaquely after the GRUB modification. Recommendation: Verify that the devstack-single-node-debian-trixie nodeset is reboot-safe (it should be, as it is a VM-based nodeset used by other devstack jobs that reboot). This is a confirmation item.","accounts_in_message":[],"_revision_number":3},{"id":"1daefc8972b6151fe761d48c18cf9b287b815a4a","tag":"autogenerated:zuul:check","author":{"_account_id":22348,"name":"Zuul","username":"zuul","tags":["SERVICE_USER"]},"date":"2026-06-28 10:30:19.000000000","message":"Patch Set 3: Verified+1\n\nBuild succeeded (check pipeline).\nhttps://zuul.opendev.org/t/openstack/buildset/0fbfbede06ff4c9e933543a59645130e\n\n- openstack-tox-cover https://zuul.opendev.org/t/openstack/build/0c44d47bb08b412f934e426db4f941dc : SUCCESS in 4m 19s\n- build-openstack-releasenotes https://zuul.opendev.org/t/openstack/build/b1a31ff540ae4748b70271cfefc6b43e : SUCCESS in 4m 09s\n- openstack-tox-docs https://zuul.opendev.org/t/openstack/build/a9653cc385784528b16523bff7b8cfc2 : SUCCESS in 8m 09s\n- openstack-tox-pep8 https://zuul.opendev.org/t/openstack/build/6d251a62c3064976b657c6e0fa26afe1 : SUCCESS in 2m 50s\n- openstack-tox-py311 https://zuul.opendev.org/t/openstack/build/05b5d262c5124798b677ef7d70a80921 : SUCCESS in 2m 03s\n- openstack-tox-py313 https://zuul.opendev.org/t/openstack/build/d886cf237dfd443c9acadc17fbc34305 : SUCCESS in 3m 43s\n- openstack-tox-py314 https://zuul.opendev.org/t/openstack/build/674e06220c504f03a987deb57b8cd264 : SUCCESS in 5m 45s (non-voting)\n- cyborg-tempest-py3 https://zuul.opendev.org/t/openstack/build/bbb4d3ece2f449339403369968b7b783 : SUCCESS in 37m 28s\n- cyborg-tempest-ipv6 https://zuul.opendev.org/t/openstack/build/8644fc82726b4c5cbbcbf71084740a7b : SUCCESS in 27m 32s\n- cyborg-tempest-pci-sim-nvme https://zuul.opendev.org/t/openstack/build/6cff48b2e62f40d28f9534a90f1bf2bc : FAILURE in 11m 54s (non-voting)\n- cyborg-grenade https://zuul.opendev.org/t/openstack/build/e7f4c65e174c4576aedeb284534f5fe0 : SUCCESS in 39m 02s\n- cyborg-grenade-skip-level-always https://zuul.opendev.org/t/openstack/build/a577f5c14ac840ca822c160341d26364 : SUCCESS in 40m 01s","accounts_in_message":[],"_revision_number":3},{"id":"73e1a2da767f61e22033fcb72ebaaf3655b18bbe","tag":"autogenerated:gerrit:newWipPatchSet","author":{"_account_id":12393,"name":"chandan kumar","display_name":"Chandan Kumar","email":"chkumar@redhat.com","username":"chkumar246"},"date":"2026-06-29 04:58:46.000000000","message":"Uploaded patch set 4.\n\nOutdated Votes:\n* Verified+1 (copy condition: \"NEVER\")\n* Workflow-1 (copy condition: \"NEVER\")\n","accounts_in_message":[],"_revision_number":4},{"id":"aad690a59b76a41263264cd3020deacaa1812192","tag":"autogenerated:zuul:automatic-ci","author":{"_account_id":28006,"name":"teim-ci","display_name":"teim-ci","email":"ci@seanmooney.info","username":"ci-sean-mooney","status":"this is a third-party ci account run by sean-k-mooney on irc\nhosted at zuul.teim.app"},"date":"2026-06-29 04:58:53.000000000","message":"Patch Set 4:\n\nStarting automatic-ci jobs.","accounts_in_message":[],"_revision_number":4},{"id":"709ed6945feaad371d0c401117ea339fa2236b4e","tag":"autogenerated:zuul:automatic-ci","author":{"_account_id":28006,"name":"teim-ci","display_name":"teim-ci","email":"ci@seanmooney.info","username":"ci-sean-mooney","status":"this is a third-party ci account run by sean-k-mooney on irc\nhosted at zuul.teim.app"},"date":"2026-06-29 05:22:27.000000000","message":"Patch Set 4:\n\n(15 comments)\n\nBuild succeeded (automatic-ci pipeline).\nhttps://zuul.teim.app/t/main/buildset/200ecbf783a1464f92a5209136664b69\n\n- teim-code-review https://zuul.teim.app/t/main/build/63ba62df5c794a4bb887289e57750244 : SUCCESS in 23m 25s\n\nWarning:\n  WIP patch (~4400 lines, 3 new kernel C files) adds a host-kernel NVMe controller emulator that handles guest-supplied command fields; several of the documented safety mitigations have gaps. Impact: Because the emulator runs in the host kernel and consumes untrusted guest input, any validation gap is a potential host memory-corruption or denial-of-service vector. The two host-visibility modes introduce a two-lock concurrency model that is load-bearing for the tested rebind workflow. Recommendation: Before non-WIP, do a focused hardening pass treating every NVMe command field as hostile: cap guest-derived multiplies with overflow helpers, bound the PRP chain with a fixed constant, handle CQ-full without dropping completions, and document/enforce the VFIO-vs-poll locking invariant.\n  New module params (nvme_backing_file, nvme_ns_size_mb, nvme_memmap_start/size, default_personality) and a runtime-mutable vf_personality sysfs attribute are only partly documented. Impact: Operators and downstream tests may rely on undocumented parameters, and the runtime-mutable personality knob is a sharp edge if changed while other tooling inspects the VF topology. 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To rerun just this ci comment\n\"teim-ci: auto\". To rerun other ci jobs comment \"recheck\".\nNote this ci does run on \"recheck\".\n\nhttps://zuul.teim.app/t/main/buildset/487c5f04511a4d1cb6f06171349d6646\n\n- teim-code-review https://zuul.teim.app/t/main/build/866ad6fad8084ad88cdfc55650f2b0fe : TIMED_OUT in 31m 15s","accounts_in_message":[],"_revision_number":6},{"id":"a88939bd09fefe2573c1f880a35a52e34328c19b","tag":"autogenerated:zuul:check","author":{"_account_id":22348,"name":"Zuul","username":"zuul","tags":["SERVICE_USER"]},"date":"2026-06-29 09:18:12.000000000","message":"Patch Set 6: Verified-1\n\nBuild failed (check pipeline).  For information on how to proceed, see\nhttps://docs.opendev.org/opendev/infra-manual/latest/developers.html#automated-testing\nand https://docs.openstack.org/project-team-guide/testing.html#how-to-handle-test-failures\n\nhttps://zuul.opendev.org/t/openstack/buildset/ef469432bc294d80ae229a1bbe0a185e\n\n- openstack-tox-cover https://zuul.opendev.org/t/openstack/build/653f72c53c444092b815a75648f464fa : SUCCESS in 4m 18s\n- build-openstack-releasenotes https://zuul.opendev.org/t/openstack/build/ebebb842b3a440a9b6c8dc48cb8fc390 : SUCCESS in 3m 40s\n- openstack-tox-docs https://zuul.opendev.org/t/openstack/build/578319a52b5d49bd9a951bc6282b0ad1 : SUCCESS in 8m 00s\n- openstack-tox-pep8 https://zuul.opendev.org/t/openstack/build/40f86558096c40148dec6ba50e7636f1 : FAILURE in 3m 27s\n- openstack-tox-py311 https://zuul.opendev.org/t/openstack/build/bfe553ef28f94147a74e91078193d2c7 : SUCCESS in 2m 56s\n- openstack-tox-py313 https://zuul.opendev.org/t/openstack/build/d03d06d3687f411bb34e06def1d6a299 : SUCCESS in 3m 24s\n- openstack-tox-py314 https://zuul.opendev.org/t/openstack/build/445a4f0644fc4208ac243cdab1f51c63 : SUCCESS in 6m 29s (non-voting)\n- cyborg-tempest-py3 https://zuul.opendev.org/t/openstack/build/4981ba7fb411421c87d0d0355af7254a : SUCCESS in 39m 09s\n- cyborg-tempest-ipv6 https://zuul.opendev.org/t/openstack/build/de693fea1ce54386b901a0119e98aaf7 : SUCCESS in 20m 30s\n- cyborg-tempest-pci-sim-nvme https://zuul.opendev.org/t/openstack/build/5915009c98734b529df4bd25925523bb : SUCCESS in 20m 03s (non-voting)\n- cyborg-grenade https://zuul.opendev.org/t/openstack/build/9f0a9302c732457f8414ffb7f9dd9930 : SUCCESS in 55m 01s\n- cyborg-grenade-skip-level-always https://zuul.opendev.org/t/openstack/build/43f6ea26b4bc4ee38b938caf9470da99 : SUCCESS in 38m 42s","accounts_in_message":[],"_revision_number":6},{"id":"fd9b5227f7e11e2defeda4a79e4b1b19d0f3c0b2","author":{"_account_id":12393,"name":"chandan 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06:33:13.000000000","message":"Patch Set 7: Verified+1\n\nBuild succeeded (check pipeline).\nhttps://zuul.opendev.org/t/openstack/buildset/6cf10cd1041c4378aec3b49dcd69b55e\n\n- openstack-tox-cover https://zuul.opendev.org/t/openstack/build/eef7427596b740afbdc0e1f85e27927a : SUCCESS in 7m 17s\n- build-openstack-releasenotes https://zuul.opendev.org/t/openstack/build/ca918a78156547d58f0b6169bde1ff4b : SUCCESS in 3m 18s\n- openstack-tox-docs https://zuul.opendev.org/t/openstack/build/a24f117bd55d4dfea6b6868b9d9fb4da : SUCCESS in 8m 23s\n- openstack-tox-pep8 https://zuul.opendev.org/t/openstack/build/37c85eb1a8b44534971aef4fa21ea1de : SUCCESS in 3m 44s\n- openstack-tox-py311 https://zuul.opendev.org/t/openstack/build/5aaa32dbd6bf45a0983501855c7bdde3 : SUCCESS in 2m 41s\n- openstack-tox-py313 https://zuul.opendev.org/t/openstack/build/d90df8fa2046484884bd3dcf142c1497 : SUCCESS in 3m 14s\n- openstack-tox-py314 https://zuul.opendev.org/t/openstack/build/9ca5facf71f34a63900ba96d65a43f33 : SUCCESS in 5m 26s (non-voting)\n- cyborg-tempest-py3 https://zuul.opendev.org/t/openstack/build/90b4255acc8045dda948db03b8130b86 : SUCCESS in 37m 36s\n- cyborg-tempest-ipv6 https://zuul.opendev.org/t/openstack/build/b33d8b57b5fd4fbda516650be2e96fd2 : SUCCESS in 27m 40s\n- cyborg-tempest-pci-sim-nvme https://zuul.opendev.org/t/openstack/build/55166fe9bc544efba313af23ca2a5ef7 : SUCCESS in 19m 39s (non-voting)\n- cyborg-grenade https://zuul.opendev.org/t/openstack/build/a1caeea8659247b0819af8d46725b4c1 : SUCCESS in 30m 05s\n- cyborg-grenade-skip-level-always https://zuul.opendev.org/t/openstack/build/46d628b0968a4be89de5a5b021b546cf : SUCCESS in 54m 35s","accounts_in_message":[],"_revision_number":7},{"id":"30688badcd0e6dd428c85f39ee1ae3d1e6cf507d","author":{"_account_id":12393,"name":"chandan kumar","display_name":"Chandan Kumar","email":"chkumar@redhat.com","username":"chkumar246"},"date":"2026-07-16 12:54:10.000000000","message":"Patch Set 7: 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For information on how to proceed, see\nhttps://docs.opendev.org/opendev/infra-manual/latest/developers.html#automated-testing\nand https://docs.openstack.org/project-team-guide/testing.html#how-to-handle-test-failures\n\nhttps://zuul.opendev.org/t/openstack/buildset/d6268f877ca1409f9f0a6168da881fc1\n\n- openstack-tox-cover https://zuul.opendev.org/t/openstack/build/8369c07c4b5e43d5b61b7708d10e7570 : SUCCESS in 4m 24s\n- build-openstack-releasenotes https://zuul.opendev.org/t/openstack/build/bba6bcbda2314feeabdc8aa2fc29c3c7 : SUCCESS in 3m 33s\n- openstack-tox-docs https://zuul.opendev.org/t/openstack/build/945bfd95476544e09bcb5d68f8699609 : SUCCESS in 7m 40s\n- openstack-tox-pep8 https://zuul.opendev.org/t/openstack/build/1f9c3700dc91450daa806b1419a629e2 : FAILURE in 3m 56s\n- openstack-tox-py311 https://zuul.opendev.org/t/openstack/build/66f40ee738e04345afc953aa6f96f8ba : SUCCESS in 4m 07s\n- openstack-tox-py313 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For information on how to proceed, see\nhttps://docs.opendev.org/opendev/infra-manual/latest/developers.html#automated-testing\nand https://docs.openstack.org/project-team-guide/testing.html#how-to-handle-test-failures\n\nhttps://zuul.opendev.org/t/openstack/buildset/719ecc18f6cc4078be0768e52c4b95af\n\n- openstack-tox-cover https://zuul.opendev.org/t/openstack/build/f0be67089f9d4dbca952f2d7be9d44cd : SUCCESS in 2m 37s\n- build-openstack-releasenotes https://zuul.opendev.org/t/openstack/build/2673871dc49a4704abea699905bd2708 : SUCCESS in 2m 20s\n- openstack-tox-docs https://zuul.opendev.org/t/openstack/build/db6e2d24e2584f5db0f3e19bddbba306 : SUCCESS in 7m 28s\n- openstack-tox-pep8 https://zuul.opendev.org/t/openstack/build/f47611f67404420d83b4023dcb06c1ec : SUCCESS in 7m 25s\n- openstack-tox-py311 https://zuul.opendev.org/t/openstack/build/af5590d84aec4783a84d53028561e48f : SUCCESS in 2m 41s\n- openstack-tox-py313 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18s","accounts_in_message":[],"_revision_number":12}],"current_revision_number":12,"current_revision":"ea8379b6744630416eb2101bd4411231604a3646","revisions":{"941d628093789e9791b2c95f7eaff21002f891f6":{"kind":"REWORK","_number":1,"created":"2026-06-26 14:54:42.000000000","uploader":{"_account_id":12393,"name":"chandan kumar","display_name":"Chandan Kumar","email":"chkumar@redhat.com","username":"chkumar246"},"ref":"refs/changes/79/995079/1","fetch":{"anonymous http":{"url":"https://review.opendev.org/openstack/cyborg","ref":"refs/changes/79/995079/1","commands":{"Checkout":"git fetch https://review.opendev.org/openstack/cyborg refs/changes/79/995079/1 \u0026\u0026 git checkout FETCH_HEAD","Cherry Pick":"git fetch https://review.opendev.org/openstack/cyborg refs/changes/79/995079/1 \u0026\u0026 git cherry-pick FETCH_HEAD","Format Patch":"git fetch https://review.opendev.org/openstack/cyborg refs/changes/79/995079/1 \u0026\u0026 git format-patch -1 --stdout FETCH_HEAD","Pull":"git pull https://review.opendev.org/openstack/cyborg refs/changes/79/995079/1"}}},"commit":{"parents":[{"commit":"042a8dca4d54372c95347fea38d8417ac275e9f0","subject":"Merge \"Add pci-sim developer guide\"","web_links":[{"name":"gitea","tooltip":"Open in GitWeb","url":"https://opendev.org/openstack/cyborg/commit/042a8dca4d54372c95347fea38d8417ac275e9f0"}]}],"author":{"name":"Chandan Kumar (raukadah)","email":"chkumar@redhat.com","date":"2026-06-25 15:05:19.000000000","tz":330},"committer":{"name":"Chandan Kumar (raukadah)","email":"chkumar@redhat.com","date":"2026-06-26 14:53:37.000000000","tz":330},"subject":"[WIP]pci-sim: add NVMe 1.4 controller emulation with host visibility","message":"[WIP]pci-sim: add NVMe 1.4 controller emulation with host visibility\n\nAdd NVMe emulation to pci-sim with two host-visibility modes and a\ncomprehensive test suite (28 tests).\n\nPhase 1 — char device interface:\nA custom char device driver (/dev/pci_sim_nvmeN) exposes NVMe admin\nand I/O commands via ioctls.  The host userspace can probe the\nemulated controller through NVME_IOCTL_ADMIN_CMD and\nNVME_IOCTL_IO_CMD without requiring the stock nvme kernel driver.\nStorage is file-backed via kernel_read/kernel_write on per-VF backing\nfiles (default /tmp/pci-sim-nvme.\u003cindex\u003e), sized by nvme_ns_size_mb\n(default 64 MB).\n\nPhase 2 — stock nvme driver binding via reserved-memory BAR0:\nUses boot-time reserved memory (memmap\u003dSIZE$START) to back VF BAR0\naddresses with real RAM.  A polling kthread dispatches register and\ndoorbell writes from the memory-mapped BAR0 to the existing NVMe\nemulation layer.  IRQ injection uses msi_get_virq + irq_retrigger\n(nvmevirt pattern).  The stock nvme kernel driver probes the VFs and\nexposes /dev/nvmeXnY on the host, supporting standard nvme-cli\ncommands.\n\nRebind fix — VFIO-to-stock-nvme race condition:\nFix a soft lockup triggered when rebinding a VF from pci_sim_vfio_pci\nback to the stock nvme driver.  The polling kthread processed CC.ENABLE\nbefore AQA/ASQ/ACQ were polled from BAR0, creating the admin queue with\nstale zero values (sq_depth\u003d1).  This caused nvme_sim_process_sq() to\nloop infinitely, triggering a soft lockup requiring reboot.  Fix by\ndeferring admin queue creation from poll_check_regs() to the lazy setup\nin poll_check_doorbells(), which reads directly from BAR0.  Add a batch\nlimit (PCI_SIM_NVME_SQ_BATCH\u003d64) with cond_resched() as safety net, and\nguard admin queue creation in pci_sim_nvme_reg_write32() on aqa !\u003d 0.\n\nCleanup ordering fix — kthread lifetime during driver unbind:\nReorder pci_disable_sriov() before pci_sim_nvme_poll_stop() and bus\nremoval before kthread stop, so the polling kthread stays alive to\nprocess CC\u003d0 and write CSTS\u003d0 back to BAR0 during driver unbind.\nWithout this, stock nvme\u0027s remove() times out (~10s per VF) waiting\nfor CSTS.RDY\u003d0 that never comes, blocking devstack unstack.\n\nAlso updates UART driver to skip NVMe VFs in the loopback probe,\ndecouples NVMe emulation APIs from the VFIO layer for reuse by both\nhost drivers, and updates developer guide documentation.\n\nGenerated-By: Claude Opus 4.6 \u003cnoreply@anthropic.com\u003e\nChange-Id: I62cd6f519b95b484b082d75c1767be8fb127f819\nSigned-off-by: Chandan Kumar (raukadah) \u003cchkumar@redhat.com\u003e\n","web_links":[{"name":"gitea","tooltip":"Open in GitWeb","url":"https://opendev.org/openstack/cyborg/commit/941d628093789e9791b2c95f7eaff21002f891f6"}],"resolve_conflicts_web_links":[{"name":"gitea","tooltip":"Open in GitWeb","url":"https://opendev.org/openstack/cyborg/commit/941d628093789e9791b2c95f7eaff21002f891f6"}]},"branch":"refs/heads/master"},"7bfd2c520ad312077947759b8a0d8eb892b758a9":{"kind":"REWORK","_number":2,"created":"2026-06-28 09:17:56.000000000","uploader":{"_account_id":12393,"name":"chandan kumar","display_name":"Chandan Kumar","email":"chkumar@redhat.com","username":"chkumar246"},"ref":"refs/changes/79/995079/2","fetch":{"anonymous http":{"url":"https://review.opendev.org/openstack/cyborg","ref":"refs/changes/79/995079/2","commands":{"Checkout":"git fetch https://review.opendev.org/openstack/cyborg refs/changes/79/995079/2 \u0026\u0026 git checkout FETCH_HEAD","Cherry Pick":"git fetch https://review.opendev.org/openstack/cyborg refs/changes/79/995079/2 \u0026\u0026 git cherry-pick FETCH_HEAD","Format Patch":"git fetch https://review.opendev.org/openstack/cyborg refs/changes/79/995079/2 \u0026\u0026 git format-patch -1 --stdout FETCH_HEAD","Pull":"git pull https://review.opendev.org/openstack/cyborg refs/changes/79/995079/2"}}},"commit":{"parents":[{"commit":"042a8dca4d54372c95347fea38d8417ac275e9f0","subject":"Merge \"Add pci-sim developer guide\"","web_links":[{"name":"gitea","tooltip":"Open in GitWeb","url":"https://opendev.org/openstack/cyborg/commit/042a8dca4d54372c95347fea38d8417ac275e9f0"}]}],"author":{"name":"Chandan Kumar (raukadah)","email":"chkumar@redhat.com","date":"2026-06-25 15:05:19.000000000","tz":330},"committer":{"name":"Chandan Kumar (raukadah)","email":"chkumar@redhat.com","date":"2026-06-28 09:17:10.000000000","tz":330},"subject":"[WIP]pci-sim: add NVMe 1.4 controller emulation with host visibility","message":"[WIP]pci-sim: add NVMe 1.4 controller emulation with host visibility\n\nAdd NVMe emulation to pci-sim with two host-visibility modes, a\n34-test suite, DevStack multi-PF personality support, and docs.\n\nPhase 1 — char device interface:\n/dev/pci_sim_nvmeN exposes NVMe admin and I/O commands via ioctls\n(NVME_IOCTL_ADMIN_CMD, NVME_IOCTL_IO_CMD) without requiring the stock\nnvme driver.  Storage is file-backed via kernel_read/kernel_write on\nper-VF backing files, sized by nvme_ns_size_mb (default 64 MB).\nSupported commands: identify controller/namespace, read, write,\nwrite-zeroes, format, sanitize, flush.\n\nPhase 2 — stock nvme driver binding via BAR0 memory:\nDynamically allocates BAR0 memory using alloc_pages + SetPageReserved\nso ioremap accepts it without memmap\u003d boot parameters.  A polling\nkthread dispatches register and doorbell writes from memory-mapped\nBAR0 to the NVMe emulation core.  IRQ injection uses msi_get_virq +\nirq_retrigger.  The stock nvme driver probes VFs and exposes\n/dev/nvmeXnY.  Falls back to memmap\u003d reserved memory when provided.\n\nAdmin queue creation is deferred from CC.ENABLE handling to the first\ndoorbell poll, preventing a soft lockup when rebinding from\npci_sim_vfio_pci to the stock nvme driver (AQA/ASQ/ACQ not yet\nwritten to BAR0 at CC.ENABLE time).  A batch limit with cond_resched()\nguards against runaway SQ processing.\n\nCleanup ordering places pci_disable_sriov before kthread stop so the\npolling kthread can write CSTS\u003d0 to BAR0 during unbind, preventing\n10s-per-VF timeouts in the stock nvme driver\u0027s remove path.\n\nSafety:\n- check_mul_overflow/check_add_overflow in LBA range validation\n- PRP chain traversal depth limit\n- sq_depth \u003e 0 guard in submission queue processing\n- kernel_read/kernel_write return value propagation\n- Host ioctl buffer validation: cmd.data_len \u003e\u003d nlb * lba_size\n- CQ full check before posting completions\n- Host char device ioctl mutex\n- Correct pci_dev reference counting (hold ref while stored)\n- __le16 command_id in SQE struct\n- vf_index \u003e\u003d 0 guard in host driver probe\n\nUART VF driver uses class_mask matching (0x070002, 0xff0000) so NVMe\nclass VFs never reach its probe, replacing the previous NVMe class\nreject check.\n\nDevStack: PCI_SIM_DEVICES\u003d\"nova:uart,cyborg:nvme\" creates PFs with\nper-service personality mapping.  NVMe settings (backing file path,\nnamespace size) live in devstack/settings.\n\nTests: Phase 1 char device, Phase 2 stock driver, driver rebind,\ncross-personality switching, filesystem (parted/mkfs/mount/blkid),\nfio data I/O, QEMU guest NVMe passthrough (6 checks).\n\nGenerated-By: Claude Opus 4.6 \u003cnoreply@anthropic.com\u003e\nChange-Id: I62cd6f519b95b484b082d75c1767be8fb127f819\nSigned-off-by: Chandan Kumar (raukadah) \u003cchkumar@redhat.com\u003e\n","web_links":[{"name":"gitea","tooltip":"Open in GitWeb","url":"https://opendev.org/openstack/cyborg/commit/7bfd2c520ad312077947759b8a0d8eb892b758a9"}],"resolve_conflicts_web_links":[{"name":"gitea","tooltip":"Open in GitWeb","url":"https://opendev.org/openstack/cyborg/commit/7bfd2c520ad312077947759b8a0d8eb892b758a9"}]},"branch":"refs/heads/master"},"fe98d64830043cbea7292c4cb3e91d1441680ecb":{"kind":"REWORK","_number":3,"created":"2026-06-28 09:47:24.000000000","uploader":{"_account_id":12393,"name":"chandan kumar","display_name":"Chandan Kumar","email":"chkumar@redhat.com","username":"chkumar246"},"ref":"refs/changes/79/995079/3","fetch":{"anonymous http":{"url":"https://review.opendev.org/openstack/cyborg","ref":"refs/changes/79/995079/3","commands":{"Checkout":"git fetch https://review.opendev.org/openstack/cyborg refs/changes/79/995079/3 \u0026\u0026 git checkout FETCH_HEAD","Cherry Pick":"git fetch https://review.opendev.org/openstack/cyborg refs/changes/79/995079/3 \u0026\u0026 git cherry-pick FETCH_HEAD","Format Patch":"git fetch https://review.opendev.org/openstack/cyborg refs/changes/79/995079/3 \u0026\u0026 git format-patch -1 --stdout FETCH_HEAD","Pull":"git pull https://review.opendev.org/openstack/cyborg refs/changes/79/995079/3"}}},"commit":{"parents":[{"commit":"042a8dca4d54372c95347fea38d8417ac275e9f0","subject":"Merge \"Add pci-sim developer guide\"","web_links":[{"name":"gitea","tooltip":"Open in GitWeb","url":"https://opendev.org/openstack/cyborg/commit/042a8dca4d54372c95347fea38d8417ac275e9f0"}]}],"author":{"name":"Chandan Kumar (raukadah)","email":"chkumar@redhat.com","date":"2026-06-25 15:05:19.000000000","tz":330},"committer":{"name":"Chandan Kumar (raukadah)","email":"chkumar@redhat.com","date":"2026-06-28 09:46:49.000000000","tz":330},"subject":"[WIP]pci-sim: add NVMe 1.4 controller emulation with host visibility","message":"[WIP]pci-sim: add NVMe 1.4 controller emulation with host visibility\n\nAdd NVMe emulation to pci-sim with two host-visibility modes, a\n34-test suite, DevStack multi-PF personality support, and docs.\n\nPhase 1 — char device interface:\n/dev/pci_sim_nvmeN exposes NVMe admin and I/O commands via ioctls\n(NVME_IOCTL_ADMIN_CMD, NVME_IOCTL_IO_CMD) without requiring the stock\nnvme driver.  Storage is file-backed via kernel_read/kernel_write on\nper-VF backing files, sized by nvme_ns_size_mb (default 64 MB).\nSupported commands: identify controller/namespace, read, write,\nwrite-zeroes, format, sanitize, flush.\n\nPhase 2 — stock nvme driver binding via BAR0 memory:\nDynamically allocates BAR0 memory using alloc_pages + SetPageReserved\nso ioremap accepts it without memmap\u003d boot parameters.  A polling\nkthread dispatches register and doorbell writes from memory-mapped\nBAR0 to the NVMe emulation core.  IRQ injection uses msi_get_virq +\nirq_retrigger.  The stock nvme driver probes VFs and exposes\n/dev/nvmeXnY.  Falls back to memmap\u003d reserved memory when provided.\n\nAdmin queue creation is deferred from CC.ENABLE handling to the first\ndoorbell poll, preventing a soft lockup when rebinding from\npci_sim_vfio_pci to the stock nvme driver (AQA/ASQ/ACQ not yet\nwritten to BAR0 at CC.ENABLE time).  A batch limit with cond_resched()\nguards against runaway SQ processing.\n\nCleanup ordering places pci_disable_sriov before kthread stop so the\npolling kthread can write CSTS\u003d0 to BAR0 during unbind, preventing\n10s-per-VF timeouts in the stock nvme driver\u0027s remove path.\n\nSafety:\n- check_mul_overflow/check_add_overflow in LBA range validation\n- PRP chain traversal depth limit\n- sq_depth \u003e 0 guard in submission queue processing\n- kernel_read/kernel_write return value propagation\n- Host ioctl buffer validation: cmd.data_len \u003e\u003d nlb * lba_size\n- CQ full check before posting completions\n- Host char device ioctl mutex\n- Correct pci_dev reference counting (hold ref while stored)\n- __le16 command_id in SQE struct\n- vf_index \u003e\u003d 0 guard in host driver probe\n\nUART VF driver uses class_mask matching (0x070002, 0xff0000) so NVMe\nclass VFs never reach its probe, replacing the previous NVMe class\nreject check.\n\nDevStack: PCI_SIM_DEVICES\u003d\"nova:uart,cyborg:nvme\" creates PFs with\nper-service personality mapping.  NVMe settings (backing file path,\nnamespace size) live in devstack/settings.\n\nTests: Phase 1 char device, Phase 2 stock driver, driver rebind,\ncross-personality switching, filesystem (parted/mkfs/mount/blkid),\nfio data I/O, QEMU guest NVMe passthrough (6 checks).\n\nGenerated-By: Claude Opus 4.6 \u003cnoreply@anthropic.com\u003e\nChange-Id: I62cd6f519b95b484b082d75c1767be8fb127f819\nSigned-off-by: Chandan Kumar (raukadah) \u003cchkumar@redhat.com\u003e\n","web_links":[{"name":"gitea","tooltip":"Open in GitWeb","url":"https://opendev.org/openstack/cyborg/commit/fe98d64830043cbea7292c4cb3e91d1441680ecb"}],"resolve_conflicts_web_links":[{"name":"gitea","tooltip":"Open in GitWeb","url":"https://opendev.org/openstack/cyborg/commit/fe98d64830043cbea7292c4cb3e91d1441680ecb"}]},"branch":"refs/heads/master"},"8cb337f7f11a274a16c17c29b793cbfec39335f4":{"kind":"REWORK","_number":4,"created":"2026-06-29 04:58:46.000000000","uploader":{"_account_id":12393,"name":"chandan kumar","display_name":"Chandan Kumar","email":"chkumar@redhat.com","username":"chkumar246"},"ref":"refs/changes/79/995079/4","fetch":{"anonymous http":{"url":"https://review.opendev.org/openstack/cyborg","ref":"refs/changes/79/995079/4","commands":{"Checkout":"git fetch https://review.opendev.org/openstack/cyborg refs/changes/79/995079/4 \u0026\u0026 git checkout FETCH_HEAD","Cherry Pick":"git fetch https://review.opendev.org/openstack/cyborg refs/changes/79/995079/4 \u0026\u0026 git cherry-pick FETCH_HEAD","Format Patch":"git fetch https://review.opendev.org/openstack/cyborg refs/changes/79/995079/4 \u0026\u0026 git format-patch -1 --stdout FETCH_HEAD","Pull":"git pull https://review.opendev.org/openstack/cyborg refs/changes/79/995079/4"}}},"commit":{"parents":[{"commit":"042a8dca4d54372c95347fea38d8417ac275e9f0","subject":"Merge \"Add pci-sim developer guide\"","web_links":[{"name":"gitea","tooltip":"Open in GitWeb","url":"https://opendev.org/openstack/cyborg/commit/042a8dca4d54372c95347fea38d8417ac275e9f0"}]}],"author":{"name":"Chandan Kumar (raukadah)","email":"chkumar@redhat.com","date":"2026-06-25 15:05:19.000000000","tz":330},"committer":{"name":"Chandan Kumar (raukadah)","email":"chkumar@redhat.com","date":"2026-06-29 04:58:21.000000000","tz":330},"subject":"[WIP]pci-sim: add NVMe 1.4 controller emulation with host visibility","message":"[WIP]pci-sim: add NVMe 1.4 controller emulation with host visibility\n\nAdd NVMe emulation to pci-sim with two host-visibility modes, a\n34-test suite, DevStack multi-PF personality support, and docs.\n\nPhase 1 — char device interface:\n/dev/pci_sim_nvmeN exposes NVMe admin and I/O commands via ioctls\n(NVME_IOCTL_ADMIN_CMD, NVME_IOCTL_IO_CMD) without requiring the stock\nnvme driver.  Storage is file-backed via kernel_read/kernel_write on\nper-VF backing files, sized by nvme_ns_size_mb (default 64 MB).\nSupported commands: identify controller/namespace, read, write,\nwrite-zeroes, format, sanitize, flush.\n\nPhase 2 — stock nvme driver binding via BAR0 memory:\nDynamically allocates BAR0 memory using alloc_pages + SetPageReserved\nso ioremap accepts it without memmap\u003d boot parameters.  A polling\nkthread dispatches register and doorbell writes from memory-mapped\nBAR0 to the NVMe emulation core.  IRQ injection uses msi_get_virq +\nirq_retrigger.  The stock nvme driver probes VFs and exposes\n/dev/nvmeXnY.  Falls back to memmap\u003d reserved memory when provided.\n\nAdmin queue creation is deferred from CC.ENABLE handling to the first\ndoorbell poll, preventing a soft lockup when rebinding from\npci_sim_vfio_pci to the stock nvme driver (AQA/ASQ/ACQ not yet\nwritten to BAR0 at CC.ENABLE time).  A batch limit with cond_resched()\nguards against runaway SQ processing.\n\nCleanup ordering places pci_disable_sriov before kthread stop so the\npolling kthread can write CSTS\u003d0 to BAR0 during unbind, preventing\n10s-per-VF timeouts in the stock nvme driver\u0027s remove path.\n\nSafety:\n- check_mul_overflow/check_add_overflow in LBA range validation\n- PRP chain traversal depth limit\n- sq_depth \u003e 0 guard in submission queue processing\n- kernel_read/kernel_write return value propagation\n- Host ioctl buffer validation: cmd.data_len \u003e\u003d nlb * lba_size\n- CQ full check before posting completions\n- Host char device ioctl mutex\n- Correct pci_dev reference counting (hold ref while stored)\n- __le16 command_id in SQE struct\n- vf_index \u003e\u003d 0 guard in host driver probe\n\nUART VF driver uses class_mask matching (0x070002, 0xff0000) so NVMe\nclass VFs never reach its probe, replacing the previous NVMe class\nreject check.\n\nDevStack: PCI_SIM_DEVICES\u003d\"nova:uart,cyborg:nvme\" creates PFs with\nper-service personality mapping.  NVMe settings (backing file path,\nnamespace size) live in devstack/settings.\n\nTests: Phase 1 char device, Phase 2 stock driver, driver rebind,\ncross-personality switching, filesystem (parted/mkfs/mount/blkid),\nfio data I/O, QEMU guest NVMe passthrough (6 checks).\n\nGenerated-By: Claude Opus 4.6 \u003cnoreply@anthropic.com\u003e\nChange-Id: I62cd6f519b95b484b082d75c1767be8fb127f819\nSigned-off-by: Chandan Kumar (raukadah) \u003cchkumar@redhat.com\u003e\nEntire-Checkpoint: c1655b346db0\n","web_links":[{"name":"gitea","tooltip":"Open in GitWeb","url":"https://opendev.org/openstack/cyborg/commit/8cb337f7f11a274a16c17c29b793cbfec39335f4"}],"resolve_conflicts_web_links":[{"name":"gitea","tooltip":"Open in GitWeb","url":"https://opendev.org/openstack/cyborg/commit/8cb337f7f11a274a16c17c29b793cbfec39335f4"}]},"branch":"refs/heads/master"},"276b746d0b955b91840b522fdad3e57bac9983d9":{"kind":"REWORK","_number":5,"created":"2026-06-29 07:53:53.000000000","uploader":{"_account_id":12393,"name":"chandan kumar","display_name":"Chandan Kumar","email":"chkumar@redhat.com","username":"chkumar246"},"ref":"refs/changes/79/995079/5","fetch":{"anonymous http":{"url":"https://review.opendev.org/openstack/cyborg","ref":"refs/changes/79/995079/5","commands":{"Checkout":"git fetch https://review.opendev.org/openstack/cyborg refs/changes/79/995079/5 \u0026\u0026 git checkout FETCH_HEAD","Cherry Pick":"git fetch https://review.opendev.org/openstack/cyborg refs/changes/79/995079/5 \u0026\u0026 git cherry-pick FETCH_HEAD","Format Patch":"git fetch https://review.opendev.org/openstack/cyborg refs/changes/79/995079/5 \u0026\u0026 git format-patch -1 --stdout FETCH_HEAD","Pull":"git pull https://review.opendev.org/openstack/cyborg refs/changes/79/995079/5"}}},"commit":{"parents":[{"commit":"042a8dca4d54372c95347fea38d8417ac275e9f0","subject":"Merge \"Add pci-sim developer guide\"","web_links":[{"name":"gitea","tooltip":"Open in GitWeb","url":"https://opendev.org/openstack/cyborg/commit/042a8dca4d54372c95347fea38d8417ac275e9f0"}]}],"author":{"name":"Chandan Kumar (raukadah)","email":"chkumar@redhat.com","date":"2026-06-25 15:05:19.000000000","tz":330},"committer":{"name":"Chandan Kumar (raukadah)","email":"chkumar@redhat.com","date":"2026-06-29 07:53:21.000000000","tz":330},"subject":"[WIP]pci-sim: add NVMe 1.4 controller emulation with host visibility","message":"[WIP]pci-sim: add NVMe 1.4 controller emulation with host visibility\n\nAdd NVMe emulation to pci-sim with two host-visibility modes, a\n34-test suite, DevStack multi-PF personality support, and docs.\n\nPhase 1 — char device interface:\n/dev/pci_sim_nvmeN exposes NVMe admin and I/O commands via ioctls\n(NVME_IOCTL_ADMIN_CMD, NVME_IOCTL_IO_CMD) without requiring the stock\nnvme driver.  Storage is file-backed via kernel_read/kernel_write on\nper-VF backing files, sized by nvme_ns_size_mb (default 64 MB).\nSupported commands: identify controller/namespace, read, write,\nwrite-zeroes, format, sanitize, flush.\n\nPhase 2 — stock nvme driver binding via memmap BAR0:\nUses boot-time reserved memory (memmap\u003dSIZE$START kernel parameter)\nto back VF BAR0 addresses with real RAM.  A polling kthread dispatches\nregister and doorbell writes from memory-mapped BAR0 to the NVMe\nemulation core.  IRQ injection uses msi_get_virq + irq_retrigger,\nwhich requires bare-metal hardware (real APIC, not hypervisor-emulated).\nThe stock nvme driver probes VFs and exposes /dev/nvmeXnY block devices.\n\nAdmin queue creation is deferred from CC.ENABLE handling to the first\ndoorbell poll, preventing a soft lockup when rebinding from\npci_sim_vfio_pci to the stock nvme driver (AQA/ASQ/ACQ not yet\nwritten to BAR0 at CC.ENABLE time).  A batch limit with cond_resched()\nguards against runaway SQ processing.\n\nCleanup ordering places pci_disable_sriov before kthread stop so the\npolling kthread can write CSTS\u003d0 to BAR0 during unbind, preventing\n10s-per-VF timeouts in the stock nvme driver\u0027s remove path.\n\nSafety:\n- check_mul_overflow/check_add_overflow in LBA range validation\n- PRP chain traversal depth limit\n- sq_depth \u003e 0 guard in submission queue processing\n- kernel_read/kernel_write return value propagation\n- Host ioctl buffer validation: cmd.data_len \u003e\u003d nlb * lba_size\n- CQ full check before posting completions\n- Host char device ioctl mutex\n- Correct pci_dev reference counting (hold ref while stored)\n- __le16 command_id in SQE struct\n- vf_index \u003e\u003d 0 guard in host driver probe\n- Doorbell value validation against queue depth\n- MQES enforcement on Create CQ/SQ (reject qsize \u003e CAP.MQES+1)\n- MDTS enforcement on I/O read/write (cap at 128KB per transfer)\n- BAR0 offset bounds check in poll kthread vf_bar0()\n- iounmap of bar0_mapped in module remove (pre-existing leak fix)\n\nCI: cyborg-tempest-pci-sim-nvme runs in non-memmap mode (Phase 1)\nfor VM compatibility — no memmap boot params, no pre-playbook.\n\nUART VF driver uses class_mask matching (0x070002, 0xff0000) so NVMe\nclass VFs never reach its probe, replacing the previous NVMe class\nreject check.\n\nDevStack: PCI_SIM_DEVICES\u003d\"nova:uart,cyborg:nvme\" creates PFs with\nper-service personality mapping.  NVMe settings (backing file path,\nnamespace size, optional memmap params) live in devstack/settings.\n\nDocs: developer-guide.rst documents both BAR0 modes, CI mode\nselection, module parameters, NVMe command support by mode, and\nexplains why alloc_pages dynamic allocation was removed.\n\nTests: Phase 1 char device, Phase 2 stock driver, driver rebind,\ncross-personality switching, filesystem (parted/mkfs/mount/blkid),\nfio data I/O, QEMU guest NVMe passthrough (6 checks).\n\nGenerated-By: Claude Opus 4.6 \u003cnoreply@anthropic.com\u003e\nChange-Id: I62cd6f519b95b484b082d75c1767be8fb127f819\nSigned-off-by: Chandan Kumar (raukadah) \u003cchkumar@redhat.com\u003e\n","web_links":[{"name":"gitea","tooltip":"Open in GitWeb","url":"https://opendev.org/openstack/cyborg/commit/276b746d0b955b91840b522fdad3e57bac9983d9"}],"resolve_conflicts_web_links":[{"name":"gitea","tooltip":"Open in GitWeb","url":"https://opendev.org/openstack/cyborg/commit/276b746d0b955b91840b522fdad3e57bac9983d9"}]},"branch":"refs/heads/master"},"2cfd91976833cd3b60ee2cfdcf66add92450fb40":{"kind":"REWORK","_number":6,"created":"2026-06-29 08:17:10.000000000","uploader":{"_account_id":12393,"name":"chandan kumar","display_name":"Chandan Kumar","email":"chkumar@redhat.com","username":"chkumar246"},"ref":"refs/changes/79/995079/6","fetch":{"anonymous http":{"url":"https://review.opendev.org/openstack/cyborg","ref":"refs/changes/79/995079/6","commands":{"Checkout":"git fetch https://review.opendev.org/openstack/cyborg refs/changes/79/995079/6 \u0026\u0026 git checkout FETCH_HEAD","Cherry Pick":"git fetch https://review.opendev.org/openstack/cyborg refs/changes/79/995079/6 \u0026\u0026 git cherry-pick FETCH_HEAD","Format Patch":"git fetch https://review.opendev.org/openstack/cyborg refs/changes/79/995079/6 \u0026\u0026 git format-patch -1 --stdout FETCH_HEAD","Pull":"git pull https://review.opendev.org/openstack/cyborg refs/changes/79/995079/6"}}},"commit":{"parents":[{"commit":"042a8dca4d54372c95347fea38d8417ac275e9f0","subject":"Merge \"Add pci-sim developer guide\"","web_links":[{"name":"gitea","tooltip":"Open in GitWeb","url":"https://opendev.org/openstack/cyborg/commit/042a8dca4d54372c95347fea38d8417ac275e9f0"}]}],"author":{"name":"Chandan Kumar (raukadah)","email":"chkumar@redhat.com","date":"2026-06-25 15:05:19.000000000","tz":330},"committer":{"name":"Chandan Kumar (raukadah)","email":"chkumar@redhat.com","date":"2026-06-29 08:16:41.000000000","tz":330},"subject":"[WIP]pci-sim: add NVMe 1.4 controller emulation with host visibility","message":"[WIP]pci-sim: add NVMe 1.4 controller emulation with host visibility\n\nAdd NVMe emulation to pci-sim with two host-visibility modes, a\n34-test suite, DevStack multi-PF personality support, and docs.\n\nPhase 1 — char device interface:\n/dev/pci_sim_nvmeN exposes NVMe admin and I/O commands via ioctls\n(NVME_IOCTL_ADMIN_CMD, NVME_IOCTL_IO_CMD) without requiring the stock\nnvme driver.  Storage is file-backed via kernel_read/kernel_write on\nper-VF backing files, sized by nvme_ns_size_mb (default 64 MB).\nSupported commands: identify controller/namespace, read, write,\nwrite-zeroes, format, sanitize, flush.\n\nPhase 2 — stock nvme driver binding via memmap BAR0:\nUses boot-time reserved memory (memmap\u003dSIZE$START kernel parameter)\nto back VF BAR0 addresses with real RAM.  A polling kthread dispatches\nregister and doorbell writes from memory-mapped BAR0 to the NVMe\nemulation core.  IRQ injection uses msi_get_virq + irq_retrigger,\nwhich requires bare-metal hardware (real APIC, not hypervisor-emulated).\nThe stock nvme driver probes VFs and exposes /dev/nvmeXnY block devices.\n\nAdmin queue creation is deferred from CC.ENABLE handling to the first\ndoorbell poll, preventing a soft lockup when rebinding from\npci_sim_vfio_pci to the stock nvme driver (AQA/ASQ/ACQ not yet\nwritten to BAR0 at CC.ENABLE time).  A batch limit with cond_resched()\nguards against runaway SQ processing.\n\nCleanup ordering places pci_disable_sriov before kthread stop so the\npolling kthread can write CSTS\u003d0 to BAR0 during unbind, preventing\n10s-per-VF timeouts in the stock nvme driver\u0027s remove path.\n\nSafety:\n- check_mul_overflow/check_add_overflow in LBA range validation\n- PRP chain traversal depth limit\n- sq_depth \u003e 0 guard in submission queue processing\n- kernel_read/kernel_write return value propagation\n- Host ioctl buffer validation: cmd.data_len \u003e\u003d nlb * lba_size\n- CQ full check before posting completions\n- Host char device ioctl mutex\n- Correct pci_dev reference counting (hold ref while stored)\n- __le16 command_id in SQE struct\n- vf_index \u003e\u003d 0 guard in host driver probe\n- Doorbell value validation against queue depth\n- MQES enforcement on Create CQ/SQ (reject qsize \u003e CAP.MQES+1)\n- MDTS enforcement on I/O read/write (cap at 128KB per transfer)\n- BAR0 offset bounds check in poll kthread vf_bar0()\n- iounmap of bar0_mapped in module remove (pre-existing leak fix)\n\nCI: cyborg-tempest-pci-sim-nvme runs in non-memmap mode (Phase 1)\nfor VM compatibility — no memmap boot params, no pre-playbook.\n\nUART VF driver uses class_mask matching (0x070002, 0xff0000) so NVMe\nclass VFs never reach its probe, replacing the previous NVMe class\nreject check.\n\nDevStack: PCI_SIM_DEVICES\u003d\"nova:uart,cyborg:nvme\" creates PFs with\nper-service personality mapping.  NVMe settings (backing file path,\nnamespace size, optional memmap params) live in devstack/settings.\n\nDocs: developer-guide.rst documents both BAR0 modes, CI mode\nselection, module parameters, NVMe command support by mode, and\nexplains why alloc_pages dynamic allocation was removed.\n\nTests: Phase 1 char device, Phase 2 stock driver, driver rebind,\ncross-personality switching, filesystem (parted/mkfs/mount/blkid),\nfio data I/O, QEMU guest NVMe passthrough (6 checks).\n\nGenerated-By: Claude Opus 4.6 \u003cnoreply@anthropic.com\u003e\nChange-Id: I62cd6f519b95b484b082d75c1767be8fb127f819\nSigned-off-by: Chandan Kumar (raukadah) \u003cchkumar@redhat.com\u003e\n","web_links":[{"name":"gitea","tooltip":"Open in GitWeb","url":"https://opendev.org/openstack/cyborg/commit/2cfd91976833cd3b60ee2cfdcf66add92450fb40"}],"resolve_conflicts_web_links":[{"name":"gitea","tooltip":"Open in GitWeb","url":"https://opendev.org/openstack/cyborg/commit/2cfd91976833cd3b60ee2cfdcf66add92450fb40"}]},"branch":"refs/heads/master"},"1555efdf74d7f1de296fda792b98a89329cd90e0":{"kind":"REWORK","_number":7,"created":"2026-07-16 05:36:35.000000000","uploader":{"_account_id":12393,"name":"chandan kumar","display_name":"Chandan Kumar","email":"chkumar@redhat.com","username":"chkumar246"},"ref":"refs/changes/79/995079/7","fetch":{"anonymous http":{"url":"https://review.opendev.org/openstack/cyborg","ref":"refs/changes/79/995079/7","commands":{"Checkout":"git fetch https://review.opendev.org/openstack/cyborg refs/changes/79/995079/7 \u0026\u0026 git checkout FETCH_HEAD","Cherry Pick":"git fetch https://review.opendev.org/openstack/cyborg refs/changes/79/995079/7 \u0026\u0026 git cherry-pick FETCH_HEAD","Format Patch":"git fetch https://review.opendev.org/openstack/cyborg refs/changes/79/995079/7 \u0026\u0026 git format-patch -1 --stdout FETCH_HEAD","Pull":"git pull https://review.opendev.org/openstack/cyborg refs/changes/79/995079/7"}}},"commit":{"parents":[{"commit":"e22991aeb37f0bad0f367af64fd752a4e99654d5","subject":"Merge \"Fix microversion header parsing for service type prefix\"","web_links":[{"name":"gitea","tooltip":"Open in GitWeb","url":"https://opendev.org/openstack/cyborg/commit/e22991aeb37f0bad0f367af64fd752a4e99654d5"}]}],"author":{"name":"Chandan Kumar (raukadah)","email":"chkumar@redhat.com","date":"2026-06-25 15:05:19.000000000","tz":330},"committer":{"name":"Chandan Kumar (raukadah)","email":"chkumar@redhat.com","date":"2026-07-16 05:35:37.000000000","tz":330},"subject":"pci-sim: add NVMe 1.4 controller emulation with host visibility","message":"pci-sim: add NVMe 1.4 controller emulation with host visibility\n\nAdd NVMe emulation to pci-sim with two host-visibility modes, a\n34-test suite, DevStack multi-PF personality support, and docs.\n\nPhase 1 — char device interface:\n/dev/pci_sim_nvmeN exposes NVMe admin and I/O commands via ioctls\n(NVME_IOCTL_ADMIN_CMD, NVME_IOCTL_IO_CMD) without requiring the stock\nnvme driver.  Storage is file-backed via kernel_read/kernel_write on\nper-VF backing files, sized by nvme_ns_size_mb (default 64 MB).\nSupported commands: identify controller/namespace, read, write,\nwrite-zeroes, format, sanitize, flush.\n\nPhase 2 — stock nvme driver binding via memmap BAR0:\nUses boot-time reserved memory (memmap\u003dSIZE$START kernel parameter)\nto back VF BAR0 addresses with real RAM.  A polling kthread dispatches\nregister and doorbell writes from memory-mapped BAR0 to the NVMe\nemulation core.  IRQ injection uses msi_get_virq + irq_retrigger,\nwhich requires bare-metal hardware (real APIC, not hypervisor-emulated).\nThe stock nvme driver probes VFs and exposes /dev/nvmeXnY block devices.\n\nAdmin queue creation is deferred from CC.ENABLE handling to the first\ndoorbell poll, preventing a soft lockup when rebinding from\npci_sim_vfio_pci to the stock nvme driver (AQA/ASQ/ACQ not yet\nwritten to BAR0 at CC.ENABLE time).  A batch limit with cond_resched()\nguards against runaway SQ processing.\n\nCleanup ordering places pci_disable_sriov before kthread stop so the\npolling kthread can write CSTS\u003d0 to BAR0 during unbind, preventing\n10s-per-VF timeouts in the stock nvme driver\u0027s remove path.\n\nSafety:\n- check_mul_overflow/check_add_overflow in LBA range validation\n- PRP chain traversal depth limit\n- sq_depth \u003e 0 guard in submission queue processing\n- kernel_read/kernel_write return value propagation\n- Host ioctl buffer validation: cmd.data_len \u003e\u003d nlb * lba_size\n- CQ full check before posting completions\n- Host char device ioctl mutex\n- Correct pci_dev reference counting (hold ref while stored)\n- __le16 command_id in SQE struct\n- vf_index \u003e\u003d 0 guard in host driver probe\n- Doorbell value validation against queue depth\n- MQES enforcement on Create CQ/SQ (reject qsize \u003e CAP.MQES+1)\n- MDTS enforcement on I/O read/write (cap at 128KB per transfer)\n- BAR0 offset bounds check in poll kthread vf_bar0()\n- iounmap of bar0_mapped in module remove (pre-existing leak fix)\n\nCI: cyborg-tempest-pci-sim-nvme runs in non-memmap mode (Phase 1)\nfor VM compatibility — no memmap boot params, no pre-playbook.\n\nUART VF driver uses class_mask matching (0x070002, 0xff0000) so NVMe\nclass VFs never reach its probe, replacing the previous NVMe class\nreject check.\n\nDevStack: PCI_SIM_DEVICES\u003d\"nova:uart,cyborg:nvme\" creates PFs with\nper-service personality mapping.  NVMe settings (backing file path,\nnamespace size, optional memmap params) live in devstack/settings.\n\nDocs: developer-guide.rst documents both BAR0 modes, CI mode\nselection, module parameters, NVMe command support by mode, and\nexplains why alloc_pages dynamic allocation was removed.\n\nTests: Phase 1 char device, Phase 2 stock driver, driver rebind,\ncross-personality switching, filesystem (parted/mkfs/mount/blkid),\nfio data I/O, QEMU guest NVMe passthrough (6 checks).\n\nGenerated-By: Claude Opus 4.6 \u003cnoreply@anthropic.com\u003e\nChange-Id: I62cd6f519b95b484b082d75c1767be8fb127f819\nSigned-off-by: Chandan Kumar (raukadah) \u003cchkumar@redhat.com\u003e\n","web_links":[{"name":"gitea","tooltip":"Open in GitWeb","url":"https://opendev.org/openstack/cyborg/commit/1555efdf74d7f1de296fda792b98a89329cd90e0"}],"resolve_conflicts_web_links":[{"name":"gitea","tooltip":"Open in GitWeb","url":"https://opendev.org/openstack/cyborg/commit/1555efdf74d7f1de296fda792b98a89329cd90e0"}]},"branch":"refs/heads/master"},"26a206eb7adc9027ea255dee87faec038802b0c9":{"kind":"REWORK","_number":8,"created":"2026-07-29 13:06:32.000000000","uploader":{"_account_id":12393,"name":"chandan kumar","display_name":"Chandan Kumar","email":"chkumar@redhat.com","username":"chkumar246"},"ref":"refs/changes/79/995079/8","fetch":{"anonymous http":{"url":"https://review.opendev.org/openstack/cyborg","ref":"refs/changes/79/995079/8","commands":{"Checkout":"git fetch https://review.opendev.org/openstack/cyborg refs/changes/79/995079/8 \u0026\u0026 git checkout FETCH_HEAD","Cherry Pick":"git fetch https://review.opendev.org/openstack/cyborg refs/changes/79/995079/8 \u0026\u0026 git cherry-pick FETCH_HEAD","Format Patch":"git fetch https://review.opendev.org/openstack/cyborg refs/changes/79/995079/8 \u0026\u0026 git format-patch -1 --stdout FETCH_HEAD","Pull":"git pull https://review.opendev.org/openstack/cyborg refs/changes/79/995079/8"}}},"commit":{"parents":[{"commit":"8ac5a938c87c39b58f4664235f20365da075b5e6","subject":"Add per-PF vf_personality sysfs interface","web_links":[{"name":"gitea","tooltip":"Open in GitWeb","url":"https://opendev.org/openstack/cyborg/commit/8ac5a938c87c39b58f4664235f20365da075b5e6"}]}],"author":{"name":"Chandan Kumar (raukadah)","email":"chkumar@redhat.com","date":"2026-06-25 15:05:19.000000000","tz":330},"committer":{"name":"Chandan Kumar (raukadah)","email":"chkumar@redhat.com","date":"2026-07-29 13:06:02.000000000","tz":330},"subject":"pci-sim: add NVMe 1.4 controller emulation with host visibility","message":"pci-sim: add NVMe 1.4 controller emulation with host visibility\n\nAdd NVMe emulation to pci-sim with two host-visibility modes, a\n34-test suite, DevStack multi-PF personality support, and docs.\n\nPhase 1 — char device interface:\n/dev/pci_sim_nvmeN exposes NVMe admin and I/O commands via ioctls\n(NVME_IOCTL_ADMIN_CMD, NVME_IOCTL_IO_CMD) without requiring the stock\nnvme driver.  Storage is file-backed via kernel_read/kernel_write on\nper-VF backing files, sized by nvme_ns_size_mb (default 64 MB).\nSupported commands: identify controller/namespace, read, write,\nwrite-zeroes, format, sanitize, flush.\n\nPhase 2 — stock nvme driver binding via memmap BAR0:\nUses boot-time reserved memory (memmap\u003dSIZE$START kernel parameter)\nto back VF BAR0 addresses with real RAM.  A polling kthread dispatches\nregister and doorbell writes from memory-mapped BAR0 to the NVMe\nemulation core.  IRQ injection uses msi_get_virq + irq_retrigger,\nwhich requires bare-metal hardware (real APIC, not hypervisor-emulated).\nThe stock nvme driver probes VFs and exposes /dev/nvmeXnY block devices.\n\nAdmin queue creation is deferred from CC.ENABLE handling to the first\ndoorbell poll, preventing a soft lockup when rebinding from\npci_sim_vfio_pci to the stock nvme driver (AQA/ASQ/ACQ not yet\nwritten to BAR0 at CC.ENABLE time).  A batch limit with cond_resched()\nguards against runaway SQ processing.\n\nCleanup ordering places pci_disable_sriov before kthread stop so the\npolling kthread can write CSTS\u003d0 to BAR0 during unbind, preventing\n10s-per-VF timeouts in the stock nvme driver\u0027s remove path.\n\nSafety:\n- check_mul_overflow/check_add_overflow in LBA range validation\n- PRP chain traversal depth limit\n- sq_depth \u003e 0 guard in submission queue processing\n- kernel_read/kernel_write return value propagation\n- Host ioctl buffer validation: cmd.data_len \u003e\u003d nlb * lba_size\n- CQ full check before posting completions\n- Host char device ioctl mutex\n- Correct pci_dev reference counting (hold ref while stored)\n- __le16 command_id in SQE struct\n- vf_index \u003e\u003d 0 guard in host driver probe\n- Doorbell value validation against queue depth\n- MQES enforcement on Create CQ/SQ (reject qsize \u003e CAP.MQES+1)\n- MDTS enforcement on I/O read/write (cap at 128KB per transfer)\n- BAR0 offset bounds check in poll kthread vf_bar0()\n- iounmap of bar0_mapped in module remove (pre-existing leak fix)\n\nCI: cyborg-tempest-pci-sim-nvme runs in non-memmap mode (Phase 1)\nfor VM compatibility — no memmap boot params, no pre-playbook.\n\nUART VF driver uses class_mask matching (0x070002, 0xff0000) so NVMe\nclass VFs never reach its probe, replacing the previous NVMe class\nreject check.\n\nIntegrate NVMe with the vf_personality sysfs framework from the\npreceding per-PF personality patch:\n- Delete the independent enum pci_sim_personality; add\n  PCI_SIM_VF_PERS_NVME to the existing pci_sim_vf_personality enum\n  and personality_names table.\n- Remove the duplicate vf_personality sysfs implementation; reuse the\n  table-driven show/store and dev_groups lifecycle from the\n  vf_personality patch.\n- Allow sriov_configure for both uart and nvme personalities (reject\n  only mdev).\n- DevStack: add pci_sim_compute_pf_modes, pci_sim_pf_mode, and\n  pci_sim_configure_personalities helpers; unify PCI_SIM_DEVICES\n  parsing with PCI_SIM_PF_MODE_LIST/PCI_SIM_ENABLE_MDEV fallback;\n  allow NVMe PFs through VF creation and target collection.\n\nDevStack: PCI_SIM_DEVICES\u003d\"nova:uart,cyborg:nvme\" creates PFs with\nper-service personality mapping.  NVMe settings (backing file path,\nnamespace size, optional memmap params) live in devstack/settings.\n\nDocs: developer-guide.rst documents both BAR0 modes, CI mode\nselection, module parameters, NVMe command support by mode, and\nexplains why alloc_pages dynamic allocation was removed.\n\nTests: Phase 1 char device, Phase 2 stock driver, driver rebind,\ncross-personality switching, filesystem (parted/mkfs/mount/blkid),\nfio data I/O, QEMU guest NVMe passthrough (6 checks).\n\nGenerated-By: Claude Opus 4.6\nChange-Id: I62cd6f519b95b484b082d75c1767be8fb127f819\nSigned-off-by: Chandan Kumar (raukadah) \u003cchkumar@redhat.com\u003e\n","web_links":[{"name":"gitea","tooltip":"Open in GitWeb","url":"https://opendev.org/openstack/cyborg/commit/26a206eb7adc9027ea255dee87faec038802b0c9"}],"resolve_conflicts_web_links":[{"name":"gitea","tooltip":"Open in GitWeb","url":"https://opendev.org/openstack/cyborg/commit/26a206eb7adc9027ea255dee87faec038802b0c9"}]},"branch":"refs/heads/master"},"7462c054576e0cfc9f589d685fbb5226a160476a":{"kind":"TRIVIAL_REBASE","_number":9,"created":"2026-07-29 13:07:15.000000000","uploader":{"_account_id":12393,"name":"chandan kumar","display_name":"Chandan Kumar","email":"chkumar@redhat.com","username":"chkumar246"},"ref":"refs/changes/79/995079/9","fetch":{"anonymous http":{"url":"https://review.opendev.org/openstack/cyborg","ref":"refs/changes/79/995079/9","commands":{"Checkout":"git fetch https://review.opendev.org/openstack/cyborg refs/changes/79/995079/9 \u0026\u0026 git checkout FETCH_HEAD","Cherry Pick":"git fetch https://review.opendev.org/openstack/cyborg refs/changes/79/995079/9 \u0026\u0026 git cherry-pick FETCH_HEAD","Format Patch":"git fetch https://review.opendev.org/openstack/cyborg refs/changes/79/995079/9 \u0026\u0026 git format-patch -1 --stdout FETCH_HEAD","Pull":"git pull https://review.opendev.org/openstack/cyborg refs/changes/79/995079/9"}}},"commit":{"parents":[{"commit":"734e2cd8b07bf5978c9aa8dd13b0d73d790d9754","subject":"Add per-PF vf_personality sysfs interface","web_links":[{"name":"gitea","tooltip":"Open in GitWeb","url":"https://opendev.org/openstack/cyborg/commit/734e2cd8b07bf5978c9aa8dd13b0d73d790d9754"}]}],"author":{"name":"Chandan Kumar (raukadah)","email":"chkumar@redhat.com","date":"2026-06-25 15:05:19.000000000","tz":330},"committer":{"name":"chandan kumar","email":"chkumar@redhat.com","date":"2026-07-29 13:07:15.000000000","tz":0},"subject":"pci-sim: add NVMe 1.4 controller emulation with host visibility","message":"pci-sim: add NVMe 1.4 controller emulation with host visibility\n\nAdd NVMe emulation to pci-sim with two host-visibility modes, a\n34-test suite, DevStack multi-PF personality support, and docs.\n\nPhase 1 — char device interface:\n/dev/pci_sim_nvmeN exposes NVMe admin and I/O commands via ioctls\n(NVME_IOCTL_ADMIN_CMD, NVME_IOCTL_IO_CMD) without requiring the stock\nnvme driver.  Storage is file-backed via kernel_read/kernel_write on\nper-VF backing files, sized by nvme_ns_size_mb (default 64 MB).\nSupported commands: identify controller/namespace, read, write,\nwrite-zeroes, format, sanitize, flush.\n\nPhase 2 — stock nvme driver binding via memmap BAR0:\nUses boot-time reserved memory (memmap\u003dSIZE$START kernel parameter)\nto back VF BAR0 addresses with real RAM.  A polling kthread dispatches\nregister and doorbell writes from memory-mapped BAR0 to the NVMe\nemulation core.  IRQ injection uses msi_get_virq + irq_retrigger,\nwhich requires bare-metal hardware (real APIC, not hypervisor-emulated).\nThe stock nvme driver probes VFs and exposes /dev/nvmeXnY block devices.\n\nAdmin queue creation is deferred from CC.ENABLE handling to the first\ndoorbell poll, preventing a soft lockup when rebinding from\npci_sim_vfio_pci to the stock nvme driver (AQA/ASQ/ACQ not yet\nwritten to BAR0 at CC.ENABLE time).  A batch limit with cond_resched()\nguards against runaway SQ processing.\n\nCleanup ordering places pci_disable_sriov before kthread stop so the\npolling kthread can write CSTS\u003d0 to BAR0 during unbind, preventing\n10s-per-VF timeouts in the stock nvme driver\u0027s remove path.\n\nSafety:\n- check_mul_overflow/check_add_overflow in LBA range validation\n- PRP chain traversal depth limit\n- sq_depth \u003e 0 guard in submission queue processing\n- kernel_read/kernel_write return value propagation\n- Host ioctl buffer validation: cmd.data_len \u003e\u003d nlb * lba_size\n- CQ full check before posting completions\n- Host char device ioctl mutex\n- Correct pci_dev reference counting (hold ref while stored)\n- __le16 command_id in SQE struct\n- vf_index \u003e\u003d 0 guard in host driver probe\n- Doorbell value validation against queue depth\n- MQES enforcement on Create CQ/SQ (reject qsize \u003e CAP.MQES+1)\n- MDTS enforcement on I/O read/write (cap at 128KB per transfer)\n- BAR0 offset bounds check in poll kthread vf_bar0()\n- iounmap of bar0_mapped in module remove (pre-existing leak fix)\n\nCI: cyborg-tempest-pci-sim-nvme runs in non-memmap mode (Phase 1)\nfor VM compatibility — no memmap boot params, no pre-playbook.\n\nUART VF driver uses class_mask matching (0x070002, 0xff0000) so NVMe\nclass VFs never reach its probe, replacing the previous NVMe class\nreject check.\n\nIntegrate NVMe with the vf_personality sysfs framework from the\npreceding per-PF personality patch:\n- Delete the independent enum pci_sim_personality; add\n  PCI_SIM_VF_PERS_NVME to the existing pci_sim_vf_personality enum\n  and personality_names table.\n- Remove the duplicate vf_personality sysfs implementation; reuse the\n  table-driven show/store and dev_groups lifecycle from the\n  vf_personality patch.\n- Allow sriov_configure for both uart and nvme personalities (reject\n  only mdev).\n- DevStack: add pci_sim_compute_pf_modes, pci_sim_pf_mode, and\n  pci_sim_configure_personalities helpers; unify PCI_SIM_DEVICES\n  parsing with PCI_SIM_PF_MODE_LIST/PCI_SIM_ENABLE_MDEV fallback;\n  allow NVMe PFs through VF creation and target collection.\n\nDevStack: PCI_SIM_DEVICES\u003d\"nova:uart,cyborg:nvme\" creates PFs with\nper-service personality mapping.  NVMe settings (backing file path,\nnamespace size, optional memmap params) live in devstack/settings.\n\nDocs: developer-guide.rst documents both BAR0 modes, CI mode\nselection, module parameters, NVMe command support by mode, and\nexplains why alloc_pages dynamic allocation was removed.\n\nTests: Phase 1 char device, Phase 2 stock driver, driver rebind,\ncross-personality switching, filesystem (parted/mkfs/mount/blkid),\nfio data I/O, QEMU guest NVMe passthrough (6 checks).\n\nGenerated-By: Claude Opus 4.6\nChange-Id: I62cd6f519b95b484b082d75c1767be8fb127f819\nSigned-off-by: Chandan Kumar (raukadah) \u003cchkumar@redhat.com\u003e\n","web_links":[{"name":"gitea","tooltip":"Open in GitWeb","url":"https://opendev.org/openstack/cyborg/commit/7462c054576e0cfc9f589d685fbb5226a160476a"}],"resolve_conflicts_web_links":[{"name":"gitea","tooltip":"Open in GitWeb","url":"https://opendev.org/openstack/cyborg/commit/7462c054576e0cfc9f589d685fbb5226a160476a"}]},"branch":"refs/heads/master","description":"Rebase","conflicts":{"base":"8ac5a938c87c39b58f4664235f20365da075b5e6","ours":"26a206eb7adc9027ea255dee87faec038802b0c9","theirs":"734e2cd8b07bf5978c9aa8dd13b0d73d790d9754","merge_strategy":"recursive","contains_conflicts":false}},"d79c18ecd640addc2ef82911cb19c0fdf565c01d":{"kind":"REWORK","_number":10,"created":"2026-07-29 14:36:10.000000000","uploader":{"_account_id":12393,"name":"chandan kumar","display_name":"Chandan Kumar","email":"chkumar@redhat.com","username":"chkumar246"},"ref":"refs/changes/79/995079/10","fetch":{"anonymous http":{"url":"https://review.opendev.org/openstack/cyborg","ref":"refs/changes/79/995079/10","commands":{"Checkout":"git fetch https://review.opendev.org/openstack/cyborg refs/changes/79/995079/10 \u0026\u0026 git checkout FETCH_HEAD","Cherry Pick":"git fetch https://review.opendev.org/openstack/cyborg refs/changes/79/995079/10 \u0026\u0026 git cherry-pick FETCH_HEAD","Format Patch":"git fetch https://review.opendev.org/openstack/cyborg refs/changes/79/995079/10 \u0026\u0026 git format-patch -1 --stdout FETCH_HEAD","Pull":"git pull https://review.opendev.org/openstack/cyborg refs/changes/79/995079/10"}}},"commit":{"parents":[{"commit":"734e2cd8b07bf5978c9aa8dd13b0d73d790d9754","subject":"Add per-PF vf_personality sysfs interface","web_links":[{"name":"gitea","tooltip":"Open in GitWeb","url":"https://opendev.org/openstack/cyborg/commit/734e2cd8b07bf5978c9aa8dd13b0d73d790d9754"}]}],"author":{"name":"Chandan Kumar (raukadah)","email":"chkumar@redhat.com","date":"2026-06-25 15:05:19.000000000","tz":330},"committer":{"name":"Chandan Kumar (raukadah)","email":"chkumar@redhat.com","date":"2026-07-29 14:35:00.000000000","tz":330},"subject":"pci-sim: add NVMe 1.4 controller emulation with host visibility","message":"pci-sim: add NVMe 1.4 controller emulation with host visibility\n\nAdd NVMe emulation to pci-sim with two host-visibility modes, a\n34-test suite, DevStack multi-PF personality support, and docs.\n\nPhase 1 — char device interface:\n/dev/pci_sim_nvmeN exposes NVMe admin and I/O commands via ioctls\n(NVME_IOCTL_ADMIN_CMD, NVME_IOCTL_IO_CMD) without requiring the stock\nnvme driver.  Storage is file-backed via kernel_read/kernel_write on\nper-VF backing files, sized by nvme_ns_size_mb (default 64 MB).\nSupported commands: identify controller/namespace, read, write,\nwrite-zeroes, format, sanitize, flush.\n\nPhase 2 — stock nvme driver binding via memmap BAR0:\nUses boot-time reserved memory (memmap\u003dSIZE$START kernel parameter)\nto back VF BAR0 addresses with real RAM.  A polling kthread dispatches\nregister and doorbell writes from memory-mapped BAR0 to the NVMe\nemulation core.  IRQ injection uses msi_get_virq + irq_retrigger,\nwhich requires bare-metal hardware (real APIC, not hypervisor-emulated).\nThe stock nvme driver probes VFs and exposes /dev/nvmeXnY block devices.\n\nAdmin queue creation is deferred from CC.ENABLE handling to the first\ndoorbell poll, preventing a soft lockup when rebinding from\npci_sim_vfio_pci to the stock nvme driver (AQA/ASQ/ACQ not yet\nwritten to BAR0 at CC.ENABLE time).  A batch limit with cond_resched()\nguards against runaway SQ processing.\n\nCleanup ordering places pci_disable_sriov before kthread stop so the\npolling kthread can write CSTS\u003d0 to BAR0 during unbind, preventing\n10s-per-VF timeouts in the stock nvme driver\u0027s remove path.\n\nSafety:\n- check_mul_overflow/check_add_overflow in LBA range validation\n- PRP chain traversal depth limit\n- sq_depth \u003e 0 guard in submission queue processing\n- kernel_read/kernel_write return value propagation\n- Host ioctl buffer validation: cmd.data_len \u003e\u003d nlb * lba_size\n- CQ full check before posting completions\n- Host char device ioctl mutex\n- Correct pci_dev reference counting (hold ref while stored)\n- __le16 command_id in SQE struct\n- vf_index \u003e\u003d 0 guard in host driver probe\n- Doorbell value validation against queue depth\n- MQES enforcement on Create CQ/SQ (reject qsize \u003e CAP.MQES+1)\n- MDTS enforcement on I/O read/write (cap at 128KB per transfer)\n- BAR0 offset bounds check in poll kthread vf_bar0()\n- iounmap of bar0_mapped in module remove (pre-existing leak fix)\n\nCI: cyborg-tempest-pci-sim-nvme runs in non-memmap mode (Phase 1)\nfor VM compatibility — no memmap boot params, no pre-playbook.\n\nUART VF driver uses class_mask matching (0x070002, 0xff0000) so NVMe\nclass VFs never reach its probe, replacing the previous NVMe class\nreject check.\n\nIntegrate NVMe with the vf_personality sysfs framework from the\npreceding per-PF personality patch:\n- Delete the independent enum pci_sim_personality; add\n  PCI_SIM_VF_PERS_NVME to the existing pci_sim_vf_personality enum\n  and personality_names table.\n- Remove the duplicate vf_personality sysfs implementation; reuse the\n  table-driven show/store and dev_groups lifecycle from the\n  vf_personality patch.\n- Allow sriov_configure for both uart and nvme personalities (reject\n  only mdev).\n- DevStack: add pci_sim_compute_pf_modes, pci_sim_pf_mode, and\n  pci_sim_configure_personalities helpers; unify PCI_SIM_DEVICES\n  parsing with PCI_SIM_PF_MODE_LIST/PCI_SIM_ENABLE_MDEV fallback;\n  allow NVMe PFs through VF creation and target collection.\n\nDevStack: PCI_SIM_DEVICES\u003d\"nova:uart,cyborg:nvme\" creates PFs with\nper-service personality mapping.  NVMe settings (backing file path,\nnamespace size, optional memmap params) live in devstack/settings.\n\nDocs: developer-guide.rst documents both BAR0 modes, CI mode\nselection, module parameters, NVMe command support by mode, and\nexplains why alloc_pages dynamic allocation was removed.\n\nTests: Phase 1 char device, Phase 2 stock driver, driver rebind,\ncross-personality switching, filesystem (parted/mkfs/mount/blkid),\nfio data I/O, QEMU guest NVMe passthrough (6 checks).\n\nGenerated-By: Claude Opus 4.6\nChange-Id: I62cd6f519b95b484b082d75c1767be8fb127f819\nSigned-off-by: Chandan Kumar (raukadah) \u003cchkumar@redhat.com\u003e\n","web_links":[{"name":"gitea","tooltip":"Open in GitWeb","url":"https://opendev.org/openstack/cyborg/commit/d79c18ecd640addc2ef82911cb19c0fdf565c01d"}],"resolve_conflicts_web_links":[{"name":"gitea","tooltip":"Open in GitWeb","url":"https://opendev.org/openstack/cyborg/commit/d79c18ecd640addc2ef82911cb19c0fdf565c01d"}]},"branch":"refs/heads/master"},"ba69092c9baf614c715ac7f3fc9eeaf1dc9067e0":{"kind":"REWORK","_number":11,"created":"2026-07-30 07:19:42.000000000","uploader":{"_account_id":12393,"name":"chandan kumar","display_name":"Chandan Kumar","email":"chkumar@redhat.com","username":"chkumar246"},"ref":"refs/changes/79/995079/11","fetch":{"anonymous http":{"url":"https://review.opendev.org/openstack/cyborg","ref":"refs/changes/79/995079/11","commands":{"Checkout":"git fetch https://review.opendev.org/openstack/cyborg refs/changes/79/995079/11 \u0026\u0026 git checkout FETCH_HEAD","Cherry Pick":"git fetch https://review.opendev.org/openstack/cyborg refs/changes/79/995079/11 \u0026\u0026 git cherry-pick FETCH_HEAD","Format Patch":"git fetch https://review.opendev.org/openstack/cyborg refs/changes/79/995079/11 \u0026\u0026 git format-patch -1 --stdout FETCH_HEAD","Pull":"git pull https://review.opendev.org/openstack/cyborg refs/changes/79/995079/11"}}},"commit":{"parents":[{"commit":"6e8b7a58a9c090fd90401d10b165d8fc975ef021","subject":"pci-sim: introduce personality ops-table dispatch for VF device types","web_links":[{"name":"gitea","tooltip":"Open in GitWeb","url":"https://opendev.org/openstack/cyborg/commit/6e8b7a58a9c090fd90401d10b165d8fc975ef021"}]}],"author":{"name":"Chandan Kumar (raukadah)","email":"chkumar@redhat.com","date":"2026-06-25 15:05:19.000000000","tz":330},"committer":{"name":"Chandan Kumar (raukadah)","email":"chkumar@redhat.com","date":"2026-07-30 07:12:42.000000000","tz":330},"subject":"pci-sim: add NVMe 1.4 controller ops-table personality","message":"pci-sim: add NVMe 1.4 controller ops-table personality\n\nThe pci-sim module only emulates UART (16550) devices, which limits\nCI coverage to serial-class accelerators.  OpenStack Cyborg\u0027s NVMe\naccelerator management path has no way to exercise device assignment\nend-to-end without real hardware.\n\nRegister an NVMe personality in the ops-table dispatch framework\nintroduced by the previous commit.  The new pci_sim_nvme_ops\nstructure implements bar_rw, vfio_open, vfio_close, init_vf_config,\nand get_bar_info callbacks, making the NVMe emulation core available\nto the generic VFIO layer without any personality-specific code in\nfake_pci_sriov_vfio.c.\n\nThe NVMe controller emulates NVMe 1.4 with file-backed storage\n(kernel_read/kernel_write on per-VF backing files, sized by\nnvme_ns_size_mb).  Supported admin commands: Identify\nController/Namespace, Create/Delete IO CQ/SQ, Set/Get Features,\nGet Log Page, Format NVM, and Sanitize.  Supported I/O commands:\nRead, Write, Write Zeroes, and Flush.  VF config space advertises\nPCI class 0x010802 (NVMe) with an MSI-X capability (33 vectors:\n1 admin + 32 I/O queues).\n\nTwo host-visibility modes are provided:\n\nPhase 1 -- char device interface:\n/dev/pci_sim_nvmeN exposes NVMe admin and I/O commands via ioctls\n(NVME_IOCTL_ADMIN_CMD, NVME_IOCTL_IO_CMD) without requiring the\nstock nvme driver.  A dedicated PCI driver\n(pci_sim_nvme_host_driver) probes NVMe-class VFs and registers a\ncharacter device per function.\n\nPhase 2 -- stock nvme driver binding via memmap BAR0:\nWhen nvme_memmap_start and nvme_memmap_size module parameters point\nto boot-time reserved memory (memmap\u003dSIZE$START), VF BAR0 addresses\nare backed by real RAM.  A polling kthread dispatches register and\ndoorbell writes from memory-mapped BAR0 to the NVMe emulation core.\nIRQ injection uses msi_get_virq + irq_retrigger (requires bare\nmetal, not hypervisor-emulated APIC).  The stock nvme driver probes\nVFs and exposes /dev/nvmeXnY block devices.\n\nAdmin queue creation is deferred from CC.ENABLE to the first\ndoorbell poll to prevent a soft lockup when rebinding from\npci_sim_vfio_pci to the stock nvme driver, because AQA/ASQ/ACQ\nare not yet written to BAR0 at CC.ENABLE time.\n\nIntegration with existing code:\n\n- fake_pci_sriov_cfg.c: BAR size is now personality-driven via\n  get_bar_info() instead of the hardcoded BAR0_SIZE constant.\n  init_msix_capability() is added for NVMe VF config space.  The\n  sriov_configure path handles poll kthread lifecycle.\n- fake_pci_sriov_core.c: NVMe module parameters (nvme_ns_size_mb,\n  nvme_backing_file, nvme_memmap_start, nvme_memmap_size) are\n  defined.  Module init/exit registers the NVMe host char device\n  driver and ioremaps the memmap region when configured.\n- fake_pci_sriov_uart.c: VF id_table switches to class_mask\n  matching (serial 0x070002 and vendor 0xff0000) so NVMe-class VFs\n  are not claimed by the UART driver.\n- fake_pci_sriov.h: NVMe class constant, BAR0 size, MSI-X cap\n  offset, Phase 2 host fields (bar0_mapped, nvme_state, poll\n  kthread), and NVMe module param externs are declared.\n\nDevStack: PCI_SIM_DEVICES\u003d\"nova:uart,cyborg:nvme\" creates PFs with\nper-service personality mapping.\n\nCI: cyborg-tempest-pci-sim-nvme Zuul job runs in Phase 1 (char\ndevice) mode for VM compatibility.\n\nGenerated-By: Claude Opus 4.6\nChange-Id: I62cd6f519b95b484b082d75c1767be8fb127f819\nSigned-off-by: Chandan Kumar (raukadah) \u003cchkumar@redhat.com\u003e\n","web_links":[{"name":"gitea","tooltip":"Open in GitWeb","url":"https://opendev.org/openstack/cyborg/commit/ba69092c9baf614c715ac7f3fc9eeaf1dc9067e0"}],"resolve_conflicts_web_links":[{"name":"gitea","tooltip":"Open in GitWeb","url":"https://opendev.org/openstack/cyborg/commit/ba69092c9baf614c715ac7f3fc9eeaf1dc9067e0"}]},"branch":"refs/heads/master"},"ea8379b6744630416eb2101bd4411231604a3646":{"kind":"REWORK","_number":12,"created":"2026-07-30 13:18:18.000000000","uploader":{"_account_id":12393,"name":"chandan kumar","display_name":"Chandan Kumar","email":"chkumar@redhat.com","username":"chkumar246"},"ref":"refs/changes/79/995079/12","fetch":{"anonymous http":{"url":"https://review.opendev.org/openstack/cyborg","ref":"refs/changes/79/995079/12","commands":{"Checkout":"git fetch https://review.opendev.org/openstack/cyborg refs/changes/79/995079/12 \u0026\u0026 git checkout FETCH_HEAD","Cherry Pick":"git fetch https://review.opendev.org/openstack/cyborg refs/changes/79/995079/12 \u0026\u0026 git cherry-pick FETCH_HEAD","Format Patch":"git fetch https://review.opendev.org/openstack/cyborg refs/changes/79/995079/12 \u0026\u0026 git format-patch -1 --stdout FETCH_HEAD","Pull":"git pull https://review.opendev.org/openstack/cyborg refs/changes/79/995079/12"}}},"commit":{"parents":[{"commit":"36ebf901a01c0fda0f373012ac51c55b0719660e","subject":"pci-sim: introduce personality ops-table dispatch for VF device types","web_links":[{"name":"gitea","tooltip":"Open in GitWeb","url":"https://opendev.org/openstack/cyborg/commit/36ebf901a01c0fda0f373012ac51c55b0719660e"}]}],"author":{"name":"Chandan Kumar (raukadah)","email":"chkumar@redhat.com","date":"2026-06-25 15:05:19.000000000","tz":330},"committer":{"name":"Chandan Kumar (raukadah)","email":"chkumar@redhat.com","date":"2026-07-30 13:15:48.000000000","tz":330},"subject":"pci-sim: add NVMe 1.4 controller ops-table personality","message":"pci-sim: add NVMe 1.4 controller ops-table personality\n\nAdd an NVMe personality to pci-sim that presents fake NVMe 1.4\ncontrollers as SR-IOV VFs.  All NVMe-specific state lives behind an\nopaque host_data pointer; the generic framework never references NVMe\ntypes or headers.\n\nWhat this adds:\n\n  Kernel module (3 new source files, ~2400 LOC):\n  - NVMe controller emulator with admin commands (Identify, Get/Set\n    Features, Get Log Page, Format NVM, Sanitize, Write Zeroes) and\n    namespace I/O backed by kernel_read/kernel_write on a per-VF file\n  - Host char device driver (/dev/pci_sim_nvmeN) for NVMe ioctls\n    when stock nvme driver cannot bind (no memmap\u003d reserved memory)\n  - Polling kthread for BAR0 doorbell/register monitoring when\n    boot-reserved memory backs VF BAR0 regions\n  - VFIO BAR0 emulation for QEMU guest assignment (NVMe 1.4\n    controller visible as /dev/nvme0n1 in guest)\n\n  Ops-table integration:\n  - Four new personality callbacks: host_init, host_fini,\n    sriov_enable, sriov_disable\n  - Per-PF opaque state via void *host_data in fake_pci_host\n  - init_msix_capability private to nvme.c\n  - NULL guards in BAR write path for UNSET personality\n  - Shared header free of NVMe includes\n\n  Framework changes:\n  - PFs start with personality \"unset\" (no default_personality param)\n  - vf_personality_store calls host_init/host_fini on switch\n  - sriov_configure dispatches through sriov_enable/sriov_disable\n  - DevStack plugin writes vf_personality for all personality types\n  - init_pf_config_space keeps its original single-param signature\n\n  Distinct VF device IDs per personality:\n  - UART VFs use device ID 0x1001, NVMe VFs use 0x1002\n  - Post-pci_enable_sriov() override loop sets pci_dev-\u003edevice to\n    the personality\u0027s device_id when it differs from the default\n  - vf_personality_store writes personality device_id to SR-IOV\n    VF_DID config-space field\n  - VFIO and NVMe host driver ID tables include both device IDs\n  - DevStack Nova config reads product_id from sysfs per-VF\n  - DevStack Cyborg device profile reads product_id from first VF\n\n  Test and CI:\n  - test_pci_sim_nvme_host.sh (Phase 1 char device + Phase 2 memmap)\n  - run_nvme_vfio_guest_probe.sh/py (QEMU guest NVMe verification)\n  - run-devstack-nvme-passthrough-test.sh (Nova/Cyborg end-to-end)\n  - Zuul job definition for NVMe passthrough CI gate\n  - Developer guide updated with NVMe BAR0 modes, command matrix,\n    host_data pattern, and lifecycle callback documentation\n\nGenerated-By: Claude Opus 4.6\nChange-Id: I62cd6f519b95b484b082d75c1767be8fb127f819\nSigned-off-by: Chandan Kumar (raukadah) \u003cchkumar@redhat.com\u003e\n","web_links":[{"name":"gitea","tooltip":"Open in GitWeb","url":"https://opendev.org/openstack/cyborg/commit/ea8379b6744630416eb2101bd4411231604a3646"}],"resolve_conflicts_web_links":[{"name":"gitea","tooltip":"Open in GitWeb","url":"https://opendev.org/openstack/cyborg/commit/ea8379b6744630416eb2101bd4411231604a3646"}]},"branch":"refs/heads/master"}},"requirements":[],"submit_records":[{"rule_name":"gerrit~DefaultSubmitRule","status":"OK","labels":[{"label":"Verified","status":"MAY","applied_by":{"_account_id":22348,"name":"Zuul","username":"zuul","tags":["SERVICE_USER"]}},{"label":"Code-Review","status":"MAY"},{"label":"Workflow","status":"MAY"}]}],"submit_requirements":[{"name":"Verified","description":"Verified in gate by CI","status":"UNSATISFIED","is_legacy":false,"submittability_expression_result":{"expression":"label:Verified\u003dMAX AND -label:Verified\u003dMIN","fulfilled":false,"status":"FAIL","passing_atoms":[],"failing_atoms":["label:Verified\u003dMAX","label:Verified\u003dMIN"],"atom_explanations":{"label:Verified\u003dMAX":"","label:Verified\u003dMIN":""}}},{"name":"Code-Review","description":"Code reviewed by core reviewer","status":"UNSATISFIED","is_legacy":false,"submittability_expression_result":{"expression":"label:Code-Review\u003dMAX AND -label:Code-Review\u003dMIN","fulfilled":false,"status":"FAIL","passing_atoms":[],"failing_atoms":["label:Code-Review\u003dMAX","label:Code-Review\u003dMIN"],"atom_explanations":{"label:Code-Review\u003dMAX":"","label:Code-Review\u003dMIN":""}}},{"name":"Workflow","description":"Approved for gate by core reviewer","status":"UNSATISFIED","is_legacy":false,"submittability_expression_result":{"expression":"label:Workflow\u003dMAX AND -label:Workflow\u003dMIN","fulfilled":false,"status":"FAIL","passing_atoms":[],"failing_atoms":["label:Workflow\u003dMAX","label:Workflow\u003dMIN"],"atom_explanations":{"label:Workflow\u003dMAX":"","label:Workflow\u003dMIN":""}}}]}