)]}'
{"specs/newton/approved/expose-guest-cpu-instruction-set-extensions.rst":[{"author":{"_account_id":6062,"name":"jichenjc","email":"jichenjc@cn.ibm.com","username":"jichenjc"},"change_message_id":"91102b464f4735510354d002329e8cc771b24b83","unresolved":false,"context_lines":[{"line_number":35,"context_line":"Use Cases"},{"line_number":36,"context_line":"----------"},{"line_number":37,"context_line":""},{"line_number":38,"context_line":"* Image provider want to specify the a list of CPU instruction set extensions"},{"line_number":39,"context_line":"  which required by image."},{"line_number":40,"context_line":""},{"line_number":41,"context_line":"* Administrator want to limit the CPU instruction set extensions which allowed"}],"source_content_type":"text/x-rst","patch_set":1,"id":"9a061dce_e171900d","line":38,"range":{"start_line":38,"start_character":33,"end_line":38,"end_character":36},"updated":"2016-04-07 13:14:03.000000000","message":"a list","commit_id":"76c6f3b9294d51cf38f5d08185ad41d8107818c5"},{"author":{"_account_id":5754,"name":"Alex Xu","email":"hejie.xu@intel.com","username":"xuhj"},"change_message_id":"cc18f137e250685b8205afb57ad3ca83fa1ac807","unresolved":false,"context_lines":[{"line_number":35,"context_line":"Use Cases"},{"line_number":36,"context_line":"----------"},{"line_number":37,"context_line":""},{"line_number":38,"context_line":"* Image provider want to specify the a list of CPU instruction set extensions"},{"line_number":39,"context_line":"  which required by image."},{"line_number":40,"context_line":""},{"line_number":41,"context_line":"* Administrator want to limit the CPU instruction set extensions which allowed"}],"source_content_type":"text/x-rst","patch_set":1,"id":"5a18252c_723a31cf","line":38,"range":{"start_line":38,"start_character":33,"end_line":38,"end_character":36},"in_reply_to":"9a061dce_e171900d","updated":"2016-04-12 06:46:27.000000000","message":"Done","commit_id":"76c6f3b9294d51cf38f5d08185ad41d8107818c5"},{"author":{"_account_id":6062,"name":"jichenjc","email":"jichenjc@cn.ibm.com","username":"jichenjc"},"change_message_id":"91102b464f4735510354d002329e8cc771b24b83","unresolved":false,"context_lines":[{"line_number":81,"context_line":"-----------------"},{"line_number":82,"context_line":""},{"line_number":83,"context_line":"New field ``hw_guest_cpu_instruction_set_extensions`` will be added to"},{"line_number":84,"context_line":"``HostCapabilities`` object."},{"line_number":85,"context_line":""},{"line_number":86,"context_line":"REST API impact"},{"line_number":87,"context_line":"---------------"}],"source_content_type":"text/x-rst","patch_set":1,"id":"9a061dce_64f58eeb","line":84,"range":{"start_line":84,"start_character":27,"end_line":84,"end_character":28},"updated":"2016-04-07 13:14:03.000000000","message":"maybe you can specify the type of this field","commit_id":"76c6f3b9294d51cf38f5d08185ad41d8107818c5"},{"author":{"_account_id":5754,"name":"Alex Xu","email":"hejie.xu@intel.com","username":"xuhj"},"change_message_id":"cc18f137e250685b8205afb57ad3ca83fa1ac807","unresolved":false,"context_lines":[{"line_number":81,"context_line":"-----------------"},{"line_number":82,"context_line":""},{"line_number":83,"context_line":"New field ``hw_guest_cpu_instruction_set_extensions`` will be added to"},{"line_number":84,"context_line":"``HostCapabilities`` object."},{"line_number":85,"context_line":""},{"line_number":86,"context_line":"REST API impact"},{"line_number":87,"context_line":"---------------"}],"source_content_type":"text/x-rst","patch_set":1,"id":"5a18252c_9248ad5d","line":84,"range":{"start_line":84,"start_character":27,"end_line":84,"end_character":28},"in_reply_to":"9a061dce_64f58eeb","updated":"2016-04-12 06:46:27.000000000","message":"ok, got it, it should be field like those https://review.openstack.org/#/c/285856/3/nova/objects/fields.py","commit_id":"76c6f3b9294d51cf38f5d08185ad41d8107818c5"},{"author":{"_account_id":8213,"name":"Claudiu Belu","email":"cbelu@cloudbasesolutions.com","username":"claudiub"},"change_message_id":"8d7cedd467572ca7ae572587920385a8eb4525a1","unresolved":false,"context_lines":[{"line_number":87,"context_line":"---------------"},{"line_number":88,"context_line":""},{"line_number":89,"context_line":"The new capabilities will be added to ``host_capabilities`` field of"},{"line_number":90,"context_line":"``os-hypervisors`` API with new microversion."},{"line_number":91,"context_line":""},{"line_number":92,"context_line":"`GET /os-hypervisors/detail`"},{"line_number":93,"context_line":""}],"source_content_type":"text/x-rst","patch_set":1,"id":"5a18252c_3cba106f","line":90,"updated":"2016-04-13 08:05:20.000000000","message":"Really wondering about this. Are we really going to bump the API microversion for each newly added host capability. This could potentially lead to dozens of microversion bumps, which are not as easy as bumping an object version, which can be even more frustrating on a merge conflict.\n\nI understand the need for it, but still..","commit_id":"76c6f3b9294d51cf38f5d08185ad41d8107818c5"},{"author":{"_account_id":5754,"name":"Alex Xu","email":"hejie.xu@intel.com","username":"xuhj"},"change_message_id":"25eb1822f98f44737c7e821f774bfa952b7590fa","unresolved":false,"context_lines":[{"line_number":87,"context_line":"---------------"},{"line_number":88,"context_line":""},{"line_number":89,"context_line":"The new capabilities will be added to ``host_capabilities`` field of"},{"line_number":90,"context_line":"``os-hypervisors`` API with new microversion."},{"line_number":91,"context_line":""},{"line_number":92,"context_line":"`GET /os-hypervisors/detail`"},{"line_number":93,"context_line":""}],"source_content_type":"text/x-rst","patch_set":1,"id":"5a18252c_dac03c2d","line":90,"in_reply_to":"5a18252c_3cba106f","updated":"2016-04-13 08:52:15.000000000","message":"emm.. good point, actually I have stuck one this problem also. My initial thinking is we only need bump microversion when we added new field in host_capabilties. We needn\u0027t bump microversion when extend the capability for specific field, like we add new cpu features in hw_guest_cpu_instruction_set_extensions.\n\nbut yea, I\u0027m prefer to not use microversion after rethinking, as this already to be a API for discover things, we needn\u0027t microversion discover it again.","commit_id":"76c6f3b9294d51cf38f5d08185ad41d8107818c5"},{"author":{"_account_id":8213,"name":"Claudiu Belu","email":"cbelu@cloudbasesolutions.com","username":"claudiub"},"change_message_id":"ebe421f82f9c2fd89a08a35fbc7aaae7845be7ac","unresolved":false,"context_lines":[{"line_number":52,"context_line":"extension."},{"line_number":53,"context_line":""},{"line_number":54,"context_line":"The valid values for the new field are coming from the CIM definition about"},{"line_number":55,"context_line":"CIM_ProcessorAllocationSettingData class\u0027s InstructionSetExtensionName"},{"line_number":56,"context_line":"property [1]. And without the DMTF prefix and case insensitive. So for AVX, it"},{"line_number":57,"context_line":"should be ``x86:avx``. The virt drivers should map their extension names to"},{"line_number":58,"context_line":"this list."}],"source_content_type":"text/x-rst","patch_set":2,"id":"1a122d0e_16db0450","line":55,"updated":"2016-04-29 16:53:22.000000000","message":"hm, for which hypervisors is this class available? This looks like a class that exists in Hyper-V as well.\n\nit might also be interesting to have this in other drivers as well. I can help with the hyper-v part of exposing this instruction list.\n\nalso, typo:\n\nclass\u0027 instead of class\u0027s.","commit_id":"3d5242cce953c5052adbdfad7e0f6d63dfcea9d3"},{"author":{"_account_id":8213,"name":"Claudiu Belu","email":"cbelu@cloudbasesolutions.com","username":"claudiub"},"change_message_id":"c9e2c11bff33f3cffc6d9bdedcb49add511ca675","unresolved":false,"context_lines":[{"line_number":55,"context_line":"CIM_ProcessorAllocationSettingData class\u0027s InstructionSetExtensionName"},{"line_number":56,"context_line":"property [1]. And without the DMTF prefix and case insensitive. So for AVX, it"},{"line_number":57,"context_line":"should be ``x86:avx``. The virt drivers should map their extension names to"},{"line_number":58,"context_line":"this list."},{"line_number":59,"context_line":""},{"line_number":60,"context_line":"Image providers can list the required CPU instruction set extensions in the"},{"line_number":61,"context_line":"image property ``hw:guest_cpu_instruction_set_extensions``."}],"source_content_type":"text/x-rst","patch_set":2,"id":"1a122d0e_6ddee6da","line":58,"updated":"2016-04-29 17:32:53.000000000","message":"So, apparently, all the valid field values are supposed to be enumerated. Jay Pipes has a spec on something like this here: https://review.openstack.org/#/c/309762/\n\ni think this could be an action item in the work items section.","commit_id":"3d5242cce953c5052adbdfad7e0f6d63dfcea9d3"},{"author":{"_account_id":8213,"name":"Claudiu Belu","email":"cbelu@cloudbasesolutions.com","username":"claudiub"},"change_message_id":"ebe421f82f9c2fd89a08a35fbc7aaae7845be7ac","unresolved":false,"context_lines":[{"line_number":58,"context_line":"this list."},{"line_number":59,"context_line":""},{"line_number":60,"context_line":"Image providers can list the required CPU instruction set extensions in the"},{"line_number":61,"context_line":"image property ``hw:guest_cpu_instruction_set_extensions``."},{"line_number":62,"context_line":""},{"line_number":63,"context_line":"Administrator also can limit CPU instruction set extensions which image"},{"line_number":64,"context_line":"providers can choose by specifying allowed extensions in the extra spec"}],"source_content_type":"text/x-rst","patch_set":2,"id":"1a122d0e_16e5c4da","line":61,"updated":"2016-04-29 16:53:22.000000000","message":"typically, image properties are with hw_guest_cpu_instruction_set_extensions and flavor extra specs are with hw_guest_cpu_instruction_set_extensions.\n\nalso, is this image property already in use? If not, I would really prefer a shorter name. Most probably it will have to be referenced in code, which is going to be quite difficult with python\u0027s 79 char limit.","commit_id":"3d5242cce953c5052adbdfad7e0f6d63dfcea9d3"},{"author":{"_account_id":11189,"name":"yuntongjin","email":"yuntong.jin@intel.com","username":"yuntong"},"change_message_id":"0ec87c3c7965f73da39117318360bb5434fce473","unresolved":false,"context_lines":[{"line_number":58,"context_line":"this list."},{"line_number":59,"context_line":""},{"line_number":60,"context_line":"Image providers can list the required CPU instruction set extensions in the"},{"line_number":61,"context_line":"image property ``hw:guest_cpu_instruction_set_extensions``."},{"line_number":62,"context_line":""},{"line_number":63,"context_line":"Administrator also can limit CPU instruction set extensions which image"},{"line_number":64,"context_line":"providers can choose by specifying allowed extensions in the extra spec"}],"source_content_type":"text/x-rst","patch_set":2,"id":"dab17558_53262f17","line":61,"in_reply_to":"1a122d0e_16e5c4da","updated":"2016-05-06 04:57:29.000000000","message":"typically, image properties are with hw_guest_cpu_instruction_set_extensions and flavor extra specs are with hw:guest_cpu_instruction_set_extensions.","commit_id":"3d5242cce953c5052adbdfad7e0f6d63dfcea9d3"},{"author":{"_account_id":8213,"name":"Claudiu Belu","email":"cbelu@cloudbasesolutions.com","username":"claudiub"},"change_message_id":"ebe421f82f9c2fd89a08a35fbc7aaae7845be7ac","unresolved":false,"context_lines":[{"line_number":62,"context_line":""},{"line_number":63,"context_line":"Administrator also can limit CPU instruction set extensions which image"},{"line_number":64,"context_line":"providers can choose by specifying allowed extensions in the extra spec"},{"line_number":65,"context_line":"``hw_guest_cpu_instruction_set_extensions``."},{"line_number":66,"context_line":""},{"line_number":67,"context_line":"This will be exposed in the host_capabilities field of hypervisor API by a new"},{"line_number":68,"context_line":"microversion."}],"source_content_type":"text/x-rst","patch_set":2,"id":"1a122d0e_76eb58a4","line":65,"updated":"2016-04-29 16:53:22.000000000","message":"you mean flavor extra_spec, right?","commit_id":"3d5242cce953c5052adbdfad7e0f6d63dfcea9d3"},{"author":{"_account_id":11189,"name":"yuntongjin","email":"yuntong.jin@intel.com","username":"yuntong"},"change_message_id":"0ec87c3c7965f73da39117318360bb5434fce473","unresolved":false,"context_lines":[{"line_number":62,"context_line":""},{"line_number":63,"context_line":"Administrator also can limit CPU instruction set extensions which image"},{"line_number":64,"context_line":"providers can choose by specifying allowed extensions in the extra spec"},{"line_number":65,"context_line":"``hw_guest_cpu_instruction_set_extensions``."},{"line_number":66,"context_line":""},{"line_number":67,"context_line":"This will be exposed in the host_capabilities field of hypervisor API by a new"},{"line_number":68,"context_line":"microversion."}],"source_content_type":"text/x-rst","patch_set":2,"id":"dab17558_d35fbf73","line":65,"in_reply_to":"1a122d0e_76eb58a4","updated":"2016-05-06 04:57:29.000000000","message":"I think so.\nThis is already supported in ComputeCapabilitiesFilter","commit_id":"3d5242cce953c5052adbdfad7e0f6d63dfcea9d3"}]}