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{"/COMMIT_MSG":[{"author":{"_account_id":6873,"name":"Matt Riedemann","email":"mriedem.os@gmail.com","username":"mriedem"},"change_message_id":"c67f43fd0c779384a9874b6fb0f4811f4ed7a986","unresolved":false,"context_lines":[{"line_number":8,"context_line":""},{"line_number":9,"context_line":"This spec present numa and pci devices information in server show"},{"line_number":10,"context_line":"and server detail API."},{"line_number":11,"context_line":""},{"line_number":12,"context_line":"Change-Id: I36872473a569f3c8bb0f835d0e2c725c7764d69c"},{"line_number":13,"context_line":"bp: show-server-numa-topology"}],"source_content_type":"text/x-gerrit-commit-message","patch_set":9,"id":"3f79a3b5_a422f90c","line":11,"updated":"2018-12-20 17:28:26.000000000","message":"nit: should have the APIImpact tag in the commit message.","commit_id":"b1d1b2944cefb2ca12ed64fff9ae3af0ca53c177"},{"author":{"_account_id":6873,"name":"Matt Riedemann","email":"mriedem.os@gmail.com","username":"mriedem"},"change_message_id":"01f6ad2d2d102990ed2b1630edaa97ff0f50d366","unresolved":false,"context_lines":[{"line_number":7,"context_line":"add spec \"show-server-numa-topology\""},{"line_number":8,"context_line":""},{"line_number":9,"context_line":"This spec present numa information in server diagnostic API."},{"line_number":10,"context_line":""},{"line_number":11,"context_line":"Change-Id: I36872473a569f3c8bb0f835d0e2c725c7764d69c"},{"line_number":12,"context_line":"bp: show-server-numa-topology"}],"source_content_type":"text/x-gerrit-commit-message","patch_set":15,"id":"ffd0ebdf_8f275fb7","line":10,"updated":"2019-01-03 21:54:45.000000000","message":"Add the APIImpact tag on a separate line.","commit_id":"0004c0201e21fd0f2ea4bad077675222280f3f22"}],"specs/stein/approved/show-server-numa-topology.rst":[{"author":{"_account_id":15334,"name":"Stephen Finucane","display_name":"stephenfin","email":"stephenfin@redhat.com","username":"sfinucan"},"change_message_id":"0c93eb514eb45991af98bd402266228f19ba356e","unresolved":false,"context_lines":[{"line_number":16,"context_line":"\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d"},{"line_number":17,"context_line":""},{"line_number":18,"context_line":"Currently, nova API \"GET /servers/{id}\" and \"GET /servers\" can list the extra"},{"line_number":19,"context_line":"spec contain some hints for numa topology but not easy to interpret, and the"},{"line_number":20,"context_line":"PCI devices is also NUMA resouces should expose to admin/Tenant."},{"line_number":21,"context_line":""},{"line_number":22,"context_line":"In nova, NUMA topology contains group of related properties, like mem, page"}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_921adb7d","line":19,"range":{"start_line":19,"start_character":28,"end_line":19,"end_character":41},"updated":"2018-10-23 13:05:43.000000000","message":"s/numa topology/guest NUMA topology/\n\nI was a few paragraphs in before I realized you were talking about guest - not host - topologies","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"97049b2cf2c1991d53e1ea7054124625e8ebcaeb","unresolved":false,"context_lines":[{"line_number":16,"context_line":"\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d"},{"line_number":17,"context_line":""},{"line_number":18,"context_line":"Currently, nova API \"GET /servers/{id}\" and \"GET /servers\" can list the extra"},{"line_number":19,"context_line":"spec contain some hints for numa topology but not easy to interpret, and the"},{"line_number":20,"context_line":"PCI devices is also NUMA resouces should expose to admin/Tenant."},{"line_number":21,"context_line":""},{"line_number":22,"context_line":"In nova, NUMA topology contains group of related properties, like mem, page"}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_706fe592","line":19,"range":{"start_line":19,"start_character":28,"end_line":19,"end_character":41},"in_reply_to":"3f79a3b5_921adb7d","updated":"2018-10-24 07:34:05.000000000","message":"Done","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":15334,"name":"Stephen Finucane","display_name":"stephenfin","email":"stephenfin@redhat.com","username":"sfinucan"},"change_message_id":"0c93eb514eb45991af98bd402266228f19ba356e","unresolved":false,"context_lines":[{"line_number":19,"context_line":"spec contain some hints for numa topology but not easy to interpret, and the"},{"line_number":20,"context_line":"PCI devices is also NUMA resouces should expose to admin/Tenant."},{"line_number":21,"context_line":""},{"line_number":22,"context_line":"In nova, NUMA topology contains group of related properties, like mem, page"},{"line_number":23,"context_line":"size, cpu pin, cpu/thread policy. This Spec proposal a API to present all these"},{"line_number":24,"context_line":"NUMA information, including the virtual to physical mapping with the"},{"line_number":25,"context_line":"corresponding PCI device in the NUMA cell."}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_522443c3","line":22,"range":{"start_line":22,"start_character":66,"end_line":22,"end_character":75},"updated":"2018-10-23 13:05:43.000000000","message":"mempage","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"97049b2cf2c1991d53e1ea7054124625e8ebcaeb","unresolved":false,"context_lines":[{"line_number":19,"context_line":"spec contain some hints for numa topology but not easy to interpret, and the"},{"line_number":20,"context_line":"PCI devices is also NUMA resouces should expose to admin/Tenant."},{"line_number":21,"context_line":""},{"line_number":22,"context_line":"In nova, NUMA topology contains group of related properties, like mem, page"},{"line_number":23,"context_line":"size, cpu pin, cpu/thread policy. This Spec proposal a API to present all these"},{"line_number":24,"context_line":"NUMA information, including the virtual to physical mapping with the"},{"line_number":25,"context_line":"corresponding PCI device in the NUMA cell."}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_5062e9a8","line":22,"range":{"start_line":22,"start_character":66,"end_line":22,"end_character":75},"in_reply_to":"3f79a3b5_522443c3","updated":"2018-10-24 07:34:05.000000000","message":"there are 2 information, the size of your memory, and the pagesize. change the mem to mem size might be better.","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":7,"name":"Jay Pipes","email":"jaypipes@gmail.com","username":"jaypipes"},"change_message_id":"456ceb2c97d0db069e6123acc87f51111d6ef1c6","unresolved":false,"context_lines":[{"line_number":21,"context_line":""},{"line_number":22,"context_line":"In nova, NUMA topology contains group of related properties, like mem, page"},{"line_number":23,"context_line":"size, cpu pin, cpu/thread policy. This Spec proposal a API to present all these"},{"line_number":24,"context_line":"NUMA information, including the virtual to physical mapping with the"},{"line_number":25,"context_line":"corresponding PCI device in the NUMA cell."},{"line_number":26,"context_line":""},{"line_number":27,"context_line":""},{"line_number":28,"context_line":""}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_7da496a4","line":25,"range":{"start_line":24,"start_character":18,"end_line":25,"end_character":42},"updated":"2018-10-24 14:13:06.000000000","message":"host information should not be shown to the end user.","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":8768,"name":"Chris Friesen","email":"chris.friesen@windriver.com","username":"cbf123"},"change_message_id":"bca107694e18c6855d72095ad0bcb5043fa81179","unresolved":false,"context_lines":[{"line_number":21,"context_line":""},{"line_number":22,"context_line":"In nova, NUMA topology contains group of related properties, like mem, page"},{"line_number":23,"context_line":"size, cpu pin, cpu/thread policy. This Spec proposal a API to present all these"},{"line_number":24,"context_line":"NUMA information, including the virtual to physical mapping with the"},{"line_number":25,"context_line":"corresponding PCI device in the NUMA cell."},{"line_number":26,"context_line":""},{"line_number":27,"context_line":""},{"line_number":28,"context_line":""}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_22491565","line":25,"range":{"start_line":24,"start_character":18,"end_line":25,"end_character":42},"in_reply_to":"3f79a3b5_7da496a4","updated":"2018-10-24 18:09:48.000000000","message":"I think it could make sense to show host information to an admin user but not to a regular user.","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":7166,"name":"Sylvain Bauza","email":"sbauza@redhat.com","username":"sbauza"},"change_message_id":"331548af46322d00abf3912b0519577455d778bf","unresolved":false,"context_lines":[{"line_number":21,"context_line":""},{"line_number":22,"context_line":"In nova, NUMA topology contains group of related properties, like mem, page"},{"line_number":23,"context_line":"size, cpu pin, cpu/thread policy. This Spec proposal a API to present all these"},{"line_number":24,"context_line":"NUMA information, including the virtual to physical mapping with the"},{"line_number":25,"context_line":"corresponding PCI device in the NUMA cell."},{"line_number":26,"context_line":""},{"line_number":27,"context_line":""},{"line_number":28,"context_line":""}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_f60be329","line":25,"range":{"start_line":24,"start_character":18,"end_line":25,"end_character":42},"in_reply_to":"3f79a3b5_7da496a4","updated":"2018-10-24 15:44:08.000000000","message":"Yeah, please clarify the policy.","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":15334,"name":"Stephen Finucane","display_name":"stephenfin","email":"stephenfin@redhat.com","username":"sfinucan"},"change_message_id":"0c93eb514eb45991af98bd402266228f19ba356e","unresolved":false,"context_lines":[{"line_number":30,"context_line":"Use Cases"},{"line_number":31,"context_line":"---------"},{"line_number":32,"context_line":""},{"line_number":33,"context_line":"* Tenant wants to know the overall view of the topology of multiple instances"},{"line_number":34,"context_line":"  and do not want to login VM one by one to collect them."},{"line_number":35,"context_line":""},{"line_number":36,"context_line":"* Admin want check the vcpu set of the NUMA cell and cpu pin information to"},{"line_number":37,"context_line":"  analysis host performance issue."}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_ad51bc0f","line":34,"range":{"start_line":33,"start_character":0,"end_line":34,"end_character":57},"updated":"2018-10-23 13:05:43.000000000","message":"Why?","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":8768,"name":"Chris Friesen","email":"chris.friesen@windriver.com","username":"cbf123"},"change_message_id":"bca107694e18c6855d72095ad0bcb5043fa81179","unresolved":false,"context_lines":[{"line_number":30,"context_line":"Use Cases"},{"line_number":31,"context_line":"---------"},{"line_number":32,"context_line":""},{"line_number":33,"context_line":"* Tenant wants to know the overall view of the topology of multiple instances"},{"line_number":34,"context_line":"  and do not want to login VM one by one to collect them."},{"line_number":35,"context_line":""},{"line_number":36,"context_line":"* Admin want check the vcpu set of the NUMA cell and cpu pin information to"},{"line_number":37,"context_line":"  analysis host performance issue."}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_823fc9b0","line":34,"range":{"start_line":33,"start_character":0,"end_line":34,"end_character":57},"in_reply_to":"3f79a3b5_3d27fe20","updated":"2018-10-24 18:09:48.000000000","message":"Agreed, normal end users don\u0027t need host information.  They could make use of the *guest* topology though.","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":7166,"name":"Sylvain Bauza","email":"sbauza@redhat.com","username":"sbauza"},"change_message_id":"331548af46322d00abf3912b0519577455d778bf","unresolved":false,"context_lines":[{"line_number":30,"context_line":"Use Cases"},{"line_number":31,"context_line":"---------"},{"line_number":32,"context_line":""},{"line_number":33,"context_line":"* Tenant wants to know the overall view of the topology of multiple instances"},{"line_number":34,"context_line":"  and do not want to login VM one by one to collect them."},{"line_number":35,"context_line":""},{"line_number":36,"context_line":"* Admin want check the vcpu set of the NUMA cell and cpu pin information to"},{"line_number":37,"context_line":"  analysis host performance issue."}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_7114bd42","line":34,"range":{"start_line":33,"start_character":0,"end_line":34,"end_character":57},"in_reply_to":"3f79a3b5_3d27fe20","updated":"2018-10-24 15:44:08.000000000","message":"Yup, only operators should get the host information. That said, I think it\u0027s understandable for operators to know the NUMA usage for an instance.","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"ab9897777c58d2e526a236c6da6b9d1369c9f571","unresolved":false,"context_lines":[{"line_number":30,"context_line":"Use Cases"},{"line_number":31,"context_line":"---------"},{"line_number":32,"context_line":""},{"line_number":33,"context_line":"* Tenant wants to know the overall view of the topology of multiple instances"},{"line_number":34,"context_line":"  and do not want to login VM one by one to collect them."},{"line_number":35,"context_line":""},{"line_number":36,"context_line":"* Admin want check the vcpu set of the NUMA cell and cpu pin information to"},{"line_number":37,"context_line":"  analysis host performance issue."}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_1ed4661d","line":34,"range":{"start_line":33,"start_character":0,"end_line":34,"end_character":57},"in_reply_to":"3f79a3b5_3d27fe20","updated":"2018-10-25 08:56:12.000000000","message":"for the host information, there is policy to control. here need to be clarified.\n\nfor use case part, the end user may also want to know some topology info(cpu, mem etc) without need to login to every single VM to collect them. and this way is then be a unified way to get that info, for example, get topology from windows is different from get that from Linux.","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"ab9897777c58d2e526a236c6da6b9d1369c9f571","unresolved":false,"context_lines":[{"line_number":30,"context_line":"Use Cases"},{"line_number":31,"context_line":"---------"},{"line_number":32,"context_line":""},{"line_number":33,"context_line":"* Tenant wants to know the overall view of the topology of multiple instances"},{"line_number":34,"context_line":"  and do not want to login VM one by one to collect them."},{"line_number":35,"context_line":""},{"line_number":36,"context_line":"* Admin want check the vcpu set of the NUMA cell and cpu pin information to"},{"line_number":37,"context_line":"  analysis host performance issue."}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_3eb28206","line":34,"range":{"start_line":33,"start_character":0,"end_line":34,"end_character":57},"in_reply_to":"3f79a3b5_7114bd42","updated":"2018-10-25 08:56:12.000000000","message":"that control by policy, this section need clarified, thanks.","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":7,"name":"Jay Pipes","email":"jaypipes@gmail.com","username":"jaypipes"},"change_message_id":"456ceb2c97d0db069e6123acc87f51111d6ef1c6","unresolved":false,"context_lines":[{"line_number":30,"context_line":"Use Cases"},{"line_number":31,"context_line":"---------"},{"line_number":32,"context_line":""},{"line_number":33,"context_line":"* Tenant wants to know the overall view of the topology of multiple instances"},{"line_number":34,"context_line":"  and do not want to login VM one by one to collect them."},{"line_number":35,"context_line":""},{"line_number":36,"context_line":"* Admin want check the vcpu set of the NUMA cell and cpu pin information to"},{"line_number":37,"context_line":"  analysis host performance issue."}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_3d27fe20","line":34,"range":{"start_line":33,"start_character":0,"end_line":34,"end_character":57},"in_reply_to":"3f79a3b5_ad51bc0f","updated":"2018-10-24 14:13:06.000000000","message":"I have the same question. By \"tenant\" are you referring to normal end users? they shouldn\u0027t need or want to know about any host/physical information. The whole point of cloud and virtualization is to hide this from the end user.\n\nThe end user should describe the constraints they need to see fulfilled (e.g. \"make my *guest* NUMA topology have 2 sockets\" or \"ensure my NIC is connected to a physical NIC that has access to physical network X\" but the end user shouldn\u0027t just be able to (or need to) show host/physical information or topology. That flies in the face of cloud/virtualization principles.","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"97049b2cf2c1991d53e1ea7054124625e8ebcaeb","unresolved":false,"context_lines":[{"line_number":30,"context_line":"Use Cases"},{"line_number":31,"context_line":"---------"},{"line_number":32,"context_line":""},{"line_number":33,"context_line":"* Tenant wants to know the overall view of the topology of multiple instances"},{"line_number":34,"context_line":"  and do not want to login VM one by one to collect them."},{"line_number":35,"context_line":""},{"line_number":36,"context_line":"* Admin want check the vcpu set of the NUMA cell and cpu pin information to"},{"line_number":37,"context_line":"  analysis host performance issue."}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_b01fbd09","line":34,"range":{"start_line":33,"start_character":0,"end_line":34,"end_character":57},"in_reply_to":"3f79a3b5_ad51bc0f","updated":"2018-10-24 07:34:05.000000000","message":"tenant may have someone need to maintain the VM, check the topology to me just like we need \"ls\".  I don\u0027t know if this need to be in the use case.","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":15334,"name":"Stephen Finucane","display_name":"stephenfin","email":"stephenfin@redhat.com","username":"sfinucan"},"change_message_id":"0c93eb514eb45991af98bd402266228f19ba356e","unresolved":false,"context_lines":[{"line_number":33,"context_line":"* Tenant wants to know the overall view of the topology of multiple instances"},{"line_number":34,"context_line":"  and do not want to login VM one by one to collect them."},{"line_number":35,"context_line":""},{"line_number":36,"context_line":"* Admin want check the vcpu set of the NUMA cell and cpu pin information to"},{"line_number":37,"context_line":"  analysis host performance issue."},{"line_number":38,"context_line":""},{"line_number":39,"context_line":"* Admin check NUMA topology to make sure the Instance NUMA properly mapped to"},{"line_number":40,"context_line":"  Host."},{"line_number":41,"context_line":""},{"line_number":42,"context_line":"* Customer complain PCI Passthrough NIC performance issue, Admin want check"},{"line_number":43,"context_line":"  NUMA topology to identify the possible reason."},{"line_number":44,"context_line":""},{"line_number":45,"context_line":""},{"line_number":46,"context_line":""}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_ed47b451","line":43,"range":{"start_line":36,"start_character":0,"end_line":43,"end_character":48},"updated":"2018-10-23 13:05:43.000000000","message":"So I\u0027m guessing this is only going to be applicable for the libvirt driver? If so, question: what can you do with this approach that couldn\u0027t be possible by talking to libvirt directly? I ask because this isn\u0027t something a typical admin would use for something like billing. Each of the use cases you\u0027ve outlined here can essentially be summarized as \"performance is not what we expected and we\u0027d like to debug it\". If we\u0027re debugging, why not talk to libvirt directly?","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"ab9897777c58d2e526a236c6da6b9d1369c9f571","unresolved":false,"context_lines":[{"line_number":33,"context_line":"* Tenant wants to know the overall view of the topology of multiple instances"},{"line_number":34,"context_line":"  and do not want to login VM one by one to collect them."},{"line_number":35,"context_line":""},{"line_number":36,"context_line":"* Admin want check the vcpu set of the NUMA cell and cpu pin information to"},{"line_number":37,"context_line":"  analysis host performance issue."},{"line_number":38,"context_line":""},{"line_number":39,"context_line":"* Admin check NUMA topology to make sure the Instance NUMA properly mapped to"},{"line_number":40,"context_line":"  Host."},{"line_number":41,"context_line":""},{"line_number":42,"context_line":"* Customer complain PCI Passthrough NIC performance issue, Admin want check"},{"line_number":43,"context_line":"  NUMA topology to identify the possible reason."},{"line_number":44,"context_line":""},{"line_number":45,"context_line":""},{"line_number":46,"context_line":""}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_8f64cab5","line":43,"range":{"start_line":36,"start_character":0,"end_line":43,"end_character":48},"in_reply_to":"3f79a3b5_42b9b1c8","updated":"2018-10-25 08:56:12.000000000","message":"exactly, i\u0027d gonna update this use case.","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"97049b2cf2c1991d53e1ea7054124625e8ebcaeb","unresolved":false,"context_lines":[{"line_number":33,"context_line":"* Tenant wants to know the overall view of the topology of multiple instances"},{"line_number":34,"context_line":"  and do not want to login VM one by one to collect them."},{"line_number":35,"context_line":""},{"line_number":36,"context_line":"* Admin want check the vcpu set of the NUMA cell and cpu pin information to"},{"line_number":37,"context_line":"  analysis host performance issue."},{"line_number":38,"context_line":""},{"line_number":39,"context_line":"* Admin check NUMA topology to make sure the Instance NUMA properly mapped to"},{"line_number":40,"context_line":"  Host."},{"line_number":41,"context_line":""},{"line_number":42,"context_line":"* Customer complain PCI Passthrough NIC performance issue, Admin want check"},{"line_number":43,"context_line":"  NUMA topology to identify the possible reason."},{"line_number":44,"context_line":""},{"line_number":45,"context_line":""},{"line_number":46,"context_line":""}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_d0b27905","line":43,"range":{"start_line":36,"start_character":0,"end_line":43,"end_character":48},"in_reply_to":"3f79a3b5_ed47b451","updated":"2018-10-24 07:34:05.000000000","message":"I suppose you talk about how to resolve the performance issue? for me, I feel talking to libvirt is one of the debugging step, OpenStack admin don\u0027t necessary to have the login permission to the VM to check the NUMA topology. \n\n\nchecking topology from API given a view of what the topology is supposed to be, talking to libvirt and much lower level is trying to make sure everything is actually is.","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":8768,"name":"Chris Friesen","email":"chris.friesen@windriver.com","username":"cbf123"},"change_message_id":"bca107694e18c6855d72095ad0bcb5043fa81179","unresolved":false,"context_lines":[{"line_number":33,"context_line":"* Tenant wants to know the overall view of the topology of multiple instances"},{"line_number":34,"context_line":"  and do not want to login VM one by one to collect them."},{"line_number":35,"context_line":""},{"line_number":36,"context_line":"* Admin want check the vcpu set of the NUMA cell and cpu pin information to"},{"line_number":37,"context_line":"  analysis host performance issue."},{"line_number":38,"context_line":""},{"line_number":39,"context_line":"* Admin check NUMA topology to make sure the Instance NUMA properly mapped to"},{"line_number":40,"context_line":"  Host."},{"line_number":41,"context_line":""},{"line_number":42,"context_line":"* Customer complain PCI Passthrough NIC performance issue, Admin want check"},{"line_number":43,"context_line":"  NUMA topology to identify the possible reason."},{"line_number":44,"context_line":""},{"line_number":45,"context_line":""},{"line_number":46,"context_line":""}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_42b9b1c8","line":43,"range":{"start_line":36,"start_character":0,"end_line":43,"end_character":48},"in_reply_to":"3f79a3b5_ed47b451","updated":"2018-10-24 18:09:48.000000000","message":"Is the libvirt virt driver the only one that supports InstanceNUMATopology?  All the processing for it is in nova/virt/hardware.py which would be generic.\n\nThe main usecase I see for showing the host-side information is to allow the admin to validate that the information stored in the nova DB matches the reality on the compute node.  We\u0027ve run into cases on failed/aborted operations which resulted in a mismatch between what was in the DB and what was actually the case on the hypervisor.","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":5754,"name":"Alex Xu","email":"hejie.xu@intel.com","username":"xuhj"},"change_message_id":"91c23628aba89ffef5bbcf4197e24c10c9aa7d68","unresolved":false,"context_lines":[{"line_number":48,"context_line":"\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d"},{"line_number":49,"context_line":""},{"line_number":50,"context_line":""},{"line_number":51,"context_line":"Proposes to add NUMA info to \"GET /servers/{id}\" and \"GET /servers\"."},{"line_number":52,"context_line":""},{"line_number":53,"context_line":"API returns each cell\u0027s socket, cpu,thread, mem, page size, cpuset,cpu pinned"},{"line_number":54,"context_line":"info, siblings, cpu/thread policy."}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_5be1c92a","line":51,"range":{"start_line":51,"start_character":54,"end_line":51,"end_character":66},"updated":"2018-10-23 05:26:08.000000000","message":"I thought we will put those detail info into \u0027GET /servers/detail/?","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":7,"name":"Jay Pipes","email":"jaypipes@gmail.com","username":"jaypipes"},"change_message_id":"456ceb2c97d0db069e6123acc87f51111d6ef1c6","unresolved":false,"context_lines":[{"line_number":48,"context_line":"\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d"},{"line_number":49,"context_line":""},{"line_number":50,"context_line":""},{"line_number":51,"context_line":"Proposes to add NUMA info to \"GET /servers/{id}\" and \"GET /servers\"."},{"line_number":52,"context_line":""},{"line_number":53,"context_line":"API returns each cell\u0027s socket, cpu,thread, mem, page size, cpuset,cpu pinned"},{"line_number":54,"context_line":"info, siblings, cpu/thread policy."}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_a0f20568","line":51,"range":{"start_line":51,"start_character":54,"end_line":51,"end_character":66},"in_reply_to":"3f79a3b5_2d45ac44","updated":"2018-10-24 14:13:06.000000000","message":"I am 100% opposed to just outputting back a JSON blob into the response stream for GET /servers/detail. The thing that is stored in the DB is an oslo versioned object of InstanceNUMATopology. Are we going to add a microversion to the REST API every time the InstanceNUMATopology object changes? I don\u0027t think so...","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"97049b2cf2c1991d53e1ea7054124625e8ebcaeb","unresolved":false,"context_lines":[{"line_number":48,"context_line":"\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d"},{"line_number":49,"context_line":""},{"line_number":50,"context_line":""},{"line_number":51,"context_line":"Proposes to add NUMA info to \"GET /servers/{id}\" and \"GET /servers\"."},{"line_number":52,"context_line":""},{"line_number":53,"context_line":"API returns each cell\u0027s socket, cpu,thread, mem, page size, cpuset,cpu pinned"},{"line_number":54,"context_line":"info, siblings, cpu/thread policy."}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_30964d4c","line":51,"range":{"start_line":51,"start_character":54,"end_line":51,"end_character":66},"in_reply_to":"3f79a3b5_2d45ac44","updated":"2018-10-24 07:34:05.000000000","message":"thanks for explaining.","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":15334,"name":"Stephen Finucane","display_name":"stephenfin","email":"stephenfin@redhat.com","username":"sfinucan"},"change_message_id":"0c93eb514eb45991af98bd402266228f19ba356e","unresolved":false,"context_lines":[{"line_number":48,"context_line":"\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d"},{"line_number":49,"context_line":""},{"line_number":50,"context_line":""},{"line_number":51,"context_line":"Proposes to add NUMA info to \"GET /servers/{id}\" and \"GET /servers\"."},{"line_number":52,"context_line":""},{"line_number":53,"context_line":"API returns each cell\u0027s socket, cpu,thread, mem, page size, cpuset,cpu pinned"},{"line_number":54,"context_line":"info, siblings, cpu/thread policy."}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_2d45ac44","line":51,"range":{"start_line":51,"start_character":54,"end_line":51,"end_character":66},"in_reply_to":"3f79a3b5_5be1c92a","updated":"2018-10-23 13:05:43.000000000","message":"+1 this is stored as a JSON blob so parsing it and building the response detailed below is going to be somewhat expensive. It\u0027s also likely unnecessary for 99% of users.","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"97049b2cf2c1991d53e1ea7054124625e8ebcaeb","unresolved":false,"context_lines":[{"line_number":48,"context_line":"\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d"},{"line_number":49,"context_line":""},{"line_number":50,"context_line":""},{"line_number":51,"context_line":"Proposes to add NUMA info to \"GET /servers/{id}\" and \"GET /servers\"."},{"line_number":52,"context_line":""},{"line_number":53,"context_line":"API returns each cell\u0027s socket, cpu,thread, mem, page size, cpuset,cpu pinned"},{"line_number":54,"context_line":"info, siblings, cpu/thread policy."}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_d0a7d9ba","line":51,"range":{"start_line":51,"start_character":54,"end_line":51,"end_character":66},"in_reply_to":"3f79a3b5_5be1c92a","updated":"2018-10-24 07:34:05.000000000","message":"Done","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":7166,"name":"Sylvain Bauza","email":"sbauza@redhat.com","username":"sbauza"},"change_message_id":"331548af46322d00abf3912b0519577455d778bf","unresolved":false,"context_lines":[{"line_number":48,"context_line":"\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d"},{"line_number":49,"context_line":""},{"line_number":50,"context_line":""},{"line_number":51,"context_line":"Proposes to add NUMA info to \"GET /servers/{id}\" and \"GET /servers\"."},{"line_number":52,"context_line":""},{"line_number":53,"context_line":"API returns each cell\u0027s socket, cpu,thread, mem, page size, cpuset,cpu pinned"},{"line_number":54,"context_line":"info, siblings, cpu/thread policy."}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_d13911cf","line":51,"range":{"start_line":51,"start_character":54,"end_line":51,"end_character":66},"in_reply_to":"3f79a3b5_a0f20568","updated":"2018-10-24 15:44:08.000000000","message":"Yup, I think we need to provide a specific output for the NUMA usage and not directly pass the blob out.","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"ab9897777c58d2e526a236c6da6b9d1369c9f571","unresolved":false,"context_lines":[{"line_number":48,"context_line":"\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d"},{"line_number":49,"context_line":""},{"line_number":50,"context_line":""},{"line_number":51,"context_line":"Proposes to add NUMA info to \"GET /servers/{id}\" and \"GET /servers\"."},{"line_number":52,"context_line":""},{"line_number":53,"context_line":"API returns each cell\u0027s socket, cpu,thread, mem, page size, cpuset,cpu pinned"},{"line_number":54,"context_line":"info, siblings, cpu/thread policy."}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_3e9b6216","line":51,"range":{"start_line":51,"start_character":54,"end_line":51,"end_character":66},"in_reply_to":"3f79a3b5_a0f20568","updated":"2018-10-25 08:56:12.000000000","message":"every API get something from DB face to the same situation more or less. \n\n\nthe way we do translate that info to some \"generic present\" actually will define a json structure anyway. \n\n\nfor more specific, the json blob list here is a proposal, i hope we start from here, and do discussion to improve it if possible.\n\n\nif a new NUMA info been added: cause we don\u0027t know what it is \nfor now, how to deal with it is not clear for me(help me thanks.).\n\n\nif some  NUMA info likely to changed or dispear in future, help me to identify them, we might can come up with a solution.\n\n\nif there is better totally diffrent way to do this, let me know, i like to compare it with this.","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":5754,"name":"Alex Xu","email":"hejie.xu@intel.com","username":"xuhj"},"change_message_id":"91c23628aba89ffef5bbcf4197e24c10c9aa7d68","unresolved":false,"context_lines":[{"line_number":77,"context_line":""},{"line_number":78,"context_line":"    {"},{"line_number":79,"context_line":"        \"server\": {"},{"line_number":80,"context_line":"          \"numa_topology\": {"},{"line_number":81,"context_line":"               \"cells\":["},{"line_number":82,"context_line":"                         {"},{"line_number":83,"context_line":"                           \"physical_mapping\":{  #admin only"}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_5bfd49b0","line":80,"range":{"start_line":80,"start_character":10,"end_line":80,"end_character":28},"updated":"2018-10-23 05:26:08.000000000","message":"For the guest without NUMA topo, we probably have a empty dict, I guess","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":7166,"name":"Sylvain Bauza","email":"sbauza@redhat.com","username":"sbauza"},"change_message_id":"331548af46322d00abf3912b0519577455d778bf","unresolved":false,"context_lines":[{"line_number":77,"context_line":""},{"line_number":78,"context_line":"    {"},{"line_number":79,"context_line":"        \"server\": {"},{"line_number":80,"context_line":"          \"numa_topology\": {"},{"line_number":81,"context_line":"               \"cells\":["},{"line_number":82,"context_line":"                         {"},{"line_number":83,"context_line":"                           \"physical_mapping\":{  #admin only"}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_f1752d87","line":80,"range":{"start_line":80,"start_character":10,"end_line":80,"end_character":28},"in_reply_to":"3f79a3b5_50a18991","updated":"2018-10-24 15:44:08.000000000","message":"Actually, that\u0027s a good concern. I think \u0027None\u0027 is okay.","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"97049b2cf2c1991d53e1ea7054124625e8ebcaeb","unresolved":false,"context_lines":[{"line_number":77,"context_line":""},{"line_number":78,"context_line":"    {"},{"line_number":79,"context_line":"        \"server\": {"},{"line_number":80,"context_line":"          \"numa_topology\": {"},{"line_number":81,"context_line":"               \"cells\":["},{"line_number":82,"context_line":"                         {"},{"line_number":83,"context_line":"                           \"physical_mapping\":{  #admin only"}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_50a18991","line":80,"range":{"start_line":80,"start_character":10,"end_line":80,"end_character":28},"in_reply_to":"3f79a3b5_5bfd49b0","updated":"2018-10-24 07:34:05.000000000","message":"yes. how about put \"no numa\" to a one cell numa_topology dict? i think it\u0027s reasonable.","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"ab9897777c58d2e526a236c6da6b9d1369c9f571","unresolved":false,"context_lines":[{"line_number":77,"context_line":""},{"line_number":78,"context_line":"    {"},{"line_number":79,"context_line":"        \"server\": {"},{"line_number":80,"context_line":"          \"numa_topology\": {"},{"line_number":81,"context_line":"               \"cells\":["},{"line_number":82,"context_line":"                         {"},{"line_number":83,"context_line":"                           \"physical_mapping\":{  #admin only"}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_efde9e3a","line":80,"range":{"start_line":80,"start_character":10,"end_line":80,"end_character":28},"in_reply_to":"3f79a3b5_f1752d87","updated":"2018-10-25 08:56:12.000000000","message":"sounds also good for me.","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":7166,"name":"Sylvain Bauza","email":"sbauza@redhat.com","username":"sbauza"},"change_message_id":"331548af46322d00abf3912b0519577455d778bf","unresolved":false,"context_lines":[{"line_number":80,"context_line":"          \"numa_topology\": {"},{"line_number":81,"context_line":"               \"cells\":["},{"line_number":82,"context_line":"                         {"},{"line_number":83,"context_line":"                           \"physical_mapping\":{  #admin only"},{"line_number":84,"context_line":"                                    \"numa_node\" : 3       # Host Numa Node"},{"line_number":85,"context_line":"                                    \"cpu_pinning\": [[0,5], [1,6]],"},{"line_number":86,"context_line":"                            }"}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_91b4f91e","line":83,"updated":"2018-10-24 15:44:08.000000000","message":"what if I\u0027m an end-user ? Should I get a physical mapping being None or just not getting the field ?","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":8768,"name":"Chris Friesen","email":"chris.friesen@windriver.com","username":"cbf123"},"change_message_id":"bca107694e18c6855d72095ad0bcb5043fa81179","unresolved":false,"context_lines":[{"line_number":80,"context_line":"          \"numa_topology\": {"},{"line_number":81,"context_line":"               \"cells\":["},{"line_number":82,"context_line":"                         {"},{"line_number":83,"context_line":"                           \"physical_mapping\":{  #admin only"},{"line_number":84,"context_line":"                                    \"numa_node\" : 3       # Host Numa Node"},{"line_number":85,"context_line":"                                    \"cpu_pinning\": [[0,5], [1,6]],"},{"line_number":86,"context_line":"                            }"}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_c885e354","line":83,"in_reply_to":"3f79a3b5_91b4f91e","updated":"2018-10-24 18:09:48.000000000","message":"For flavors we just didn\u0027t include the \"extra_specs\" field if the policy says they don\u0027t have the authority to see it.","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"ab9897777c58d2e526a236c6da6b9d1369c9f571","unresolved":false,"context_lines":[{"line_number":80,"context_line":"          \"numa_topology\": {"},{"line_number":81,"context_line":"               \"cells\":["},{"line_number":82,"context_line":"                         {"},{"line_number":83,"context_line":"                           \"physical_mapping\":{  #admin only"},{"line_number":84,"context_line":"                                    \"numa_node\" : 3       # Host Numa Node"},{"line_number":85,"context_line":"                                    \"cpu_pinning\": [[0,5], [1,6]],"},{"line_number":86,"context_line":"                            }"}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_8f128afd","line":83,"in_reply_to":"3f79a3b5_91b4f91e","updated":"2018-10-25 08:56:12.000000000","message":"this filed controlled by a policy which lists below.","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":5754,"name":"Alex Xu","email":"hejie.xu@intel.com","username":"xuhj"},"change_message_id":"91c23628aba89ffef5bbcf4197e24c10c9aa7d68","unresolved":false,"context_lines":[{"line_number":88,"context_line":"                            \"siblings\": [[0,1],[2,3]],"},{"line_number":89,"context_line":"                            \"mem\": 1024,"},{"line_number":90,"context_line":"                            \"pagesize\": 4096,"},{"line_number":91,"context_line":"                            \"sockets\": 0,"},{"line_number":92,"context_line":"                            \"cores\": 2,"},{"line_number":93,"context_line":"                            \"thread\": 1,"},{"line_number":94,"context_line":"                            \"cpu_policy\": \"dedicated\","},{"line_number":95,"context_line":"                            \"cpu_thread_policy\": \"prefer\","},{"line_number":96,"context_line":"                          },"}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_5b68e986","line":93,"range":{"start_line":91,"start_character":28,"end_line":93,"end_character":40},"updated":"2018-10-23 05:26:08.000000000","message":"are you planning to calculate those fields for per cell?","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":5754,"name":"Alex Xu","email":"hejie.xu@intel.com","username":"xuhj"},"change_message_id":"91c23628aba89ffef5bbcf4197e24c10c9aa7d68","unresolved":false,"context_lines":[{"line_number":90,"context_line":"                            \"pagesize\": 4096,"},{"line_number":91,"context_line":"                            \"sockets\": 0,"},{"line_number":92,"context_line":"                            \"cores\": 2,"},{"line_number":93,"context_line":"                            \"thread\": 1,"},{"line_number":94,"context_line":"                            \"cpu_policy\": \"dedicated\","},{"line_number":95,"context_line":"                            \"cpu_thread_policy\": \"prefer\","},{"line_number":96,"context_line":"                          },"}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_1b5b51f9","line":93,"range":{"start_line":93,"start_character":29,"end_line":93,"end_character":35},"updated":"2018-10-23 05:26:08.000000000","message":"s/thread/threads/?","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"97049b2cf2c1991d53e1ea7054124625e8ebcaeb","unresolved":false,"context_lines":[{"line_number":90,"context_line":"                            \"pagesize\": 4096,"},{"line_number":91,"context_line":"                            \"sockets\": 0,"},{"line_number":92,"context_line":"                            \"cores\": 2,"},{"line_number":93,"context_line":"                            \"thread\": 1,"},{"line_number":94,"context_line":"                            \"cpu_policy\": \"dedicated\","},{"line_number":95,"context_line":"                            \"cpu_thread_policy\": \"prefer\","},{"line_number":96,"context_line":"                          },"}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_9076413f","line":93,"range":{"start_line":93,"start_character":29,"end_line":93,"end_character":35},"in_reply_to":"3f79a3b5_1b5b51f9","updated":"2018-10-24 07:34:05.000000000","message":"Done","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"97049b2cf2c1991d53e1ea7054124625e8ebcaeb","unresolved":false,"context_lines":[{"line_number":88,"context_line":"                            \"siblings\": [[0,1],[2,3]],"},{"line_number":89,"context_line":"                            \"mem\": 1024,"},{"line_number":90,"context_line":"                            \"pagesize\": 4096,"},{"line_number":91,"context_line":"                            \"sockets\": 0,"},{"line_number":92,"context_line":"                            \"cores\": 2,"},{"line_number":93,"context_line":"                            \"thread\": 1,"},{"line_number":94,"context_line":"                            \"cpu_policy\": \"dedicated\","},{"line_number":95,"context_line":"                            \"cpu_thread_policy\": \"prefer\","},{"line_number":96,"context_line":"                          },"}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_f08a1511","line":93,"range":{"start_line":91,"start_character":28,"end_line":93,"end_character":40},"in_reply_to":"3f79a3b5_5b68e986","updated":"2018-10-24 07:34:05.000000000","message":"i think the info already there. I\u0027d gonna to check it.","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":5754,"name":"Alex Xu","email":"hejie.xu@intel.com","username":"xuhj"},"change_message_id":"91c23628aba89ffef5bbcf4197e24c10c9aa7d68","unresolved":false,"context_lines":[{"line_number":91,"context_line":"                            \"sockets\": 0,"},{"line_number":92,"context_line":"                            \"cores\": 2,"},{"line_number":93,"context_line":"                            \"thread\": 1,"},{"line_number":94,"context_line":"                            \"cpu_policy\": \"dedicated\","},{"line_number":95,"context_line":"                            \"cpu_thread_policy\": \"prefer\","},{"line_number":96,"context_line":"                          },"},{"line_number":97,"context_line":"                          ..."},{"line_number":98,"context_line":"                   ] # cells"}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_fb5775c8","line":95,"range":{"start_line":94,"start_character":28,"end_line":95,"end_character":58},"updated":"2018-10-23 05:26:08.000000000","message":"Those two aren\u0027t per-cell configuration","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"ab9897777c58d2e526a236c6da6b9d1369c9f571","unresolved":false,"context_lines":[{"line_number":91,"context_line":"                            \"sockets\": 0,"},{"line_number":92,"context_line":"                            \"cores\": 2,"},{"line_number":93,"context_line":"                            \"thread\": 1,"},{"line_number":94,"context_line":"                            \"cpu_policy\": \"dedicated\","},{"line_number":95,"context_line":"                            \"cpu_thread_policy\": \"prefer\","},{"line_number":96,"context_line":"                          },"},{"line_number":97,"context_line":"                          ..."},{"line_number":98,"context_line":"                   ] # cells"}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_0fad1aa3","line":95,"range":{"start_line":94,"start_character":28,"end_line":95,"end_character":58},"in_reply_to":"3f79a3b5_225cb5ee","updated":"2018-10-25 08:56:12.000000000","message":"thanks.","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":8768,"name":"Chris Friesen","email":"chris.friesen@windriver.com","username":"cbf123"},"change_message_id":"bca107694e18c6855d72095ad0bcb5043fa81179","unresolved":false,"context_lines":[{"line_number":91,"context_line":"                            \"sockets\": 0,"},{"line_number":92,"context_line":"                            \"cores\": 2,"},{"line_number":93,"context_line":"                            \"thread\": 1,"},{"line_number":94,"context_line":"                            \"cpu_policy\": \"dedicated\","},{"line_number":95,"context_line":"                            \"cpu_thread_policy\": \"prefer\","},{"line_number":96,"context_line":"                          },"},{"line_number":97,"context_line":"                          ..."},{"line_number":98,"context_line":"                   ] # cells"}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_225cb5ee","line":95,"range":{"start_line":94,"start_character":28,"end_line":95,"end_character":58},"in_reply_to":"3f79a3b5_d0aef97e","updated":"2018-10-24 18:09:48.000000000","message":"They\u0027re per-cell currently, but they`re the same for all cells so effectively they\u0027re per instance.","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"97049b2cf2c1991d53e1ea7054124625e8ebcaeb","unresolved":false,"context_lines":[{"line_number":91,"context_line":"                            \"sockets\": 0,"},{"line_number":92,"context_line":"                            \"cores\": 2,"},{"line_number":93,"context_line":"                            \"thread\": 1,"},{"line_number":94,"context_line":"                            \"cpu_policy\": \"dedicated\","},{"line_number":95,"context_line":"                            \"cpu_thread_policy\": \"prefer\","},{"line_number":96,"context_line":"                          },"},{"line_number":97,"context_line":"                          ..."},{"line_number":98,"context_line":"                   ] # cells"}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_d0aef97e","line":95,"range":{"start_line":94,"start_character":28,"end_line":95,"end_character":58},"in_reply_to":"3f79a3b5_fb5775c8","updated":"2018-10-24 07:34:05.000000000","message":"seems so, like it belongs to cell internally, i\u0027d gonna make sure of this.","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":5754,"name":"Alex Xu","email":"hejie.xu@intel.com","username":"xuhj"},"change_message_id":"91c23628aba89ffef5bbcf4197e24c10c9aa7d68","unresolved":false,"context_lines":[{"line_number":97,"context_line":"                          ..."},{"line_number":98,"context_line":"                   ] # cells"},{"line_number":99,"context_line":""},{"line_number":100,"context_line":"                  \"emulator_threads_policy\": \"share\""},{"line_number":101,"context_line":"             } # numa_topology"},{"line_number":102,"context_line":""},{"line_number":103,"context_line":"            \"pci_devices\": [  # pci devices which don\u0027t report NUMA node"}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_db3b9998","line":100,"range":{"start_line":100,"start_character":18,"end_line":100,"end_character":52},"updated":"2018-10-23 05:26:08.000000000","message":"I guess this field should be out of the NUMA structure?","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"ab9897777c58d2e526a236c6da6b9d1369c9f571","unresolved":false,"context_lines":[{"line_number":97,"context_line":"                          ..."},{"line_number":98,"context_line":"                   ] # cells"},{"line_number":99,"context_line":""},{"line_number":100,"context_line":"                  \"emulator_threads_policy\": \"share\""},{"line_number":101,"context_line":"             } # numa_topology"},{"line_number":102,"context_line":""},{"line_number":103,"context_line":"            \"pci_devices\": [  # pci devices which don\u0027t report NUMA node"}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_4f9c726f","line":100,"range":{"start_line":100,"start_character":18,"end_line":100,"end_character":52},"in_reply_to":"3f79a3b5_48c8f3a5","updated":"2018-10-25 08:56:12.000000000","message":"i\u0027m gonna take it out of the \"numa_topology\"","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":8768,"name":"Chris Friesen","email":"chris.friesen@windriver.com","username":"cbf123"},"change_message_id":"bca107694e18c6855d72095ad0bcb5043fa81179","unresolved":false,"context_lines":[{"line_number":97,"context_line":"                          ..."},{"line_number":98,"context_line":"                   ] # cells"},{"line_number":99,"context_line":""},{"line_number":100,"context_line":"                  \"emulator_threads_policy\": \"share\""},{"line_number":101,"context_line":"             } # numa_topology"},{"line_number":102,"context_line":""},{"line_number":103,"context_line":"            \"pci_devices\": [  # pci devices which don\u0027t report NUMA node"}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_48c8f3a5","line":100,"range":{"start_line":100,"start_character":18,"end_line":100,"end_character":52},"in_reply_to":"3f79a3b5_714cbd3f","updated":"2018-10-24 18:09:48.000000000","message":"The emulator threads policy is an important piece of information about the instance, and I think it should be displayed somehow in server details.","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"ab9897777c58d2e526a236c6da6b9d1369c9f571","unresolved":false,"context_lines":[{"line_number":97,"context_line":"                          ..."},{"line_number":98,"context_line":"                   ] # cells"},{"line_number":99,"context_line":""},{"line_number":100,"context_line":"                  \"emulator_threads_policy\": \"share\""},{"line_number":101,"context_line":"             } # numa_topology"},{"line_number":102,"context_line":""},{"line_number":103,"context_line":"            \"pci_devices\": [  # pci devices which don\u0027t report NUMA node"}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_8fc04a4d","line":100,"range":{"start_line":100,"start_character":18,"end_line":100,"end_character":52},"in_reply_to":"3f79a3b5_714cbd3f","updated":"2018-10-25 08:56:12.000000000","message":"sure, got it.","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":7166,"name":"Sylvain Bauza","email":"sbauza@redhat.com","username":"sbauza"},"change_message_id":"331548af46322d00abf3912b0519577455d778bf","unresolved":false,"context_lines":[{"line_number":97,"context_line":"                          ..."},{"line_number":98,"context_line":"                   ] # cells"},{"line_number":99,"context_line":""},{"line_number":100,"context_line":"                  \"emulator_threads_policy\": \"share\""},{"line_number":101,"context_line":"             } # numa_topology"},{"line_number":102,"context_line":""},{"line_number":103,"context_line":"            \"pci_devices\": [  # pci devices which don\u0027t report NUMA node"}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_714cbd3f","line":100,"range":{"start_line":100,"start_character":18,"end_line":100,"end_character":52},"in_reply_to":"3f79a3b5_b0dedd0c","updated":"2018-10-24 15:44:08.000000000","message":"No, it\u0027s not NUMA topology. It\u0027s an HPC/NFV feature, but that\u0027s not because we check it by the NUMA filter that it\u0027s a NUMA feature :-)","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"97049b2cf2c1991d53e1ea7054124625e8ebcaeb","unresolved":false,"context_lines":[{"line_number":97,"context_line":"                          ..."},{"line_number":98,"context_line":"                   ] # cells"},{"line_number":99,"context_line":""},{"line_number":100,"context_line":"                  \"emulator_threads_policy\": \"share\""},{"line_number":101,"context_line":"             } # numa_topology"},{"line_number":102,"context_line":""},{"line_number":103,"context_line":"            \"pci_devices\": [  # pci devices which don\u0027t report NUMA node"}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_b0dedd0c","line":100,"range":{"start_line":100,"start_character":18,"end_line":100,"end_character":52},"in_reply_to":"3f79a3b5_db3b9998","updated":"2018-10-24 07:34:05.000000000","message":"this is kind of Numa info, cause it\u0027s internally put there, but i\u0027m also ok take this out. \n\nanother angle to think about this is, the policy is very similar to cpu thread, keep it here also reasonable?\n\nif you insist, i would like to take it out.","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":5754,"name":"Alex Xu","email":"hejie.xu@intel.com","username":"xuhj"},"change_message_id":"91c23628aba89ffef5bbcf4197e24c10c9aa7d68","unresolved":false,"context_lines":[{"line_number":98,"context_line":"                   ] # cells"},{"line_number":99,"context_line":""},{"line_number":100,"context_line":"                  \"emulator_threads_policy\": \"share\""},{"line_number":101,"context_line":"             } # numa_topology"},{"line_number":102,"context_line":""},{"line_number":103,"context_line":"            \"pci_devices\": [  # pci devices which don\u0027t report NUMA node"},{"line_number":104,"context_line":"                            {"}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_7bb5a518","line":101,"range":{"start_line":101,"start_character":10,"end_line":101,"end_character":13},"updated":"2018-10-23 05:26:08.000000000","message":"some alignment problem","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"97049b2cf2c1991d53e1ea7054124625e8ebcaeb","unresolved":false,"context_lines":[{"line_number":98,"context_line":"                   ] # cells"},{"line_number":99,"context_line":""},{"line_number":100,"context_line":"                  \"emulator_threads_policy\": \"share\""},{"line_number":101,"context_line":"             } # numa_topology"},{"line_number":102,"context_line":""},{"line_number":103,"context_line":"            \"pci_devices\": [  # pci devices which don\u0027t report NUMA node"},{"line_number":104,"context_line":"                            {"}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_70c7e547","line":101,"range":{"start_line":101,"start_character":10,"end_line":101,"end_character":13},"in_reply_to":"3f79a3b5_7bb5a518","updated":"2018-10-24 07:34:05.000000000","message":"Done","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":7166,"name":"Sylvain Bauza","email":"sbauza@redhat.com","username":"sbauza"},"change_message_id":"331548af46322d00abf3912b0519577455d778bf","unresolved":false,"context_lines":[{"line_number":100,"context_line":"                  \"emulator_threads_policy\": \"share\""},{"line_number":101,"context_line":"             } # numa_topology"},{"line_number":102,"context_line":""},{"line_number":103,"context_line":"            \"pci_devices\": [  # pci devices which don\u0027t report NUMA node"},{"line_number":104,"context_line":"                            {"},{"line_number":105,"context_line":"                               \"physical\":{  #admin only"},{"line_number":106,"context_line":"                                  \"address\":\"00:1a.0\","}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_f151add6","line":103,"updated":"2018-10-24 15:44:08.000000000","message":"how do you plan to discover it ? What if those devices are NUMA related ?","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"ab9897777c58d2e526a236c6da6b9d1369c9f571","unresolved":false,"context_lines":[{"line_number":100,"context_line":"                  \"emulator_threads_policy\": \"share\""},{"line_number":101,"context_line":"             } # numa_topology"},{"line_number":102,"context_line":""},{"line_number":103,"context_line":"            \"pci_devices\": [  # pci devices which don\u0027t report NUMA node"},{"line_number":104,"context_line":"                            {"},{"line_number":105,"context_line":"                               \"physical\":{  #admin only"},{"line_number":106,"context_line":"                                  \"address\":\"00:1a.0\","}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_af92e653","line":103,"in_reply_to":"3f79a3b5_68b7eff9","updated":"2018-10-25 08:56:12.000000000","message":"whether it report or not, we display pci_devices anyway. this comment is misleading.","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"ab9897777c58d2e526a236c6da6b9d1369c9f571","unresolved":false,"context_lines":[{"line_number":100,"context_line":"                  \"emulator_threads_policy\": \"share\""},{"line_number":101,"context_line":"             } # numa_topology"},{"line_number":102,"context_line":""},{"line_number":103,"context_line":"            \"pci_devices\": [  # pci devices which don\u0027t report NUMA node"},{"line_number":104,"context_line":"                            {"},{"line_number":105,"context_line":"                               \"physical\":{  #admin only"},{"line_number":106,"context_line":"                                  \"address\":\"00:1a.0\","}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_ef8c5e3a","line":103,"in_reply_to":"3f79a3b5_f151add6","updated":"2018-10-25 08:56:12.000000000","message":"here is some garbage info, refer to V3(on the way) patch.","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":8768,"name":"Chris Friesen","email":"chris.friesen@windriver.com","username":"cbf123"},"change_message_id":"bca107694e18c6855d72095ad0bcb5043fa81179","unresolved":false,"context_lines":[{"line_number":100,"context_line":"                  \"emulator_threads_policy\": \"share\""},{"line_number":101,"context_line":"             } # numa_topology"},{"line_number":102,"context_line":""},{"line_number":103,"context_line":"            \"pci_devices\": [  # pci devices which don\u0027t report NUMA node"},{"line_number":104,"context_line":"                            {"},{"line_number":105,"context_line":"                               \"physical\":{  #admin only"},{"line_number":106,"context_line":"                                  \"address\":\"00:1a.0\","}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_68b7eff9","line":103,"in_reply_to":"3f79a3b5_f151add6","updated":"2018-10-24 18:09:48.000000000","message":"the PciDevice object reports numa_node, no?","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":7166,"name":"Sylvain Bauza","email":"sbauza@redhat.com","username":"sbauza"},"change_message_id":"331548af46322d00abf3912b0519577455d778bf","unresolved":false,"context_lines":[{"line_number":116,"context_line":"          } # server"},{"line_number":117,"context_line":"    }"},{"line_number":118,"context_line":""},{"line_number":119,"context_line":"\u0027cpu_pinning\u0027 information is only available for admin."},{"line_number":120,"context_line":""},{"line_number":121,"context_line":"\"GET /servers/detail\" returned same information as above."},{"line_number":122,"context_line":""}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_b1e25501","line":119,"updated":"2018-10-24 15:44:08.000000000","message":"how do you plan to know which specific pCPUs are used ?\nAFAICU, only the virt driver knows this, but we don\u0027t have this in the DB. So, if you\u0027d like to get it by the API, you would need to call the compute service, which is a problem given API calls should be async.","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":8768,"name":"Chris Friesen","email":"chris.friesen@windriver.com","username":"cbf123"},"change_message_id":"bca107694e18c6855d72095ad0bcb5043fa81179","unresolved":false,"context_lines":[{"line_number":116,"context_line":"          } # server"},{"line_number":117,"context_line":"    }"},{"line_number":118,"context_line":""},{"line_number":119,"context_line":"\u0027cpu_pinning\u0027 information is only available for admin."},{"line_number":120,"context_line":""},{"line_number":121,"context_line":"\"GET /servers/detail\" returned same information as above."},{"line_number":122,"context_line":""}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_c2438110","line":119,"in_reply_to":"3f79a3b5_b1e25501","updated":"2018-10-24 18:09:48.000000000","message":"It\u0027s actually in the DB, in InstanceNUMACell.cpu_pinning_raw","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"ab9897777c58d2e526a236c6da6b9d1369c9f571","unresolved":false,"context_lines":[{"line_number":116,"context_line":"          } # server"},{"line_number":117,"context_line":"    }"},{"line_number":118,"context_line":""},{"line_number":119,"context_line":"\u0027cpu_pinning\u0027 information is only available for admin."},{"line_number":120,"context_line":""},{"line_number":121,"context_line":"\"GET /servers/detail\" returned same information as above."},{"line_number":122,"context_line":""}],"source_content_type":"text/x-rst","patch_set":1,"id":"3f79a3b5_cf78822d","line":119,"in_reply_to":"3f79a3b5_c2438110","updated":"2018-10-25 08:56:12.000000000","message":"thanks. i do think so, fix me.","commit_id":"ce479aad7bfe93e41a252222460c6de86d81af0c"},{"author":{"_account_id":7166,"name":"Sylvain Bauza","email":"sbauza@redhat.com","username":"sbauza"},"change_message_id":"331548af46322d00abf3912b0519577455d778bf","unresolved":false,"context_lines":[{"line_number":17,"context_line":""},{"line_number":18,"context_line":"Currently, nova API \"GET /servers/{id}\" and \"GET /servers\" can list the extra"},{"line_number":19,"context_line":"spec contain some hints for guest numa topology but not easy to interpret, and"},{"line_number":20,"context_line":"the PCI devices is also NUMA resouces should expose to admin/Tenant."},{"line_number":21,"context_line":""},{"line_number":22,"context_line":"In nova, NUMA topology contains group of related properties, like mem size,"},{"line_number":23,"context_line":"page size, cpu pin, cpu/thread policy. This Spec proposal a API to present all"}],"source_content_type":"text/x-rst","patch_set":2,"id":"3f79a3b5_51a2e1ae","line":20,"range":{"start_line":20,"start_character":60,"end_line":20,"end_character":67},"updated":"2018-10-24 15:44:08.000000000","message":"please don\u0027t use \"tenant\" name for saying about admins.","commit_id":"5ac9ee1dca11ad6fe5c8e3480d51d2aa9b6d9276"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"ec92c05912a04ea8d8a85e19d118491961d4813c","unresolved":false,"context_lines":[{"line_number":17,"context_line":""},{"line_number":18,"context_line":"Currently, nova API \"GET /servers/{id}\" and \"GET /servers\" can list the extra"},{"line_number":19,"context_line":"spec contain some hints for guest numa topology but not easy to interpret, and"},{"line_number":20,"context_line":"the PCI devices is also NUMA resouces should expose to admin/Tenant."},{"line_number":21,"context_line":""},{"line_number":22,"context_line":"In nova, NUMA topology contains group of related properties, like mem size,"},{"line_number":23,"context_line":"page size, cpu pin, cpu/thread policy. This Spec proposal a API to present all"}],"source_content_type":"text/x-rst","patch_set":2,"id":"3f79a3b5_d55236da","line":20,"range":{"start_line":20,"start_character":60,"end_line":20,"end_character":67},"in_reply_to":"3f79a3b5_089670ef","updated":"2018-10-26 01:36:39.000000000","message":"thanks. i got to change it to end user for clarifying.","commit_id":"5ac9ee1dca11ad6fe5c8e3480d51d2aa9b6d9276"},{"author":{"_account_id":8768,"name":"Chris Friesen","email":"chris.friesen@windriver.com","username":"cbf123"},"change_message_id":"43f1b6907126edab51e4c839697627492708e0b6","unresolved":false,"context_lines":[{"line_number":17,"context_line":""},{"line_number":18,"context_line":"Currently, nova API \"GET /servers/{id}\" and \"GET /servers\" can list the extra"},{"line_number":19,"context_line":"spec contain some hints for guest numa topology but not easy to interpret, and"},{"line_number":20,"context_line":"the PCI devices is also NUMA resouces should expose to admin/Tenant."},{"line_number":21,"context_line":""},{"line_number":22,"context_line":"In nova, NUMA topology contains group of related properties, like mem size,"},{"line_number":23,"context_line":"page size, cpu pin, cpu/thread policy. This Spec proposal a API to present all"}],"source_content_type":"text/x-rst","patch_set":2,"id":"3f79a3b5_089670ef","line":20,"range":{"start_line":20,"start_character":60,"end_line":20,"end_character":67},"in_reply_to":"3f79a3b5_51a2e1ae","updated":"2018-10-25 07:23:01.000000000","message":"I think he\u0027s talking about regular users in the tenant that owns the instance.","commit_id":"5ac9ee1dca11ad6fe5c8e3480d51d2aa9b6d9276"},{"author":{"_account_id":7166,"name":"Sylvain Bauza","email":"sbauza@redhat.com","username":"sbauza"},"change_message_id":"331548af46322d00abf3912b0519577455d778bf","unresolved":false,"context_lines":[{"line_number":22,"context_line":"In nova, NUMA topology contains group of related properties, like mem size,"},{"line_number":23,"context_line":"page size, cpu pin, cpu/thread policy. This Spec proposal a API to present all"},{"line_number":24,"context_line":"these NUMA information, including the virtual to physical mapping with the"},{"line_number":25,"context_line":"corresponding PCI device in the NUMA cell."},{"line_number":26,"context_line":""},{"line_number":27,"context_line":""},{"line_number":28,"context_line":""}],"source_content_type":"text/x-rst","patch_set":2,"id":"3f79a3b5_f1ad2da4","line":25,"updated":"2018-10-24 15:44:08.000000000","message":"you should comment about the policy you\u0027d like to use.","commit_id":"5ac9ee1dca11ad6fe5c8e3480d51d2aa9b6d9276"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"ec92c05912a04ea8d8a85e19d118491961d4813c","unresolved":false,"context_lines":[{"line_number":22,"context_line":"In nova, NUMA topology contains group of related properties, like mem size,"},{"line_number":23,"context_line":"page size, cpu pin, cpu/thread policy. This Spec proposal a API to present all"},{"line_number":24,"context_line":"these NUMA information, including the virtual to physical mapping with the"},{"line_number":25,"context_line":"corresponding PCI device in the NUMA cell."},{"line_number":26,"context_line":""},{"line_number":27,"context_line":""},{"line_number":28,"context_line":""}],"source_content_type":"text/x-rst","patch_set":2,"id":"3f79a3b5_f555f2c1","line":25,"in_reply_to":"3f79a3b5_f1ad2da4","updated":"2018-10-26 01:36:39.000000000","message":"Done","commit_id":"5ac9ee1dca11ad6fe5c8e3480d51d2aa9b6d9276"},{"author":{"_account_id":7166,"name":"Sylvain Bauza","email":"sbauza@redhat.com","username":"sbauza"},"change_message_id":"331548af46322d00abf3912b0519577455d778bf","unresolved":false,"context_lines":[{"line_number":30,"context_line":"Use Cases"},{"line_number":31,"context_line":"---------"},{"line_number":32,"context_line":""},{"line_number":33,"context_line":"* Tenant wants to know the overall view of the topology of multiple instances"},{"line_number":34,"context_line":"  and do not want to login VM one by one to collect them."},{"line_number":35,"context_line":""},{"line_number":36,"context_line":"* Admin want check the vcpu set of the NUMA cell and cpu pin information to"}],"source_content_type":"text/x-rst","patch_set":2,"id":"3f79a3b5_518bc11c","line":33,"range":{"start_line":33,"start_character":2,"end_line":33,"end_character":8},"updated":"2018-10-24 15:44:08.000000000","message":"s/tenant/admin again and I don\u0027t see the difference with the third bullet below.","commit_id":"5ac9ee1dca11ad6fe5c8e3480d51d2aa9b6d9276"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"ec92c05912a04ea8d8a85e19d118491961d4813c","unresolved":false,"context_lines":[{"line_number":30,"context_line":"Use Cases"},{"line_number":31,"context_line":"---------"},{"line_number":32,"context_line":""},{"line_number":33,"context_line":"* Tenant wants to know the overall view of the topology of multiple instances"},{"line_number":34,"context_line":"  and do not want to login VM one by one to collect them."},{"line_number":35,"context_line":""},{"line_number":36,"context_line":"* Admin want check the vcpu set of the NUMA cell and cpu pin information to"}],"source_content_type":"text/x-rst","patch_set":2,"id":"3f79a3b5_3505aac1","line":33,"range":{"start_line":33,"start_character":2,"end_line":33,"end_character":8},"in_reply_to":"3f79a3b5_48c22804","updated":"2018-10-26 01:36:39.000000000","message":"thanks.","commit_id":"5ac9ee1dca11ad6fe5c8e3480d51d2aa9b6d9276"},{"author":{"_account_id":8768,"name":"Chris Friesen","email":"chris.friesen@windriver.com","username":"cbf123"},"change_message_id":"43f1b6907126edab51e4c839697627492708e0b6","unresolved":false,"context_lines":[{"line_number":30,"context_line":"Use Cases"},{"line_number":31,"context_line":"---------"},{"line_number":32,"context_line":""},{"line_number":33,"context_line":"* Tenant wants to know the overall view of the topology of multiple instances"},{"line_number":34,"context_line":"  and do not want to login VM one by one to collect them."},{"line_number":35,"context_line":""},{"line_number":36,"context_line":"* Admin want check the vcpu set of the NUMA cell and cpu pin information to"}],"source_content_type":"text/x-rst","patch_set":2,"id":"3f79a3b5_48c22804","line":33,"range":{"start_line":33,"start_character":2,"end_line":33,"end_character":8},"in_reply_to":"3f79a3b5_518bc11c","updated":"2018-10-25 07:23:01.000000000","message":"This is really the non-admin end-user case.  They want to see the topology of their instances without the hassle of logging in to each one.  It\u0027s a usability/convenience thing.","commit_id":"5ac9ee1dca11ad6fe5c8e3480d51d2aa9b6d9276"},{"author":{"_account_id":8768,"name":"Chris Friesen","email":"chris.friesen@windriver.com","username":"cbf123"},"change_message_id":"43f1b6907126edab51e4c839697627492708e0b6","unresolved":false,"context_lines":[{"line_number":33,"context_line":"* Tenant wants to know the overall view of the topology of multiple instances"},{"line_number":34,"context_line":"  and do not want to login VM one by one to collect them."},{"line_number":35,"context_line":""},{"line_number":36,"context_line":"* Admin want check the vcpu set of the NUMA cell and cpu pin information to"},{"line_number":37,"context_line":"  analysis host performance issue."},{"line_number":38,"context_line":""},{"line_number":39,"context_line":"* Admin check NUMA topology to make sure the Instance NUMA properly mapped to"},{"line_number":40,"context_line":"  Host."},{"line_number":41,"context_line":""},{"line_number":42,"context_line":"* Customer complain PCI Passthrough NIC performance issue, Admin want check"},{"line_number":43,"context_line":"  NUMA topology to identify the possible reason."},{"line_number":44,"context_line":""},{"line_number":45,"context_line":""},{"line_number":46,"context_line":""}],"source_content_type":"text/x-rst","patch_set":2,"id":"3f79a3b5_a84dfc93","line":43,"range":{"start_line":36,"start_character":1,"end_line":43,"end_character":48},"updated":"2018-10-25 07:23:01.000000000","message":"These are all variations on a theme, which is to give admins easy access to the virtual/physical mapping for an instance for monitoring/debugging purposes.","commit_id":"5ac9ee1dca11ad6fe5c8e3480d51d2aa9b6d9276"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"ec92c05912a04ea8d8a85e19d118491961d4813c","unresolved":false,"context_lines":[{"line_number":33,"context_line":"* Tenant wants to know the overall view of the topology of multiple instances"},{"line_number":34,"context_line":"  and do not want to login VM one by one to collect them."},{"line_number":35,"context_line":""},{"line_number":36,"context_line":"* Admin want check the vcpu set of the NUMA cell and cpu pin information to"},{"line_number":37,"context_line":"  analysis host performance issue."},{"line_number":38,"context_line":""},{"line_number":39,"context_line":"* Admin check NUMA topology to make sure the Instance NUMA properly mapped to"},{"line_number":40,"context_line":"  Host."},{"line_number":41,"context_line":""},{"line_number":42,"context_line":"* Customer complain PCI Passthrough NIC performance issue, Admin want check"},{"line_number":43,"context_line":"  NUMA topology to identify the possible reason."},{"line_number":44,"context_line":""},{"line_number":45,"context_line":""},{"line_number":46,"context_line":""}],"source_content_type":"text/x-rst","patch_set":2,"id":"3f79a3b5_95f59ece","line":43,"range":{"start_line":36,"start_character":1,"end_line":43,"end_character":48},"in_reply_to":"3f79a3b5_a84dfc93","updated":"2018-10-26 01:36:39.000000000","message":"good catch, monitoring and regulating the Numa mapping is key to achieve low latency or high throughput.","commit_id":"5ac9ee1dca11ad6fe5c8e3480d51d2aa9b6d9276"},{"author":{"_account_id":7166,"name":"Sylvain Bauza","email":"sbauza@redhat.com","username":"sbauza"},"change_message_id":"331548af46322d00abf3912b0519577455d778bf","unresolved":false,"context_lines":[{"line_number":42,"context_line":"* Customer complain PCI Passthrough NIC performance issue, Admin want check"},{"line_number":43,"context_line":"  NUMA topology to identify the possible reason."},{"line_number":44,"context_line":""},{"line_number":45,"context_line":""},{"line_number":46,"context_line":""},{"line_number":47,"context_line":"Proposed change"},{"line_number":48,"context_line":"\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d"}],"source_content_type":"text/x-rst","patch_set":2,"id":"3f79a3b5_916cf96b","line":45,"updated":"2018-10-24 15:44:08.000000000","message":"I don\u0027t see any usecase for an end-user but you want to provide guest numa topology for end-users. I think either you shouldn\u0027t pass the guest numa topology to the user if you don\u0027t have usecases, or you should add some usecase explaining why it\u0027s important.","commit_id":"5ac9ee1dca11ad6fe5c8e3480d51d2aa9b6d9276"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"ec92c05912a04ea8d8a85e19d118491961d4813c","unresolved":false,"context_lines":[{"line_number":42,"context_line":"* Customer complain PCI Passthrough NIC performance issue, Admin want check"},{"line_number":43,"context_line":"  NUMA topology to identify the possible reason."},{"line_number":44,"context_line":""},{"line_number":45,"context_line":""},{"line_number":46,"context_line":""},{"line_number":47,"context_line":"Proposed change"},{"line_number":48,"context_line":"\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d"}],"source_content_type":"text/x-rst","patch_set":2,"id":"3f79a3b5_b5f0dadb","line":45,"in_reply_to":"3f79a3b5_916cf96b","updated":"2018-10-26 01:36:39.000000000","message":"i\u0027m adding it, thanks.","commit_id":"5ac9ee1dca11ad6fe5c8e3480d51d2aa9b6d9276"},{"author":{"_account_id":7166,"name":"Sylvain Bauza","email":"sbauza@redhat.com","username":"sbauza"},"change_message_id":"331548af46322d00abf3912b0519577455d778bf","unresolved":false,"context_lines":[{"line_number":77,"context_line":""},{"line_number":78,"context_line":"    {"},{"line_number":79,"context_line":"        \"server\": {"},{"line_number":80,"context_line":"          \"numa_topology\": {"},{"line_number":81,"context_line":"               \"cells\":["},{"line_number":82,"context_line":"                         {"},{"line_number":83,"context_line":"                           \"physical_mapping\":{  #admin only"}],"source_content_type":"text/x-rst","patch_set":2,"id":"3f79a3b5_51b981c8","line":80,"updated":"2018-10-24 15:44:08.000000000","message":"it\u0027s still unclear to me whether the whole numa_topology field will be passed to end-users or not, or if that would be per-specific-policy","commit_id":"5ac9ee1dca11ad6fe5c8e3480d51d2aa9b6d9276"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"ab9897777c58d2e526a236c6da6b9d1369c9f571","unresolved":false,"context_lines":[{"line_number":77,"context_line":""},{"line_number":78,"context_line":"    {"},{"line_number":79,"context_line":"        \"server\": {"},{"line_number":80,"context_line":"          \"numa_topology\": {"},{"line_number":81,"context_line":"               \"cells\":["},{"line_number":82,"context_line":"                         {"},{"line_number":83,"context_line":"                           \"physical_mapping\":{  #admin only"}],"source_content_type":"text/x-rst","patch_set":2,"id":"3f79a3b5_7e31da09","line":80,"in_reply_to":"3f79a3b5_51b981c8","updated":"2018-10-25 08:56:12.000000000","message":"the physical_mapping controlled by policy, only allow admin to access.\n\nthis section need some comments i think. thanks.","commit_id":"5ac9ee1dca11ad6fe5c8e3480d51d2aa9b6d9276"},{"author":{"_account_id":7166,"name":"Sylvain Bauza","email":"sbauza@redhat.com","username":"sbauza"},"change_message_id":"331548af46322d00abf3912b0519577455d778bf","unresolved":false,"context_lines":[{"line_number":97,"context_line":"                          ..."},{"line_number":98,"context_line":"                   ] # cells"},{"line_number":99,"context_line":""},{"line_number":100,"context_line":"                  \"emulator_threads_policy\": \"share\""},{"line_number":101,"context_line":"            } # numa_topology"},{"line_number":102,"context_line":""},{"line_number":103,"context_line":"            \"pci_devices\": [  # pci devices which don\u0027t report NUMA node"}],"source_content_type":"text/x-rst","patch_set":2,"id":"3f79a3b5_71bd9db0","line":100,"updated":"2018-10-24 15:44:08.000000000","message":"No, this is not NUMA information. It\u0027s related because we have a NUMATopologyFilter that also does non-NUMA checks but don\u0027t put it in the numa_topology field then.","commit_id":"5ac9ee1dca11ad6fe5c8e3480d51d2aa9b6d9276"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"ab9897777c58d2e526a236c6da6b9d1369c9f571","unresolved":false,"context_lines":[{"line_number":97,"context_line":"                          ..."},{"line_number":98,"context_line":"                   ] # cells"},{"line_number":99,"context_line":""},{"line_number":100,"context_line":"                  \"emulator_threads_policy\": \"share\""},{"line_number":101,"context_line":"            } # numa_topology"},{"line_number":102,"context_line":""},{"line_number":103,"context_line":"            \"pci_devices\": [  # pci devices which don\u0027t report NUMA node"}],"source_content_type":"text/x-rst","patch_set":2,"id":"3f79a3b5_de1fce6e","line":100,"in_reply_to":"3f79a3b5_71bd9db0","updated":"2018-10-25 08:56:12.000000000","message":"seems need to move out the the numa_topology structure.","commit_id":"5ac9ee1dca11ad6fe5c8e3480d51d2aa9b6d9276"},{"author":{"_account_id":7166,"name":"Sylvain Bauza","email":"sbauza@redhat.com","username":"sbauza"},"change_message_id":"331548af46322d00abf3912b0519577455d778bf","unresolved":false,"context_lines":[{"line_number":100,"context_line":"                  \"emulator_threads_policy\": \"share\""},{"line_number":101,"context_line":"            } # numa_topology"},{"line_number":102,"context_line":""},{"line_number":103,"context_line":"            \"pci_devices\": [  # pci devices which don\u0027t report NUMA node"},{"line_number":104,"context_line":"                            {"},{"line_number":105,"context_line":"                               \"physical\":{  #admin only"},{"line_number":106,"context_line":"                                  \"address\":\"00:1a.0\","}],"source_content_type":"text/x-rst","patch_set":2,"id":"3f79a3b5_d1c91151","line":103,"updated":"2018-10-24 15:44:08.000000000","message":"how do you plan to discover it ? What if those devices are NUMA related ?","commit_id":"5ac9ee1dca11ad6fe5c8e3480d51d2aa9b6d9276"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"ab9897777c58d2e526a236c6da6b9d1369c9f571","unresolved":false,"context_lines":[{"line_number":100,"context_line":"                  \"emulator_threads_policy\": \"share\""},{"line_number":101,"context_line":"            } # numa_topology"},{"line_number":102,"context_line":""},{"line_number":103,"context_line":"            \"pci_devices\": [  # pci devices which don\u0027t report NUMA node"},{"line_number":104,"context_line":"                            {"},{"line_number":105,"context_line":"                               \"physical\":{  #admin only"},{"line_number":106,"context_line":"                                  \"address\":\"00:1a.0\","}],"source_content_type":"text/x-rst","patch_set":2,"id":"3f79a3b5_5e15fe4a","line":103,"in_reply_to":"3f79a3b5_d1c91151","updated":"2018-10-25 08:56:12.000000000","message":"my bad, those words it\u0027s come from an older version. good catch, thanks.","commit_id":"5ac9ee1dca11ad6fe5c8e3480d51d2aa9b6d9276"},{"author":{"_account_id":7166,"name":"Sylvain Bauza","email":"sbauza@redhat.com","username":"sbauza"},"change_message_id":"331548af46322d00abf3912b0519577455d778bf","unresolved":false,"context_lines":[{"line_number":116,"context_line":"          } # server"},{"line_number":117,"context_line":"    }"},{"line_number":118,"context_line":""},{"line_number":119,"context_line":"\u0027cpu_pinning\u0027 information is only available for admin."},{"line_number":120,"context_line":""},{"line_number":121,"context_line":"\"GET /servers/detail\" returned same information as above."},{"line_number":122,"context_line":""}],"source_content_type":"text/x-rst","patch_set":2,"id":"3f79a3b5_3102c573","line":119,"updated":"2018-10-24 15:44:08.000000000","message":"how do you plan to know which specific pCPUs are used ? AFAICU, only the virt driver knows this, but we don\u0027t have this in the DB. So, if you\u0027d like to get it by the API, you would need to call the compute service, which is a problem given API calls should be async.","commit_id":"5ac9ee1dca11ad6fe5c8e3480d51d2aa9b6d9276"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"ab9897777c58d2e526a236c6da6b9d1369c9f571","unresolved":false,"context_lines":[{"line_number":116,"context_line":"          } # server"},{"line_number":117,"context_line":"    }"},{"line_number":118,"context_line":""},{"line_number":119,"context_line":"\u0027cpu_pinning\u0027 information is only available for admin."},{"line_number":120,"context_line":""},{"line_number":121,"context_line":"\"GET /servers/detail\" returned same information as above."},{"line_number":122,"context_line":""}],"source_content_type":"text/x-rst","patch_set":2,"id":"3f79a3b5_9efe3605","line":119,"in_reply_to":"3f79a3b5_3102c573","updated":"2018-10-25 08:56:12.000000000","message":"Chris Friesen and I think the InstanceNUMACell.cpu_pinning_raw had it. hope this help.","commit_id":"5ac9ee1dca11ad6fe5c8e3480d51d2aa9b6d9276"},{"author":{"_account_id":5754,"name":"Alex Xu","email":"hejie.xu@intel.com","username":"xuhj"},"change_message_id":"b5f523f079195d02bed4f84f239cc605727fad83","unresolved":false,"context_lines":[{"line_number":98,"context_line":"                            \"sockets\": 0,"},{"line_number":99,"context_line":"                            \"cores\": 2,"},{"line_number":100,"context_line":"                            \"threads\": 1,"},{"line_number":101,"context_line":"                            \"cpu_policy\": \"dedicated\","},{"line_number":102,"context_line":"                            \"cpu_thread_policy\": \"prefer\","},{"line_number":103,"context_line":"                          },"},{"line_number":104,"context_line":"                          ..."}],"source_content_type":"text/x-rst","patch_set":5,"id":"3f79a3b5_b5dc6117","line":101,"range":{"start_line":101,"start_character":29,"end_line":101,"end_character":53},"updated":"2018-11-08 07:52:51.000000000","message":"In this spec https://review.openstack.org/#/c/555081/21/specs/stein/approved/cpu-resources.rst@361\n\nJay wants to deprecate this related extra spec. Also people have plan for other numa/cpu pinning extra spec deprecation.\n\nSo...I\u0027m thinking we probably may not have those properites in the future when we move the numa affinity to the placement.\n\nMaybe we shouldn\u0027t show those policy properites for now.","commit_id":"eeb58c5621699693fa18c087095ba2a0429f60d2"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"036c449705022030cf88d3f27d540a4c38b99bff","unresolved":false,"context_lines":[{"line_number":98,"context_line":"                            \"sockets\": 0,"},{"line_number":99,"context_line":"                            \"cores\": 2,"},{"line_number":100,"context_line":"                            \"threads\": 1,"},{"line_number":101,"context_line":"                            \"cpu_policy\": \"dedicated\","},{"line_number":102,"context_line":"                            \"cpu_thread_policy\": \"prefer\","},{"line_number":103,"context_line":"                          },"},{"line_number":104,"context_line":"                          ..."}],"source_content_type":"text/x-rst","patch_set":5,"id":"3f79a3b5_4e679b24","line":101,"range":{"start_line":101,"start_character":29,"end_line":101,"end_character":53},"in_reply_to":"3f79a3b5_b5dc6117","updated":"2018-11-23 07:51:36.000000000","message":"Done","commit_id":"eeb58c5621699693fa18c087095ba2a0429f60d2"},{"author":{"_account_id":8768,"name":"Chris Friesen","email":"chris.friesen@windriver.com","username":"cbf123"},"change_message_id":"d686fdd1112458ecb92339c1faadbf7117895579","unresolved":false,"context_lines":[{"line_number":19,"context_line":"spec contain some hints for guest numa topology but not easy to interpret, and"},{"line_number":20,"context_line":"the PCI devices is also NUMA resouces should expose to Admin/End user."},{"line_number":21,"context_line":""},{"line_number":22,"context_line":"In nova, NUMA topology contains group of related properties, like mem size,"},{"line_number":23,"context_line":"page size, cpu pin, cpu/thread policy. This Spec proposal a API to present all"},{"line_number":24,"context_line":"these NUMA information, including the virtual to physical mapping with the"},{"line_number":25,"context_line":"corresponding PCI device in the NUMA cell."},{"line_number":26,"context_line":""},{"line_number":27,"context_line":""},{"line_number":28,"context_line":""}],"source_content_type":"text/x-rst","patch_set":7,"id":"3f79a3b5_0a0a28cf","line":25,"range":{"start_line":22,"start_character":0,"end_line":25,"end_character":42},"updated":"2018-12-04 16:33:33.000000000","message":"This is the problem description section, so I think this could all be deleted here as it fits better in the \"proposed change\" section.\n\nThe problem is simply that there is server-related information that is useful to the end user (both regular and admin) that is not currently available via the API.","commit_id":"d6313f5b4cb827e588d5c2e4ff4947e2029b4fef"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"3e16e3ffd9258c87b9c40c1c2dddb2929876fe4b","unresolved":false,"context_lines":[{"line_number":19,"context_line":"spec contain some hints for guest numa topology but not easy to interpret, and"},{"line_number":20,"context_line":"the PCI devices is also NUMA resouces should expose to Admin/End user."},{"line_number":21,"context_line":""},{"line_number":22,"context_line":"In nova, NUMA topology contains group of related properties, like mem size,"},{"line_number":23,"context_line":"page size, cpu pin, cpu/thread policy. This Spec proposal a API to present all"},{"line_number":24,"context_line":"these NUMA information, including the virtual to physical mapping with the"},{"line_number":25,"context_line":"corresponding PCI device in the NUMA cell."},{"line_number":26,"context_line":""},{"line_number":27,"context_line":""},{"line_number":28,"context_line":""}],"source_content_type":"text/x-rst","patch_set":7,"id":"3f79a3b5_0d15504b","line":25,"range":{"start_line":22,"start_character":0,"end_line":25,"end_character":42},"in_reply_to":"3f79a3b5_0a0a28cf","updated":"2018-12-05 07:26:58.000000000","message":"Done","commit_id":"d6313f5b4cb827e588d5c2e4ff4947e2029b4fef"},{"author":{"_account_id":8768,"name":"Chris Friesen","email":"chris.friesen@windriver.com","username":"cbf123"},"change_message_id":"d686fdd1112458ecb92339c1faadbf7117895579","unresolved":false,"context_lines":[{"line_number":56,"context_line":"address and host NUMA it belong to is also control by policy rule. for end user"},{"line_number":57,"context_line":"those information won\u0027t be returned."},{"line_number":58,"context_line":""},{"line_number":59,"context_line":"If there is no NUMA information avaliable corresponding key will simply be set"},{"line_number":60,"context_line":"to None."},{"line_number":61,"context_line":""},{"line_number":62,"context_line":"Alternatives"}],"source_content_type":"text/x-rst","patch_set":7,"id":"3f79a3b5_aa19b424","line":59,"range":{"start_line":59,"start_character":56,"end_line":59,"end_character":59},"updated":"2018-12-04 16:33:33.000000000","message":"value, not key","commit_id":"d6313f5b4cb827e588d5c2e4ff4947e2029b4fef"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"3e16e3ffd9258c87b9c40c1c2dddb2929876fe4b","unresolved":false,"context_lines":[{"line_number":56,"context_line":"address and host NUMA it belong to is also control by policy rule. for end user"},{"line_number":57,"context_line":"those information won\u0027t be returned."},{"line_number":58,"context_line":""},{"line_number":59,"context_line":"If there is no NUMA information avaliable corresponding key will simply be set"},{"line_number":60,"context_line":"to None."},{"line_number":61,"context_line":""},{"line_number":62,"context_line":"Alternatives"}],"source_content_type":"text/x-rst","patch_set":7,"id":"3f79a3b5_c803c60a","line":59,"range":{"start_line":59,"start_character":56,"end_line":59,"end_character":59},"in_reply_to":"3f79a3b5_aa19b424","updated":"2018-12-05 07:26:58.000000000","message":"Done","commit_id":"d6313f5b4cb827e588d5c2e4ff4947e2029b4fef"},{"author":{"_account_id":8768,"name":"Chris Friesen","email":"chris.friesen@windriver.com","username":"cbf123"},"change_message_id":"d686fdd1112458ecb92339c1faadbf7117895579","unresolved":false,"context_lines":[{"line_number":89,"context_line":"                           \"physical_mapping\":{  # control by policy"},{"line_number":90,"context_line":"                                                 # show:numa_topology:physical_mapping"},{"line_number":91,"context_line":"                                    \"numa_node\" : 3  # Host Numa Node"},{"line_number":92,"context_line":"                                    \"cpu_pinning\": [[0,5], [1,6]],"},{"line_number":93,"context_line":"                            }"},{"line_number":94,"context_line":"                            \"cpuset\": [0,1,2,3],"},{"line_number":95,"context_line":"                            \"siblings\": [[0,1],[2,3]],"}],"source_content_type":"text/x-rst","patch_set":7,"id":"3f79a3b5_ca875015","line":92,"range":{"start_line":92,"start_character":52,"end_line":92,"end_character":64},"updated":"2018-12-04 16:33:33.000000000","message":"I think this would be better as a dict, like this:\n\n{0: 5, 1: 6,}\n\nwhere the key is the virtual CPU number and the value is the physical CPU number.","commit_id":"d6313f5b4cb827e588d5c2e4ff4947e2029b4fef"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"3e16e3ffd9258c87b9c40c1c2dddb2929876fe4b","unresolved":false,"context_lines":[{"line_number":89,"context_line":"                           \"physical_mapping\":{  # control by policy"},{"line_number":90,"context_line":"                                                 # show:numa_topology:physical_mapping"},{"line_number":91,"context_line":"                                    \"numa_node\" : 3  # Host Numa Node"},{"line_number":92,"context_line":"                                    \"cpu_pinning\": [[0,5], [1,6]],"},{"line_number":93,"context_line":"                            }"},{"line_number":94,"context_line":"                            \"cpuset\": [0,1,2,3],"},{"line_number":95,"context_line":"                            \"siblings\": [[0,1],[2,3]],"}],"source_content_type":"text/x-rst","patch_set":7,"id":"3f79a3b5_8805ce0f","line":92,"range":{"start_line":92,"start_character":52,"end_line":92,"end_character":64},"in_reply_to":"3f79a3b5_ca875015","updated":"2018-12-05 07:26:58.000000000","message":"Done","commit_id":"d6313f5b4cb827e588d5c2e4ff4947e2029b4fef"},{"author":{"_account_id":8768,"name":"Chris Friesen","email":"chris.friesen@windriver.com","username":"cbf123"},"change_message_id":"d686fdd1112458ecb92339c1faadbf7117895579","unresolved":false,"context_lines":[{"line_number":97,"context_line":"                            \"pagesize\": 4096,"},{"line_number":98,"context_line":"                            \"sockets\": 0,"},{"line_number":99,"context_line":"                            \"cores\": 2,"},{"line_number":100,"context_line":"                            \"threads\": 1,"},{"line_number":101,"context_line":"                            \"cpu_thread_policy\": \"prefer\","},{"line_number":102,"context_line":" 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Riedemann","email":"mriedem.os@gmail.com","username":"mriedem"},"change_message_id":"c67f43fd0c779384a9874b6fb0f4811f4ed7a986","unresolved":false,"context_lines":[{"line_number":142,"context_line":"by following policy rule:"},{"line_number":143,"context_line":""},{"line_number":144,"context_line":"#show cells\u0027s physical_mapping information only for admin"},{"line_number":145,"context_line":"SERVERS \u003d \u0027os_compute_api:servers:%s\u0027%\u0027show:numa_topology:physical_mapping\u0027"},{"line_number":146,"context_line":""},{"line_number":147,"context_line":"#show pci\u0027s physical information only for admin"},{"line_number":148,"context_line":"SERVERS \u003d \u0027os_compute_api:servers:%s\u0027%\u0027show:pci_devices:physical\u0027"}],"source_content_type":"text/x-rst","patch_set":9,"id":"3f79a3b5_041f2d6e","line":145,"range":{"start_line":145,"start_character":11,"end_line":145,"end_character":25},"updated":"2018-12-20 17:28:26.000000000","message":"nit: the naming on policy rules is changing to follow a standard form:\n\nhttps://docs.openstack.org/oslo.policy/latest/user/usage.html#naming-policies\n\nSo I think the policy name would be something like:\n\ncompute:server:show (or get? ask gmann):numa-physical-mapping","commit_id":"b1d1b2944cefb2ca12ed64fff9ae3af0ca53c177"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"d8925432ae4af7f9a7771cff7d26dcecfccb4834","unresolved":false,"context_lines":[{"line_number":142,"context_line":"by following policy rule:"},{"line_number":143,"context_line":""},{"line_number":144,"context_line":"#show cells\u0027s physical_mapping information only for admin"},{"line_number":145,"context_line":"SERVERS \u003d \u0027os_compute_api:servers:%s\u0027%\u0027show:numa_topology:physical_mapping\u0027"},{"line_number":146,"context_line":""},{"line_number":147,"context_line":"#show pci\u0027s physical information only for admin"},{"line_number":148,"context_line":"SERVERS \u003d \u0027os_compute_api:servers:%s\u0027%\u0027show:pci_devices:physical\u0027"}],"source_content_type":"text/x-rst","patch_set":9,"id":"3f79a3b5_2027aa68","line":145,"range":{"start_line":145,"start_character":11,"end_line":145,"end_character":25},"in_reply_to":"3f79a3b5_041f2d6e","updated":"2018-12-21 05:08:28.000000000","message":"Done","commit_id":"b1d1b2944cefb2ca12ed64fff9ae3af0ca53c177"},{"author":{"_account_id":6873,"name":"Matt Riedemann","email":"mriedem.os@gmail.com","username":"mriedem"},"change_message_id":"c67f43fd0c779384a9874b6fb0f4811f4ed7a986","unresolved":false,"context_lines":[{"line_number":152,"context_line":"Security impact"},{"line_number":153,"context_line":"---------------"},{"line_number":154,"context_line":""},{"line_number":155,"context_line":"N/A"},{"line_number":156,"context_line":""},{"line_number":157,"context_line":"Notifications impact"},{"line_number":158,"context_line":"--------------------"}],"source_content_type":"text/x-rst","patch_set":9,"id":"3f79a3b5_4402050f","line":155,"updated":"2018-12-20 17:28:26.000000000","message":"Well obviously the policy rules - might as well just move that from the API impact section to this section.","commit_id":"b1d1b2944cefb2ca12ed64fff9ae3af0ca53c177"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"d8925432ae4af7f9a7771cff7d26dcecfccb4834","unresolved":false,"context_lines":[{"line_number":152,"context_line":"Security impact"},{"line_number":153,"context_line":"---------------"},{"line_number":154,"context_line":""},{"line_number":155,"context_line":"N/A"},{"line_number":156,"context_line":""},{"line_number":157,"context_line":"Notifications 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Impact"},{"line_number":168,"context_line":"------------------"}],"source_content_type":"text/x-rst","patch_set":9,"id":"3f79a3b5_97f60d2c","line":165,"updated":"2018-12-20 17:28:26.000000000","message":"What about python-openstackclient? We\u0027re trying to phase away from nova CLI which means for each new feature we added to nova CLI, we should at least have parity in the OSC CLI.","commit_id":"b1d1b2944cefb2ca12ed64fff9ae3af0ca53c177"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"d8925432ae4af7f9a7771cff7d26dcecfccb4834","unresolved":false,"context_lines":[{"line_number":162,"context_line":"Other end user impact"},{"line_number":163,"context_line":"---------------------"},{"line_number":164,"context_line":""},{"line_number":165,"context_line":"* python novaclient would display numa_topology and pci_devices information."},{"line_number":166,"context_line":""},{"line_number":167,"context_line":"Performance Impact"},{"line_number":168,"context_line":"------------------"}],"source_content_type":"text/x-rst","patch_set":9,"id":"3f79a3b5_b57c5ac7","line":165,"in_reply_to":"3f79a3b5_97f60d2c","updated":"2018-12-21 05:08:28.000000000","message":"Done","commit_id":"b1d1b2944cefb2ca12ed64fff9ae3af0ca53c177"},{"author":{"_account_id":6873,"name":"Matt Riedemann","email":"mriedem.os@gmail.com","username":"mriedem"},"change_message_id":"c67f43fd0c779384a9874b6fb0f4811f4ed7a986","unresolved":false,"context_lines":[{"line_number":167,"context_line":"Performance Impact"},{"line_number":168,"context_line":"------------------"},{"line_number":169,"context_line":""},{"line_number":170,"context_line":"N/A"},{"line_number":171,"context_line":""},{"line_number":172,"context_line":"Other deployer impact"},{"line_number":173,"context_line":"---------------------"}],"source_content_type":"text/x-rst","patch_set":9,"id":"3f79a3b5_1738bdc9","line":170,"updated":"2018-12-20 17:28:26.000000000","message":"Really? Clearly there would be additional joins in the database to get the data and then processing it in the API including policy checks, especially if this is done for listing servers (GET /servers/detail).\n\nOf the 3 options presented here and in the ML:\n\nhttp://lists.openstack.org/pipermail/openstack-discuss/2018-December/001070.html\n\nI actually prefer the one you have used in this spec the *least* because of the policy checks involved and the performance impact when listing 1K servers and having to get and process this information for the response.\n\nI prefer using the diagnostics API for this (how many end users really need to see the NUMA/PCI information from the API when they can get it from the guest?) since the diagnostics API seems like a more natural fit for this type of low-level information and is already admin-only or if we really wanted to make this more open to non-admin end users, then as a subresource on the server (your first alternative).","commit_id":"b1d1b2944cefb2ca12ed64fff9ae3af0ca53c177"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"d8925432ae4af7f9a7771cff7d26dcecfccb4834","unresolved":false,"context_lines":[{"line_number":167,"context_line":"Performance Impact"},{"line_number":168,"context_line":"------------------"},{"line_number":169,"context_line":""},{"line_number":170,"context_line":"N/A"},{"line_number":171,"context_line":""},{"line_number":172,"context_line":"Other deployer impact"},{"line_number":173,"context_line":"---------------------"}],"source_content_type":"text/x-rst","patch_set":9,"id":"3f79a3b5_55a06637","line":170,"in_reply_to":"3f79a3b5_1738bdc9","updated":"2018-12-21 05:08:28.000000000","message":"the performance impact content is added.\n\nand, sure, i\u0027d like to use the last implementation too.","commit_id":"b1d1b2944cefb2ca12ed64fff9ae3af0ca53c177"},{"author":{"_account_id":6873,"name":"Matt Riedemann","email":"mriedem.os@gmail.com","username":"mriedem"},"change_message_id":"c67f43fd0c779384a9874b6fb0f4811f4ed7a986","unresolved":false,"context_lines":[{"line_number":219,"context_line":"References"},{"line_number":220,"context_line":"\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d"},{"line_number":221,"context_line":""},{"line_number":222,"context_line":"N/A"},{"line_number":223,"context_line":""},{"line_number":224,"context_line":""},{"line_number":225,"context_line":"History"}],"source_content_type":"text/x-rst","patch_set":9,"id":"3f79a3b5_b780e949","line":222,"updated":"2018-12-20 17:28:26.000000000","message":"You could probably refer to (1) the Stein PTG etherpad about this https://etherpad.openstack.org/p/nova-ptg-stein and (2) the ML thread about which way to expose this in the API http://lists.openstack.org/pipermail/openstack-discuss/2018-December/001070.html.","commit_id":"b1d1b2944cefb2ca12ed64fff9ae3af0ca53c177"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"d8925432ae4af7f9a7771cff7d26dcecfccb4834","unresolved":false,"context_lines":[{"line_number":219,"context_line":"References"},{"line_number":220,"context_line":"\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d"},{"line_number":221,"context_line":""},{"line_number":222,"context_line":"N/A"},{"line_number":223,"context_line":""},{"line_number":224,"context_line":""},{"line_number":225,"context_line":"History"}],"source_content_type":"text/x-rst","patch_set":9,"id":"3f79a3b5_c0da7646","line":222,"in_reply_to":"3f79a3b5_b780e949","updated":"2018-12-21 05:08:28.000000000","message":"Done","commit_id":"b1d1b2944cefb2ca12ed64fff9ae3af0ca53c177"},{"author":{"_account_id":6873,"name":"Matt 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Admin need make"},{"line_number":39,"context_line":"  sure the NUMA topology that is supposed to be, which is reported by this API,"},{"line_number":40,"context_line":"  is properly mapped to Host. Admin also want monitoring NUMA topology for"},{"line_number":41,"context_line":"  finding a way to optimize throughput or latency via regulating the NUMA"},{"line_number":42,"context_line":"  mapping."},{"line_number":43,"context_line":""},{"line_number":44,"context_line":""},{"line_number":45,"context_line":"Proposed change"}],"source_content_type":"text/x-rst","patch_set":11,"id":"1f769fc5_066cbf34","line":42,"range":{"start_line":40,"start_character":30,"end_line":42,"end_character":10},"updated":"2018-12-24 19:44:25.000000000","message":"I\u0027m not sure what this means. They would boot an instance, see what the mapping ends up being, and if it doesn\u0027t suit their needs, kil the instance and try again? Maybe you could make this into its own use case, and expand on how you see this working out?","commit_id":"a1583a963b0f9c411dac68f4fbd02a425268335e"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"2859bed704401b54b65f049d792e637bc33f3e47","unresolved":false,"context_lines":[{"line_number":37,"context_line":"* The admin wants to know the virtual-to-physical mapping for one or more"},{"line_number":38,"context_line":"  instances for the purpose of debugging and/or monitoring. Admin need make"},{"line_number":39,"context_line":"  sure the NUMA topology that is supposed to be, which is reported by this API,"},{"line_number":40,"context_line":"  is properly mapped to Host. Admin also want monitoring NUMA topology for"},{"line_number":41,"context_line":"  finding a way to optimize throughput or latency via regulating the NUMA"},{"line_number":42,"context_line":"  mapping."},{"line_number":43,"context_line":""},{"line_number":44,"context_line":""},{"line_number":45,"context_line":"Proposed change"}],"source_content_type":"text/x-rst","patch_set":11,"id":"1f769fc5_85e1a401","line":42,"range":{"start_line":40,"start_character":30,"end_line":42,"end_character":10},"in_reply_to":"1f769fc5_066cbf34","updated":"2018-12-25 03:23:41.000000000","message":"if the mapping is correct, this should be also optimized, so I gonna just delete this.","commit_id":"a1583a963b0f9c411dac68f4fbd02a425268335e"},{"author":{"_account_id":8864,"name":"Artom Lifshitz","email":"notartom@gmail.com","username":"artom"},"change_message_id":"2913ba8df5aa3e3cdfe9d2fb5cf5871484056881","unresolved":false,"context_lines":[{"line_number":46,"context_line":"\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d"},{"line_number":47,"context_line":""},{"line_number":48,"context_line":"In nova, NUMA topology contains group of related properties, like mem size,"},{"line_number":49,"context_line":"page size, cpu pin, cpu/thread policy. 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cpu,"},{"line_number":61,"context_line":"thread, mem, page size, cpuset,cpu pinned info, siblings, thread policy, cpu"},{"line_number":62,"context_line":"pinning, host NUMA node number and PCI devices."},{"line_number":63,"context_line":""},{"line_number":64,"context_line":"If there is no NUMA/PCI information available, the corresponding key:value pair"}],"source_content_type":"text/x-rst","patch_set":11,"id":"1f769fc5_25d0d0f7","line":61,"range":{"start_line":61,"start_character":73,"end_line":61,"end_character":76},"in_reply_to":"1f769fc5_a6cb8b1c","updated":"2018-12-25 03:23:41.000000000","message":"Done","commit_id":"a1583a963b0f9c411dac68f4fbd02a425268335e"},{"author":{"_account_id":15888,"name":"Zhenyu Zheng","email":"zheng.zhenyu@outlook.com","username":"Kevin_Zheng"},"change_message_id":"5145d1d4dfd5c73b5344ebb381dfd653b24e0262","unresolved":false,"context_lines":[{"line_number":61,"context_line":"thread, mem, page size, cpuset,cpu pinned info, siblings, thread policy, cpu"},{"line_number":62,"context_line":"pinning, host NUMA node number and PCI devices."},{"line_number":63,"context_line":""},{"line_number":64,"context_line":"If there is no NUMA/PCI information available, the corresponding key:value pair"},{"line_number":65,"context_line":"will simply not be included in the response."},{"line_number":66,"context_line":""},{"line_number":67,"context_line":"Alternatives"},{"line_number":68,"context_line":"------------"}],"source_content_type":"text/x-rst","patch_set":11,"id":"1f769fc5_79099fdb","line":65,"range":{"start_line":64,"start_character":0,"end_line":65,"end_character":44},"updated":"2018-12-22 09:23:18.000000000","message":"or empty value? I think we should keep the keys in the response?","commit_id":"a1583a963b0f9c411dac68f4fbd02a425268335e"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"2859bed704401b54b65f049d792e637bc33f3e47","unresolved":false,"context_lines":[{"line_number":61,"context_line":"thread, mem, page size, cpuset,cpu pinned info, siblings, thread policy, cpu"},{"line_number":62,"context_line":"pinning, host NUMA node number and PCI devices."},{"line_number":63,"context_line":""},{"line_number":64,"context_line":"If there is no NUMA/PCI information available, the corresponding key:value pair"},{"line_number":65,"context_line":"will simply not be included in the response."},{"line_number":66,"context_line":""},{"line_number":67,"context_line":"Alternatives"},{"line_number":68,"context_line":"------------"}],"source_content_type":"text/x-rst","patch_set":11,"id":"1f769fc5_45cdcc5b","line":65,"range":{"start_line":64,"start_character":0,"end_line":65,"end_character":44},"in_reply_to":"1f769fc5_79099fdb","updated":"2018-12-25 03:23:41.000000000","message":"Done","commit_id":"a1583a963b0f9c411dac68f4fbd02a425268335e"},{"author":{"_account_id":8864,"name":"Artom Lifshitz","email":"notartom@gmail.com","username":"artom"},"change_message_id":"2913ba8df5aa3e3cdfe9d2fb5cf5871484056881","unresolved":false,"context_lines":[{"line_number":67,"context_line":"Alternatives"},{"line_number":68,"context_line":"------------"},{"line_number":69,"context_line":""},{"line_number":70,"context_line":"Instead of put these information into \"GET /servers/{server_id}/diagnostics\","},{"line_number":71,"context_line":"there are other 2 options:"},{"line_number":72,"context_line":""},{"line_number":73,"context_line":"* add a new sub-resource \u0027topology\u0027 to servers:"}],"source_content_type":"text/x-rst","patch_set":11,"id":"1f769fc5_26d77bc2","line":70,"range":{"start_line":70,"start_character":38,"end_line":70,"end_character":76},"updated":"2018-12-24 19:44:25.000000000","message":"``GET /servers/{server_id}/diagnostics``","commit_id":"a1583a963b0f9c411dac68f4fbd02a425268335e"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"2859bed704401b54b65f049d792e637bc33f3e47","unresolved":false,"context_lines":[{"line_number":67,"context_line":"Alternatives"},{"line_number":68,"context_line":"------------"},{"line_number":69,"context_line":""},{"line_number":70,"context_line":"Instead of put these information into \"GET /servers/{server_id}/diagnostics\","},{"line_number":71,"context_line":"there are other 2 options:"},{"line_number":72,"context_line":""},{"line_number":73,"context_line":"* add a new sub-resource \u0027topology\u0027 to servers:"}],"source_content_type":"text/x-rst","patch_set":11,"id":"1f769fc5_8504447d","line":70,"range":{"start_line":70,"start_character":38,"end_line":70,"end_character":76},"in_reply_to":"1f769fc5_26d77bc2","updated":"2018-12-25 03:23:41.000000000","message":"Done","commit_id":"a1583a963b0f9c411dac68f4fbd02a425268335e"},{"author":{"_account_id":8864,"name":"Artom Lifshitz","email":"notartom@gmail.com","username":"artom"},"change_message_id":"2913ba8df5aa3e3cdfe9d2fb5cf5871484056881","unresolved":false,"context_lines":[{"line_number":70,"context_line":"Instead of put these information into \"GET /servers/{server_id}/diagnostics\","},{"line_number":71,"context_line":"there are other 2 options:"},{"line_number":72,"context_line":""},{"line_number":73,"context_line":"* add a new sub-resource \u0027topology\u0027 to servers:"},{"line_number":74,"context_line":"  \"GET /servers/{server_id}/topology\""},{"line_number":75,"context_line":"  returns the NUMA information for one server."},{"line_number":76,"context_line":""}],"source_content_type":"text/x-rst","patch_set":11,"id":"1f769fc5_e6e0a399","line":73,"range":{"start_line":73,"start_character":25,"end_line":73,"end_character":35},"updated":"2018-12-24 19:44:25.000000000","message":"``topology``","commit_id":"a1583a963b0f9c411dac68f4fbd02a425268335e"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"2859bed704401b54b65f049d792e637bc33f3e47","unresolved":false,"context_lines":[{"line_number":70,"context_line":"Instead of put these information into \"GET /servers/{server_id}/diagnostics\","},{"line_number":71,"context_line":"there are other 2 options:"},{"line_number":72,"context_line":""},{"line_number":73,"context_line":"* add a new sub-resource \u0027topology\u0027 to servers:"},{"line_number":74,"context_line":"  \"GET /servers/{server_id}/topology\""},{"line_number":75,"context_line":"  returns the NUMA information for one server."},{"line_number":76,"context_line":""}],"source_content_type":"text/x-rst","patch_set":11,"id":"1f769fc5_a52aa0e4","line":73,"range":{"start_line":73,"start_character":25,"end_line":73,"end_character":35},"in_reply_to":"1f769fc5_e6e0a399","updated":"2018-12-25 03:23:41.000000000","message":"Done","commit_id":"a1583a963b0f9c411dac68f4fbd02a425268335e"},{"author":{"_account_id":8864,"name":"Artom Lifshitz","email":"notartom@gmail.com","username":"artom"},"change_message_id":"2913ba8df5aa3e3cdfe9d2fb5cf5871484056881","unresolved":false,"context_lines":[{"line_number":71,"context_line":"there are other 2 options:"},{"line_number":72,"context_line":""},{"line_number":73,"context_line":"* add a new sub-resource \u0027topology\u0027 to servers:"},{"line_number":74,"context_line":"  \"GET /servers/{server_id}/topology\""},{"line_number":75,"context_line":"  returns the NUMA information for one server."},{"line_number":76,"context_line":""},{"line_number":77,"context_line":"* put the NUMA info under \"GET /servers/{id}\" and \"GET /servers/detail\"."}],"source_content_type":"text/x-rst","patch_set":11,"id":"1f769fc5_c6e327a4","line":74,"range":{"start_line":74,"start_character":2,"end_line":74,"end_character":37},"updated":"2018-12-24 19:44:25.000000000","message":"``GET /servers/{server_id}/topology``","commit_id":"a1583a963b0f9c411dac68f4fbd02a425268335e"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"2859bed704401b54b65f049d792e637bc33f3e47","unresolved":false,"context_lines":[{"line_number":71,"context_line":"there are other 2 options:"},{"line_number":72,"context_line":""},{"line_number":73,"context_line":"* add a new sub-resource \u0027topology\u0027 to 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server."},{"line_number":76,"context_line":""},{"line_number":77,"context_line":"* put the NUMA info under \"GET /servers/{id}\" and \"GET /servers/detail\"."},{"line_number":78,"context_line":"  NUMA topology information need a another DB query via InstanceNUMATopology"},{"line_number":79,"context_line":"  object\u0027s method get_by_instance_uuid, hence a large amout calling"},{"line_number":80,"context_line":"  `GET /servers/{id}` or call \"GET /servers/detail\" would slow down."}],"source_content_type":"text/x-rst","patch_set":11,"id":"1f769fc5_e6f9834d","line":77,"range":{"start_line":77,"start_character":50,"end_line":77,"end_character":71},"updated":"2018-12-24 19:44:25.000000000","message":"``GET /servers/detail``","commit_id":"a1583a963b0f9c411dac68f4fbd02a425268335e"},{"author":{"_account_id":8864,"name":"Artom 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19:44:25.000000000","message":"``GET /servers/{id}``","commit_id":"a1583a963b0f9c411dac68f4fbd02a425268335e"},{"author":{"_account_id":8864,"name":"Artom Lifshitz","email":"notartom@gmail.com","username":"artom"},"change_message_id":"2913ba8df5aa3e3cdfe9d2fb5cf5871484056881","unresolved":false,"context_lines":[{"line_number":74,"context_line":"  \"GET /servers/{server_id}/topology\""},{"line_number":75,"context_line":"  returns the NUMA information for one server."},{"line_number":76,"context_line":""},{"line_number":77,"context_line":"* put the NUMA info under \"GET /servers/{id}\" and \"GET /servers/detail\"."},{"line_number":78,"context_line":"  NUMA topology information need a another DB query via InstanceNUMATopology"},{"line_number":79,"context_line":"  object\u0027s method get_by_instance_uuid, hence a large amout calling"},{"line_number":80,"context_line":"  `GET /servers/{id}` or call \"GET /servers/detail\" would slow down."}],"source_content_type":"text/x-rst","patch_set":11,"id":"1f769fc5_86944fea","line":77,"range":{"start_line":77,"start_character":15,"end_line":77,"end_character":19},"updated":"2018-12-24 19:44:25.000000000","message":"information?","commit_id":"a1583a963b0f9c411dac68f4fbd02a425268335e"},{"author":{"_account_id":8864,"name":"Artom Lifshitz","email":"notartom@gmail.com","username":"artom"},"change_message_id":"2913ba8df5aa3e3cdfe9d2fb5cf5871484056881","unresolved":false,"context_lines":[{"line_number":75,"context_line":"  returns the NUMA information for one server."},{"line_number":76,"context_line":""},{"line_number":77,"context_line":"* put the NUMA info under \"GET /servers/{id}\" and \"GET /servers/detail\"."},{"line_number":78,"context_line":"  NUMA topology information need a another DB query via InstanceNUMATopology"},{"line_number":79,"context_line":"  object\u0027s method get_by_instance_uuid, hence a large amout calling"},{"line_number":80,"context_line":"  `GET /servers/{id}` or call \"GET /servers/detail\" would slow down."},{"line_number":81,"context_line":""},{"line_number":82,"context_line":""},{"line_number":83,"context_line":"Data model impact"}],"source_content_type":"text/x-rst","patch_set":11,"id":"1f769fc5_a6670b26","line":80,"range":{"start_line":78,"start_character":2,"end_line":80,"end_character":68},"updated":"2018-12-24 19:44:25.000000000","message":"I\u0027d say something like: \"This would negatively affect performance as it needs an additional database query (via the ``InstanceNUMATopology`` object\u0027s ``get_by_instance_uuid`` method).\"","commit_id":"a1583a963b0f9c411dac68f4fbd02a425268335e"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"2859bed704401b54b65f049d792e637bc33f3e47","unresolved":false,"context_lines":[{"line_number":75,"context_line":"  returns the NUMA information for one server."},{"line_number":76,"context_line":""},{"line_number":77,"context_line":"* put the NUMA info under \"GET /servers/{id}\" and \"GET /servers/detail\"."},{"line_number":78,"context_line":"  NUMA topology information need a another DB query via InstanceNUMATopology"},{"line_number":79,"context_line":"  object\u0027s method get_by_instance_uuid, hence a large amout calling"},{"line_number":80,"context_line":"  `GET /servers/{id}` or call \"GET /servers/detail\" would slow down."},{"line_number":81,"context_line":""},{"line_number":82,"context_line":""},{"line_number":83,"context_line":"Data model impact"}],"source_content_type":"text/x-rst","patch_set":11,"id":"1f769fc5_c518fcd4","line":80,"range":{"start_line":78,"start_character":2,"end_line":80,"end_character":68},"in_reply_to":"1f769fc5_a6670b26","updated":"2018-12-25 03:23:41.000000000","message":"Done","commit_id":"a1583a963b0f9c411dac68f4fbd02a425268335e"},{"author":{"_account_id":8864,"name":"Artom Lifshitz","email":"notartom@gmail.com","username":"artom"},"change_message_id":"2913ba8df5aa3e3cdfe9d2fb5cf5871484056881","unresolved":false,"context_lines":[{"line_number":90,"context_line":"---------------"},{"line_number":91,"context_line":""},{"line_number":92,"context_line":""},{"line_number":93,"context_line":"Allows the \"GET /servers/{server_id}/diagnostics\" API to show NUMA information"},{"line_number":94,"context_line":"with a new microversion."},{"line_number":95,"context_line":""},{"line_number":96,"context_line":"The returned information for NUMA topology and PCI devices:"}],"source_content_type":"text/x-rst","patch_set":11,"id":"1f769fc5_466cf707","line":93,"range":{"start_line":93,"start_character":11,"end_line":93,"end_character":49},"updated":"2018-12-24 19:44:25.000000000","message":"``GET /servers/{server_id}/diagnostics``","commit_id":"a1583a963b0f9c411dac68f4fbd02a425268335e"},{"author":{"_account_id":7543,"name":"Yongli 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with what you mentioned before, you should say that the vaule is None in line 64","commit_id":"a1583a963b0f9c411dac68f4fbd02a425268335e"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"2859bed704401b54b65f049d792e637bc33f3e47","unresolved":false,"context_lines":[{"line_number":97,"context_line":""},{"line_number":98,"context_line":"    {"},{"line_number":99,"context_line":"        ..."},{"line_number":100,"context_line":"        \"numa_topology\": { # if no NUMA info avaliable, \"numa_topology\""},{"line_number":101,"context_line":"                           # value just be None."},{"line_number":102,"context_line":"                          \"cells\":["},{"line_number":103,"context_line":"                                   {"},{"line_number":104,"context_line":"                                      \"numa_node\": 3, # Host Numa Node"}],"source_content_type":"text/x-rst","patch_set":11,"id":"1f769fc5_25277015","line":101,"range":{"start_line":100,"start_character":7,"end_line":101,"end_character":48},"in_reply_to":"1f769fc5_39132710","updated":"2018-12-25 03:23:41.000000000","message":"Done","commit_id":"a1583a963b0f9c411dac68f4fbd02a425268335e"},{"author":{"_account_id":15888,"name":"Zhenyu Zheng","email":"zheng.zhenyu@outlook.com","username":"Kevin_Zheng"},"change_message_id":"5145d1d4dfd5c73b5344ebb381dfd653b24e0262","unresolved":false,"context_lines":[{"line_number":102,"context_line":"                          \"cells\":["},{"line_number":103,"context_line":"                                   {"},{"line_number":104,"context_line":"                                      \"numa_node\": 3, # Host Numa Node"},{"line_number":105,"context_line":"                                      \"cpu_pinning\": {0:5, 1:6},"},{"line_number":106,"context_line":"                                      \"cpu_thread_policy\": \"prefer\","},{"line_number":107,"context_line":"                                      \"cpuset\": [0,1,2,3],"},{"line_number":108,"context_line":"                                      \"siblings\": [[0,1],[2,3]],"}],"source_content_type":"text/x-rst","patch_set":11,"id":"1f769fc5_7932ffa9","line":105,"range":{"start_line":105,"start_character":38,"end_line":105,"end_character":63},"updated":"2018-12-22 09:23:18.000000000","message":"a little bit explanation on what the format means?","commit_id":"a1583a963b0f9c411dac68f4fbd02a425268335e"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"2859bed704401b54b65f049d792e637bc33f3e47","unresolved":false,"context_lines":[{"line_number":102,"context_line":"                          \"cells\":["},{"line_number":103,"context_line":"                                   {"},{"line_number":104,"context_line":"                                      \"numa_node\": 3, # Host Numa Node"},{"line_number":105,"context_line":"                                      \"cpu_pinning\": {0:5, 1:6},"},{"line_number":106,"context_line":"                                      \"cpu_thread_policy\": \"prefer\","},{"line_number":107,"context_line":"                                      \"cpuset\": [0,1,2,3],"},{"line_number":108,"context_line":"                                      \"siblings\": [[0,1],[2,3]],"}],"source_content_type":"text/x-rst","patch_set":11,"id":"1f769fc5_c57d5ce8","line":105,"range":{"start_line":105,"start_character":38,"end_line":105,"end_character":63},"in_reply_to":"1f769fc5_7932ffa9","updated":"2018-12-25 03:23:41.000000000","message":"Done","commit_id":"a1583a963b0f9c411dac68f4fbd02a425268335e"},{"author":{"_account_id":8864,"name":"Artom Lifshitz","email":"notartom@gmail.com","username":"artom"},"change_message_id":"2913ba8df5aa3e3cdfe9d2fb5cf5871484056881","unresolved":false,"context_lines":[{"line_number":120,"context_line":""},{"line_number":121,"context_line":"         \"emulator_threads_policy\": \"share\","},{"line_number":122,"context_line":""},{"line_number":123,"context_line":"         \"pci_devices\": ["},{"line_number":124,"context_line":"                           {"},{"line_number":125,"context_line":"                              \"address\":\"00:1a.0\","},{"line_number":126,"context_line":"                              \"interface\": \"eth3\","}],"source_content_type":"text/x-rst","patch_set":11,"id":"1f769fc5_06b11f90","line":123,"updated":"2018-12-24 19:44:25.000000000","message":"We should probably report the PCI NUMA policy somehow. I don\u0027t have an actual suggestion on how to do this, but I think a straw man should be put up as a discussion starter.","commit_id":"a1583a963b0f9c411dac68f4fbd02a425268335e"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"2859bed704401b54b65f049d792e637bc33f3e47","unresolved":false,"context_lines":[{"line_number":120,"context_line":""},{"line_number":121,"context_line":"         \"emulator_threads_policy\": \"share\","},{"line_number":122,"context_line":""},{"line_number":123,"context_line":"         \"pci_devices\": ["},{"line_number":124,"context_line":"                           {"},{"line_number":125,"context_line":"                              \"address\":\"00:1a.0\","},{"line_number":126,"context_line":"                              \"interface\": \"eth3\","}],"source_content_type":"text/x-rst","patch_set":11,"id":"1f769fc5_45694c23","line":123,"in_reply_to":"1f769fc5_06b11f90","updated":"2018-12-25 03:23:41.000000000","message":"Done","commit_id":"a1583a963b0f9c411dac68f4fbd02a425268335e"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"7be5581f8799418b1d68eabb57066689b982bbbc","unresolved":false,"context_lines":[{"line_number":120,"context_line":""},{"line_number":121,"context_line":"         \"emulator_threads_policy\": \"share\","},{"line_number":122,"context_line":""},{"line_number":123,"context_line":"         \"pci_devices\": ["},{"line_number":124,"context_line":"                           {"},{"line_number":125,"context_line":"                              \"address\":\"00:1a.0\","},{"line_number":126,"context_line":"                              \"interface\": \"eth3\","}],"source_content_type":"text/x-rst","patch_set":11,"id":"1f769fc5_48696123","line":123,"in_reply_to":"1f769fc5_06b11f90","updated":"2018-12-25 05:16:29.000000000","message":"NUMA policy only existed in the pci request. not in the device. but, the numa_node needed. i add the numa_node information here.\nthanks.","commit_id":"a1583a963b0f9c411dac68f4fbd02a425268335e"},{"author":{"_account_id":8864,"name":"Artom Lifshitz","email":"notartom@gmail.com","username":"artom"},"change_message_id":"2913ba8df5aa3e3cdfe9d2fb5cf5871484056881","unresolved":false,"context_lines":[{"line_number":124,"context_line":"                           {"},{"line_number":125,"context_line":"                              \"address\":\"00:1a.0\","},{"line_number":126,"context_line":"                              \"interface\": \"eth3\","},{"line_number":127,"context_line":"                              \"type\": \"VF\","},{"line_number":128,"context_line":"                              \"vendor\": \"8086\","},{"line_number":129,"context_line":"                              \"product\": \"1526\""},{"line_number":130,"context_line":"                            }"}],"source_content_type":"text/x-rst","patch_set":11,"id":"1f769fc5_86620f16","line":127,"updated":"2018-12-24 19:44:25.000000000","message":"Do we want to add ``trusted`` to this?","commit_id":"a1583a963b0f9c411dac68f4fbd02a425268335e"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"7be5581f8799418b1d68eabb57066689b982bbbc","unresolved":false,"context_lines":[{"line_number":124,"context_line":"                           {"},{"line_number":125,"context_line":"                              \"address\":\"00:1a.0\","},{"line_number":126,"context_line":"                              \"interface\": \"eth3\","},{"line_number":127,"context_line":"                              \"type\": \"VF\","},{"line_number":128,"context_line":"                              \"vendor\": \"8086\","},{"line_number":129,"context_line":"                              \"product\": \"1526\""},{"line_number":130,"context_line":"                            }"}],"source_content_type":"text/x-rst","patch_set":11,"id":"1f769fc5_a8bd9569","line":127,"in_reply_to":"1f769fc5_86620f16","updated":"2018-12-25 05:16:29.000000000","message":"\"trusted\" and \"physical_network\" is PCI\u0027s tag information, only available in the PCI pool. not part of PCI devices.\n\nI don\u0027t think put it into PCI_device is a good idea.\n\nthanks.","commit_id":"a1583a963b0f9c411dac68f4fbd02a425268335e"},{"author":{"_account_id":15888,"name":"Zhenyu Zheng","email":"zheng.zhenyu@outlook.com","username":"Kevin_Zheng"},"change_message_id":"5145d1d4dfd5c73b5344ebb381dfd653b24e0262","unresolved":false,"context_lines":[{"line_number":138,"context_line":"Security impact"},{"line_number":139,"context_line":"---------------"},{"line_number":140,"context_line":""},{"line_number":141,"context_line":"None"},{"line_number":142,"context_line":""},{"line_number":143,"context_line":""},{"line_number":144,"context_line":"Notifications impact"}],"source_content_type":"text/x-rst","patch_set":11,"id":"1f769fc5_f9f4cfd1","line":141,"range":{"start_line":141,"start_character":0,"end_line":141,"end_character":4},"updated":"2018-12-22 09:23:18.000000000","message":"Maybe it will be some security impact if we expose host physical cpu mapping to normal user with these data?","commit_id":"a1583a963b0f9c411dac68f4fbd02a425268335e"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"2859bed704401b54b65f049d792e637bc33f3e47","unresolved":false,"context_lines":[{"line_number":138,"context_line":"Security impact"},{"line_number":139,"context_line":"---------------"},{"line_number":140,"context_line":""},{"line_number":141,"context_line":"None"},{"line_number":142,"context_line":""},{"line_number":143,"context_line":""},{"line_number":144,"context_line":"Notifications impact"}],"source_content_type":"text/x-rst","patch_set":11,"id":"1f769fc5_655b2887","line":141,"range":{"start_line":141,"start_character":0,"end_line":141,"end_character":4},"in_reply_to":"1f769fc5_6671f3e0","updated":"2018-12-25 03:23:41.000000000","message":"Done","commit_id":"a1583a963b0f9c411dac68f4fbd02a425268335e"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"2859bed704401b54b65f049d792e637bc33f3e47","unresolved":false,"context_lines":[{"line_number":138,"context_line":"Security impact"},{"line_number":139,"context_line":"---------------"},{"line_number":140,"context_line":""},{"line_number":141,"context_line":"None"},{"line_number":142,"context_line":""},{"line_number":143,"context_line":""},{"line_number":144,"context_line":"Notifications impact"}],"source_content_type":"text/x-rst","patch_set":11,"id":"1f769fc5_a561403c","line":141,"range":{"start_line":141,"start_character":0,"end_line":141,"end_character":4},"in_reply_to":"1f769fc5_f9f4cfd1","updated":"2018-12-25 03:23:41.000000000","message":"Done","commit_id":"a1583a963b0f9c411dac68f4fbd02a425268335e"},{"author":{"_account_id":8864,"name":"Artom Lifshitz","email":"notartom@gmail.com","username":"artom"},"change_message_id":"2913ba8df5aa3e3cdfe9d2fb5cf5871484056881","unresolved":false,"context_lines":[{"line_number":138,"context_line":"Security impact"},{"line_number":139,"context_line":"---------------"},{"line_number":140,"context_line":""},{"line_number":141,"context_line":"None"},{"line_number":142,"context_line":""},{"line_number":143,"context_line":""},{"line_number":144,"context_line":"Notifications impact"}],"source_content_type":"text/x-rst","patch_set":11,"id":"1f769fc5_6671f3e0","line":141,"range":{"start_line":141,"start_character":0,"end_line":141,"end_character":4},"in_reply_to":"1f769fc5_f9f4cfd1","updated":"2018-12-24 19:44:25.000000000","message":"Yeah, I can\u0027t think of anything specific off the top of my head, but I\u0027m uneasy about this. It\u0027s exposing lots of low-level information that could be misused (think side-channel attacks, for example).","commit_id":"a1583a963b0f9c411dac68f4fbd02a425268335e"},{"author":{"_account_id":15888,"name":"Zhenyu Zheng","email":"zheng.zhenyu@outlook.com","username":"Kevin_Zheng"},"change_message_id":"5145d1d4dfd5c73b5344ebb381dfd653b24e0262","unresolved":false,"context_lines":[{"line_number":155,"context_line":"Performance Impact"},{"line_number":156,"context_line":"------------------"},{"line_number":157,"context_line":""},{"line_number":158,"context_line":"None"},{"line_number":159,"context_line":""},{"line_number":160,"context_line":"Other deployer impact"},{"line_number":161,"context_line":"---------------------"}],"source_content_type":"text/x-rst","patch_set":11,"id":"1f769fc5_99011bb3","line":158,"range":{"start_line":158,"start_character":0,"end_line":158,"end_character":4},"updated":"2018-12-22 09:23:18.000000000","message":"The API response could be slower","commit_id":"a1583a963b0f9c411dac68f4fbd02a425268335e"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"2859bed704401b54b65f049d792e637bc33f3e47","unresolved":false,"context_lines":[{"line_number":155,"context_line":"Performance Impact"},{"line_number":156,"context_line":"------------------"},{"line_number":157,"context_line":""},{"line_number":158,"context_line":"None"},{"line_number":159,"context_line":""},{"line_number":160,"context_line":"Other deployer impact"},{"line_number":161,"context_line":"---------------------"}],"source_content_type":"text/x-rst","patch_set":11,"id":"1f769fc5_2503f044","line":158,"range":{"start_line":158,"start_character":0,"end_line":158,"end_character":4},"in_reply_to":"1f769fc5_99011bb3","updated":"2018-12-25 03:23:41.000000000","message":"yeah, but it\u0027s diagnostics, so i think it\u0027s ok. i gonna put these on spec. thanks.","commit_id":"a1583a963b0f9c411dac68f4fbd02a425268335e"},{"author":{"_account_id":8864,"name":"Artom Lifshitz","email":"notartom@gmail.com","username":"artom"},"change_message_id":"2913ba8df5aa3e3cdfe9d2fb5cf5871484056881","unresolved":false,"context_lines":[{"line_number":197,"context_line":"Testing"},{"line_number":198,"context_line":"\u003d\u003d\u003d\u003d\u003d\u003d\u003d"},{"line_number":199,"context_line":""},{"line_number":200,"context_line":"* Add functional api_sample tests and tempest test."},{"line_number":201,"context_line":""},{"line_number":202,"context_line":"Documentation Impact"},{"line_number":203,"context_line":"\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d"}],"source_content_type":"text/x-rst","patch_set":11,"id":"1f769fc5_0676ffd9","line":200,"range":{"start_line":200,"start_character":38,"end_line":200,"end_character":50},"updated":"2018-12-24 19:44:25.000000000","message":"I don\u0027t think we can do NUMA/PCI in the upstream gate just yet.","commit_id":"a1583a963b0f9c411dac68f4fbd02a425268335e"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"2859bed704401b54b65f049d792e637bc33f3e47","unresolved":false,"context_lines":[{"line_number":197,"context_line":"Testing"},{"line_number":198,"context_line":"\u003d\u003d\u003d\u003d\u003d\u003d\u003d"},{"line_number":199,"context_line":""},{"line_number":200,"context_line":"* Add functional api_sample tests and tempest test."},{"line_number":201,"context_line":""},{"line_number":202,"context_line":"Documentation Impact"},{"line_number":203,"context_line":"\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d"}],"source_content_type":"text/x-rst","patch_set":11,"id":"1f769fc5_c599dc1f","line":200,"range":{"start_line":200,"start_character":38,"end_line":200,"end_character":50},"in_reply_to":"1f769fc5_0676ffd9","updated":"2018-12-25 03:23:41.000000000","message":"Done","commit_id":"a1583a963b0f9c411dac68f4fbd02a425268335e"},{"author":{"_account_id":8864,"name":"Artom Lifshitz","email":"notartom@gmail.com","username":"artom"},"change_message_id":"2913ba8df5aa3e3cdfe9d2fb5cf5871484056881","unresolved":false,"context_lines":[{"line_number":207,"context_line":"References"},{"line_number":208,"context_line":"\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d"},{"line_number":209,"context_line":""},{"line_number":210,"context_line":"* Stein PTG discuss:https://etherpad.openstack.org/p/nova-ptg-stein"},{"line_number":211,"context_line":""},{"line_number":212,"context_line":"* In Mail list discuss,put the NUMA info under existing \u0027diagnostics\u0027"},{"line_number":213,"context_line":"  sub-resource is prefer."}],"source_content_type":"text/x-rst","patch_set":11,"id":"1f769fc5_c67fa7a9","line":210,"range":{"start_line":210,"start_character":12,"end_line":210,"end_character":20},"updated":"2018-12-24 19:44:25.000000000","message":"\u0027discuss:\u0027 -\u003e \u0027discussion: \u0027","commit_id":"a1583a963b0f9c411dac68f4fbd02a425268335e"},{"author":{"_account_id":7543,"name":"Yongli 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http://lists.openstack.org/pipermail/openstack-discuss/2018-December/001070.html"},{"line_number":215,"context_line":""},{"line_number":216,"context_line":""}],"source_content_type":"text/x-rst","patch_set":11,"id":"1f769fc5_e67c23b7","line":213,"range":{"start_line":212,"start_character":2,"end_line":213,"end_character":25},"updated":"2018-12-24 19:44:25.000000000","message":"Mailing list discussion:","commit_id":"a1583a963b0f9c411dac68f4fbd02a425268335e"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"2859bed704401b54b65f049d792e637bc33f3e47","unresolved":false,"context_lines":[{"line_number":209,"context_line":""},{"line_number":210,"context_line":"* Stein PTG discuss:https://etherpad.openstack.org/p/nova-ptg-stein"},{"line_number":211,"context_line":""},{"line_number":212,"context_line":"* In Mail list discuss,put the NUMA info under existing \u0027diagnostics\u0027"},{"line_number":213,"context_line":"  sub-resource is prefer."},{"line_number":214,"context_line":"  http://lists.openstack.org/pipermail/openstack-discuss/2018-December/001070.html"},{"line_number":215,"context_line":""},{"line_number":216,"context_line":""}],"source_content_type":"text/x-rst","patch_set":11,"id":"1f769fc5_4585ccac","line":213,"range":{"start_line":212,"start_character":2,"end_line":213,"end_character":25},"in_reply_to":"1f769fc5_e67c23b7","updated":"2018-12-25 03:23:41.000000000","message":"Done","commit_id":"a1583a963b0f9c411dac68f4fbd02a425268335e"},{"author":{"_account_id":7,"name":"Jay Pipes","email":"jaypipes@gmail.com","username":"jaypipes"},"change_message_id":"28880a984e18105fcb391353c21272bbd1aa5740","unresolved":false,"context_lines":[{"line_number":23,"context_line":""},{"line_number":24,"context_line":"The APIs ``GET /servers`` and ``GET /servers/{id}`` can list extra specs which"},{"line_number":25,"context_line":"may contain some hints about the guest numa topology but is not easy to"},{"line_number":26,"context_line":"interpret. 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Low-level PCI device information is also be of interest to admins"},{"line_number":27,"context_line":"and or end user."},{"line_number":28,"context_line":""},{"line_number":29,"context_line":""}],"source_content_type":"text/x-rst","patch_set":12,"id":"ffd0ebdf_d826a517","line":26,"range":{"start_line":26,"start_character":52,"end_line":26,"end_character":58},"in_reply_to":"1f769fc5_e4c143e6","updated":"2019-01-03 03:23:58.000000000","message":"Done","commit_id":"15da33218469ad8f9b683a634200ae5c19baa607"},{"author":{"_account_id":7,"name":"Jay Pipes","email":"jaypipes@gmail.com","username":"jaypipes"},"change_message_id":"28880a984e18105fcb391353c21272bbd1aa5740","unresolved":false,"context_lines":[{"line_number":24,"context_line":"The APIs ``GET /servers`` and ``GET /servers/{id}`` can list extra specs which"},{"line_number":25,"context_line":"may contain some hints about the guest numa topology but is not easy to"},{"line_number":26,"context_line":"interpret. Low-level PCI device information is also be of interest to admins"},{"line_number":27,"context_line":"and or end user."},{"line_number":28,"context_line":""},{"line_number":29,"context_line":""},{"line_number":30,"context_line":"Use Cases"}],"source_content_type":"text/x-rst","patch_set":12,"id":"1f769fc5_a4bb4b70","line":27,"range":{"start_line":27,"start_character":0,"end_line":27,"end_character":16},"updated":"2019-01-02 17:19:33.000000000","message":"and/or the end user","commit_id":"15da33218469ad8f9b683a634200ae5c19baa607"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"ccd8e4f6b9522e1b64d638a3df025f0253a0c5f5","unresolved":false,"context_lines":[{"line_number":24,"context_line":"The APIs ``GET /servers`` and ``GET /servers/{id}`` can list extra specs which"},{"line_number":25,"context_line":"may contain some hints about the guest numa topology but is not easy to"},{"line_number":26,"context_line":"interpret. Low-level PCI device information is also be of interest to admins"},{"line_number":27,"context_line":"and or end user."},{"line_number":28,"context_line":""},{"line_number":29,"context_line":""},{"line_number":30,"context_line":"Use Cases"}],"source_content_type":"text/x-rst","patch_set":12,"id":"ffd0ebdf_f8236904","line":27,"range":{"start_line":27,"start_character":0,"end_line":27,"end_character":16},"in_reply_to":"1f769fc5_a4bb4b70","updated":"2019-01-03 03:23:58.000000000","message":"Done","commit_id":"15da33218469ad8f9b683a634200ae5c19baa607"},{"author":{"_account_id":7,"name":"Jay Pipes","email":"jaypipes@gmail.com","username":"jaypipes"},"change_message_id":"28880a984e18105fcb391353c21272bbd1aa5740","unresolved":false,"context_lines":[{"line_number":30,"context_line":"Use Cases"},{"line_number":31,"context_line":"---------"},{"line_number":32,"context_line":""},{"line_number":33,"context_line":"* The end user wants to see the topology (RAM, CPU, PCI) without logging in to"},{"line_number":34,"context_line":"  the guest VM."},{"line_number":35,"context_line":""},{"line_number":36,"context_line":"* The end user wants a unified way to get topology information, independent of"},{"line_number":37,"context_line":"  how the various gest OSes expose it."},{"line_number":38,"context_line":""},{"line_number":39,"context_line":"* The admin wants to know the virtual-to-physical mapping for one or more"},{"line_number":40,"context_line":"  instances for the purpose of debugging and/or monitoring. Admin need make"}],"source_content_type":"text/x-rst","patch_set":12,"id":"1f769fc5_c44c47a0","line":37,"range":{"start_line":33,"start_character":0,"end_line":37,"end_character":38},"updated":"2019-01-02 17:19:33.000000000","message":"end users can\u0027t see GET /servers/{instance}/diagnostics by default.","commit_id":"15da33218469ad8f9b683a634200ae5c19baa607"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"ccd8e4f6b9522e1b64d638a3df025f0253a0c5f5","unresolved":false,"context_lines":[{"line_number":30,"context_line":"Use Cases"},{"line_number":31,"context_line":"---------"},{"line_number":32,"context_line":""},{"line_number":33,"context_line":"* The end user wants to see the topology (RAM, CPU, PCI) without logging in to"},{"line_number":34,"context_line":"  the guest VM."},{"line_number":35,"context_line":""},{"line_number":36,"context_line":"* The end user wants a unified way to get topology information, independent of"},{"line_number":37,"context_line":"  how the various gest OSes expose it."},{"line_number":38,"context_line":""},{"line_number":39,"context_line":"* The admin wants to know the virtual-to-physical mapping for one or more"},{"line_number":40,"context_line":"  instances for the purpose of debugging and/or monitoring. Admin need make"}],"source_content_type":"text/x-rst","patch_set":12,"id":"ffd0ebdf_b872c110","line":37,"range":{"start_line":33,"start_character":0,"end_line":37,"end_character":38},"in_reply_to":"1f769fc5_c44c47a0","updated":"2019-01-03 03:23:58.000000000","message":"i gonna change it to admin, and there is possible change rule to let use had this ability.","commit_id":"15da33218469ad8f9b683a634200ae5c19baa607"},{"author":{"_account_id":7,"name":"Jay Pipes","email":"jaypipes@gmail.com","username":"jaypipes"},"change_message_id":"28880a984e18105fcb391353c21272bbd1aa5740","unresolved":false,"context_lines":[{"line_number":37,"context_line":"  how the various gest OSes expose it."},{"line_number":38,"context_line":""},{"line_number":39,"context_line":"* The admin wants to know the virtual-to-physical mapping for one or more"},{"line_number":40,"context_line":"  instances for the purpose of debugging and/or monitoring. Admin need make"},{"line_number":41,"context_line":"  sure the NUMA topology is what it\u0027s supposed to be, and is correctly"},{"line_number":42,"context_line":"  mapped onto Host."},{"line_number":43,"context_line":""}],"source_content_type":"text/x-rst","patch_set":12,"id":"1f769fc5_645bf353","line":40,"range":{"start_line":40,"start_character":40,"end_line":40,"end_character":58},"updated":"2019-01-02 17:19:33.000000000","message":"monitoring? this information doesn\u0027t change. Generally, you want to monitor metrics that change over time. None of this information changes... why is why I actually don\u0027t think it fits in /server/{instance}/diagnostics (though I understand why Matt prefers to use the diagnostics API instead of the main /servers/{instance} and /servers/{instance}/details APIs...)","commit_id":"15da33218469ad8f9b683a634200ae5c19baa607"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"ccd8e4f6b9522e1b64d638a3df025f0253a0c5f5","unresolved":false,"context_lines":[{"line_number":37,"context_line":"  how the various gest OSes expose it."},{"line_number":38,"context_line":""},{"line_number":39,"context_line":"* The admin wants to know the virtual-to-physical mapping for one or more"},{"line_number":40,"context_line":"  instances for the purpose of debugging and/or monitoring. Admin need make"},{"line_number":41,"context_line":"  sure the NUMA topology is what it\u0027s supposed to be, and is correctly"},{"line_number":42,"context_line":"  mapped onto Host."},{"line_number":43,"context_line":""}],"source_content_type":"text/x-rst","patch_set":12,"id":"ffd0ebdf_78cbf91d","line":40,"range":{"start_line":40,"start_character":40,"end_line":40,"end_character":58},"in_reply_to":"1f769fc5_645bf353","updated":"2019-01-03 03:23:58.000000000","message":"We had mail thread discuss it. If this is still open to you, let\u0027s get it aligned by mail thread.","commit_id":"15da33218469ad8f9b683a634200ae5c19baa607"},{"author":{"_account_id":7,"name":"Jay Pipes","email":"jaypipes@gmail.com","username":"jaypipes"},"change_message_id":"28880a984e18105fcb391353c21272bbd1aa5740","unresolved":false,"context_lines":[{"line_number":38,"context_line":""},{"line_number":39,"context_line":"* The admin wants to know the virtual-to-physical mapping for one or more"},{"line_number":40,"context_line":"  instances for the purpose of debugging and/or monitoring. Admin need make"},{"line_number":41,"context_line":"  sure the NUMA topology is what it\u0027s supposed to be, and is correctly"},{"line_number":42,"context_line":"  mapped onto Host."},{"line_number":43,"context_line":""},{"line_number":44,"context_line":""}],"source_content_type":"text/x-rst","patch_set":12,"id":"1f769fc5_c431a70d","line":41,"range":{"start_line":41,"start_character":11,"end_line":41,"end_character":52},"updated":"2019-01-02 17:19:33.000000000","message":"The guest NUMA topology will be whatever the flavor\u0027s extra specs dictate it will be...","commit_id":"15da33218469ad8f9b683a634200ae5c19baa607"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"ccd8e4f6b9522e1b64d638a3df025f0253a0c5f5","unresolved":false,"context_lines":[{"line_number":38,"context_line":""},{"line_number":39,"context_line":"* The admin wants to know the virtual-to-physical mapping for one or more"},{"line_number":40,"context_line":"  instances for the purpose of debugging and/or monitoring. Admin need make"},{"line_number":41,"context_line":"  sure the NUMA topology is what it\u0027s supposed to be, and is correctly"},{"line_number":42,"context_line":"  mapped onto Host."},{"line_number":43,"context_line":""},{"line_number":44,"context_line":""}],"source_content_type":"text/x-rst","patch_set":12,"id":"ffd0ebdf_98fc9d3f","line":41,"range":{"start_line":41,"start_character":11,"end_line":41,"end_character":52},"in_reply_to":"1f769fc5_c431a70d","updated":"2019-01-03 03:23:58.000000000","message":"In debugging, not sure it\u0027s correct, i.e, live-migration for now.","commit_id":"15da33218469ad8f9b683a634200ae5c19baa607"},{"author":{"_account_id":7,"name":"Jay Pipes","email":"jaypipes@gmail.com","username":"jaypipes"},"change_message_id":"28880a984e18105fcb391353c21272bbd1aa5740","unresolved":false,"context_lines":[{"line_number":45,"context_line":"Proposed change"},{"line_number":46,"context_line":"\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d"},{"line_number":47,"context_line":""},{"line_number":48,"context_line":"In nova, NUMA topology contains group of related properties, like mem size,"},{"line_number":49,"context_line":"page size, cpu pin, cpu/thread policy. This spec proposes an API to present"},{"line_number":50,"context_line":"all this NUMA information, including the virtual-to-physical mapping with"},{"line_number":51,"context_line":"the corresponding PCI device in the NUMA cell."},{"line_number":52,"context_line":""}],"source_content_type":"text/x-rst","patch_set":12,"id":"1f769fc5_84140f50","line":49,"range":{"start_line":48,"start_character":9,"end_line":49,"end_character":38},"updated":"2019-01-02 17:19:33.000000000","message":"yes, this is unfortunate, since NUMA is about memory and whoever created the NUMATopology and InstanceNUMATopology objects originally coupled pinning, memory, pagesize, and other information into a giant blob of goop. :(","commit_id":"15da33218469ad8f9b683a634200ae5c19baa607"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"ccd8e4f6b9522e1b64d638a3df025f0253a0c5f5","unresolved":false,"context_lines":[{"line_number":45,"context_line":"Proposed change"},{"line_number":46,"context_line":"\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d"},{"line_number":47,"context_line":""},{"line_number":48,"context_line":"In nova, NUMA topology contains group of related properties, like mem size,"},{"line_number":49,"context_line":"page size, cpu pin, cpu/thread policy. This spec proposes an API to present"},{"line_number":50,"context_line":"all this NUMA information, including the virtual-to-physical mapping with"},{"line_number":51,"context_line":"the corresponding PCI device in the NUMA cell."},{"line_number":52,"context_line":""}],"source_content_type":"text/x-rst","patch_set":12,"id":"ffd0ebdf_38a33152","line":49,"range":{"start_line":48,"start_character":9,"end_line":49,"end_character":38},"in_reply_to":"1f769fc5_84140f50","updated":"2019-01-03 03:23:58.000000000","message":"yeah, this is not elegant, but i prefer we solve this as another problem. if this spec could do anything good, please don\u0027t hesitate to let me know.","commit_id":"15da33218469ad8f9b683a634200ae5c19baa607"},{"author":{"_account_id":7,"name":"Jay Pipes","email":"jaypipes@gmail.com","username":"jaypipes"},"change_message_id":"28880a984e18105fcb391353c21272bbd1aa5740","unresolved":false,"context_lines":[{"line_number":48,"context_line":"In nova, NUMA topology contains group of related properties, like mem size,"},{"line_number":49,"context_line":"page size, cpu pin, cpu/thread policy. This spec proposes an API to present"},{"line_number":50,"context_line":"all this NUMA information, including the virtual-to-physical mapping with"},{"line_number":51,"context_line":"the corresponding PCI device in the NUMA cell."},{"line_number":52,"context_line":""},{"line_number":53,"context_line":"This spec proposes to add NUMA information and PCI devices to:"},{"line_number":54,"context_line":""}],"source_content_type":"text/x-rst","patch_set":12,"id":"1f769fc5_8722d1a3","line":51,"range":{"start_line":51,"start_character":4,"end_line":51,"end_character":28},"updated":"2019-01-02 17:19:33.000000000","message":"Why are we doing both NUMA and PCI device information in the same spec? I see in the etherpad it was \"AGREED\" to do all \"show\" information in a single spec, but I honestly think trying to do all of this in a single microversion and spec makes it less focused.\n\nI\u0027ve always been annoyed that the PCI device manager -- and the model used in the database and the code itself -- is so PCI-specific. I would love it if we could have a generic \"devices\" approach that just listed a \"bus_type\" of \"pci\" or whatever instead of hard-coding everything as always PCI. The IBM folks I\u0027m sure would appreciated this...","commit_id":"15da33218469ad8f9b683a634200ae5c19baa607"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"ccd8e4f6b9522e1b64d638a3df025f0253a0c5f5","unresolved":false,"context_lines":[{"line_number":48,"context_line":"In nova, NUMA topology contains group of related properties, like mem size,"},{"line_number":49,"context_line":"page size, cpu pin, cpu/thread policy. This spec proposes an API to present"},{"line_number":50,"context_line":"all this NUMA information, including the virtual-to-physical mapping with"},{"line_number":51,"context_line":"the corresponding PCI device in the NUMA cell."},{"line_number":52,"context_line":""},{"line_number":53,"context_line":"This spec proposes to add NUMA information and PCI devices to:"},{"line_number":54,"context_line":""}],"source_content_type":"text/x-rst","patch_set":12,"id":"ffd0ebdf_18b74d89","line":51,"range":{"start_line":51,"start_character":4,"end_line":51,"end_character":28},"in_reply_to":"1f769fc5_8722d1a3","updated":"2019-01-03 03:23:58.000000000","message":"the next version of the review, I gonna to split it out. Speak of the PCI subsystem, sorry i\u0027m one of make it mess. we may discuss it by email, I gonna say it will be a long discussion but out of this spec\u0027s scope.","commit_id":"15da33218469ad8f9b683a634200ae5c19baa607"},{"author":{"_account_id":7,"name":"Jay Pipes","email":"jaypipes@gmail.com","username":"jaypipes"},"change_message_id":"28880a984e18105fcb391353c21272bbd1aa5740","unresolved":false,"context_lines":[{"line_number":57,"context_line":"This API is admin only by default, it could be exposed to users/roles by"},{"line_number":58,"context_line":"changing the default policy rule."},{"line_number":59,"context_line":""},{"line_number":60,"context_line":"API returns each cell\u0027s information belong to one server, inclucde socket, cpu,"},{"line_number":61,"context_line":"thread, mem, page size, cpuset,CPU pinned info, siblings, thread policy, CPU"},{"line_number":62,"context_line":"pinning, host NUMA node number and PCI devices."},{"line_number":63,"context_line":""}],"source_content_type":"text/x-rst","patch_set":12,"id":"1f769fc5_47411939","line":60,"range":{"start_line":60,"start_character":58,"end_line":60,"end_character":66},"updated":"2019-01-02 17:19:33.000000000","message":"including","commit_id":"15da33218469ad8f9b683a634200ae5c19baa607"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"ccd8e4f6b9522e1b64d638a3df025f0253a0c5f5","unresolved":false,"context_lines":[{"line_number":57,"context_line":"This API is admin only by default, it could be exposed to users/roles by"},{"line_number":58,"context_line":"changing the default policy rule."},{"line_number":59,"context_line":""},{"line_number":60,"context_line":"API returns each cell\u0027s information belong to one server, inclucde socket, cpu,"},{"line_number":61,"context_line":"thread, mem, page size, cpuset,CPU pinned info, siblings, thread policy, CPU"},{"line_number":62,"context_line":"pinning, host NUMA node number and PCI devices."},{"line_number":63,"context_line":""}],"source_content_type":"text/x-rst","patch_set":12,"id":"ffd0ebdf_38bc9168","line":60,"range":{"start_line":60,"start_character":58,"end_line":60,"end_character":66},"in_reply_to":"1f769fc5_47411939","updated":"2019-01-03 03:23:58.000000000","message":"Done","commit_id":"15da33218469ad8f9b683a634200ae5c19baa607"},{"author":{"_account_id":7,"name":"Jay Pipes","email":"jaypipes@gmail.com","username":"jaypipes"},"change_message_id":"28880a984e18105fcb391353c21272bbd1aa5740","unresolved":false,"context_lines":[{"line_number":70,"context_line":"Instead of put these information into ``GET /servers/{server_id}/diagnostics``,"},{"line_number":71,"context_line":"there are other 2 options:"},{"line_number":72,"context_line":""},{"line_number":73,"context_line":"* add a new sub-resource ``topology`` to servers:"},{"line_number":74,"context_line":"  ``GET /servers/{server_id}/topology``"},{"line_number":75,"context_line":"  returns the NUMA information for one server."},{"line_number":76,"context_line":""},{"line_number":77,"context_line":"* put the NUMA information under ``GET /servers/{id}`` and"},{"line_number":78,"context_line":"  ``GET /servers/detail``."}],"source_content_type":"text/x-rst","patch_set":12,"id":"1f769fc5_676535e1","line":75,"range":{"start_line":73,"start_character":0,"end_line":75,"end_character":46},"updated":"2019-01-02 17:19:33.000000000","message":"this would actually be my preference. And I would not pollute it with information about PCI devices. I\u0027d add a /devices API endpoint for retrieving the device information and include in the /topology output only information about, well, the guest CPU topology. Unfortunately, due to historical reasons I outlined above, CPU topology, memory page sizes, and memory allocations to individual NUMA cells are all jammed into one big blob. :(","commit_id":"15da33218469ad8f9b683a634200ae5c19baa607"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"ccd8e4f6b9522e1b64d638a3df025f0253a0c5f5","unresolved":false,"context_lines":[{"line_number":70,"context_line":"Instead of put these information into ``GET /servers/{server_id}/diagnostics``,"},{"line_number":71,"context_line":"there are other 2 options:"},{"line_number":72,"context_line":""},{"line_number":73,"context_line":"* add a new sub-resource ``topology`` to servers:"},{"line_number":74,"context_line":"  ``GET /servers/{server_id}/topology``"},{"line_number":75,"context_line":"  returns the NUMA information for one server."},{"line_number":76,"context_line":""},{"line_number":77,"context_line":"* put the NUMA information under ``GET /servers/{id}`` and"},{"line_number":78,"context_line":"  ``GET /servers/detail``."}],"source_content_type":"text/x-rst","patch_set":12,"id":"ffd0ebdf_f87289e3","line":75,"range":{"start_line":73,"start_character":0,"end_line":75,"end_character":46},"in_reply_to":"1f769fc5_676535e1","updated":"2019-01-03 03:23:58.000000000","message":"see you in mail thread.\nand again NUMA\u0027s mess also one of a big topic I think out of this spec\u0027s scope, but thanks.","commit_id":"15da33218469ad8f9b683a634200ae5c19baa607"},{"author":{"_account_id":6873,"name":"Matt Riedemann","email":"mriedem.os@gmail.com","username":"mriedem"},"change_message_id":"a4c54bb7e7db9c1bf8ffcfc1c4c0dcb1dc466908","unresolved":false,"context_lines":[{"line_number":21,"context_line":""},{"line_number":22,"context_line":"The APIs ``GET /servers`` and ``GET /servers/{id}`` can list extra specs which"},{"line_number":23,"context_line":"may contain some hints about the guest numa topology but is not easy to"},{"line_number":24,"context_line":"interpret. "},{"line_number":25,"context_line":""},{"line_number":26,"context_line":""},{"line_number":27,"context_line":"Use Cases"}],"source_content_type":"text/x-rst","patch_set":14,"id":"ffd0ebdf_be537ee2","line":24,"range":{"start_line":24,"start_character":10,"end_line":24,"end_character":11},"updated":"2019-01-03 17:09:17.000000000","message":"pep8 failure","commit_id":"418cf60366599d31fc3e309d077385a3daf85b23"},{"author":{"_account_id":6873,"name":"Matt Riedemann","email":"mriedem.os@gmail.com","username":"mriedem"},"change_message_id":"01f6ad2d2d102990ed2b1630edaa97ff0f50d366","unresolved":false,"context_lines":[{"line_number":9,"context_line":"\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d"},{"line_number":10,"context_line":""},{"line_number":11,"context_line":"Add NUMA into \"GET /servers/{server_id}/diagnostics\" API."},{"line_number":12,"context_line":"bp link:"},{"line_number":13,"context_line":""},{"line_number":14,"context_line":"https://blueprints.launchpad.net/nova/+spec/show-server-numa-topology"},{"line_number":15,"context_line":""}],"source_content_type":"text/x-rst","patch_set":15,"id":"ffd0ebdf_4f21779f","line":12,"range":{"start_line":12,"start_character":0,"end_line":12,"end_character":8},"updated":"2019-01-03 21:54:45.000000000","message":"nit: you can remove this","commit_id":"0004c0201e21fd0f2ea4bad077675222280f3f22"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"ea142abe6f8727132f7037dc61f2fd1fe07e54ac","unresolved":false,"context_lines":[{"line_number":9,"context_line":"\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d"},{"line_number":10,"context_line":""},{"line_number":11,"context_line":"Add NUMA into \"GET /servers/{server_id}/diagnostics\" API."},{"line_number":12,"context_line":"bp link:"},{"line_number":13,"context_line":""},{"line_number":14,"context_line":"https://blueprints.launchpad.net/nova/+spec/show-server-numa-topology"},{"line_number":15,"context_line":""}],"source_content_type":"text/x-rst","patch_set":15,"id":"dfd5e7cf_70830958","line":12,"range":{"start_line":12,"start_character":0,"end_line":12,"end_character":8},"in_reply_to":"ffd0ebdf_4f21779f","updated":"2019-01-07 01:48:03.000000000","message":"Done","commit_id":"0004c0201e21fd0f2ea4bad077675222280f3f22"},{"author":{"_account_id":25625,"name":"Tetsuro Nakamura","email":"tetsuro.nakamura.bc@hco.ntt.co.jp","username":"tetsuro0907"},"change_message_id":"55073403f3cfad1e5cd4fa6dd5e7c35c24f2e35a","unresolved":false,"context_lines":[{"line_number":34,"context_line":"  how the various gest OSes expose it."},{"line_number":35,"context_line":""},{"line_number":36,"context_line":"* The admin wants to know the virtual-to-physical mapping for one or more"},{"line_number":37,"context_line":"  instances for the purpose of debugging,and admin need make sure the NUMA"},{"line_number":38,"context_line":"  topology is what it\u0027s supposed to be, and is correctly mapped onto Host."},{"line_number":39,"context_line":""},{"line_number":40,"context_line":"* The end use could had all of above ability if amdin alow it by change"}],"source_content_type":"text/x-rst","patch_set":15,"id":"ffd0ebdf_0ada7a16","line":37,"range":{"start_line":37,"start_character":40,"end_line":37,"end_character":41},"updated":"2019-01-04 05:26:42.000000000","message":"nit: needs a space","commit_id":"0004c0201e21fd0f2ea4bad077675222280f3f22"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"ea142abe6f8727132f7037dc61f2fd1fe07e54ac","unresolved":false,"context_lines":[{"line_number":34,"context_line":"  how the various gest OSes expose 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all of the above abilities if admin allows them by changing the policy rule.\" \n... please get corrections from natives, too.","commit_id":"0004c0201e21fd0f2ea4bad077675222280f3f22"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"ea142abe6f8727132f7037dc61f2fd1fe07e54ac","unresolved":false,"context_lines":[{"line_number":37,"context_line":"  instances for the purpose of debugging,and admin need make sure the NUMA"},{"line_number":38,"context_line":"  topology is what it\u0027s supposed to be, and is correctly mapped onto Host."},{"line_number":39,"context_line":""},{"line_number":40,"context_line":"* The end use could had all of above ability if amdin alow it by change"},{"line_number":41,"context_line":"  policy rule."},{"line_number":42,"context_line":""},{"line_number":43,"context_line":""},{"line_number":44,"context_line":"Proposed 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each cell\u0027s information belong to one server, inclucding socket,"},{"line_number":59,"context_line":"cpu,thread, mem, page size, cpuset,CPU pinned info, siblings, thread policy,"},{"line_number":60,"context_line":"CPU pinning, host NUMA node number."},{"line_number":61,"context_line":""},{"line_number":62,"context_line":"If there is no NUMA information available, the corresponding key\u0027s value"}],"source_content_type":"text/x-rst","patch_set":15,"id":"dfd5e7cf_d08d157c","line":59,"range":{"start_line":59,"start_character":3,"end_line":59,"end_character":4},"in_reply_to":"ffd0ebdf_0ae4baab","updated":"2019-01-07 01:48:03.000000000","message":"Done","commit_id":"0004c0201e21fd0f2ea4bad077675222280f3f22"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"ea142abe6f8727132f7037dc61f2fd1fe07e54ac","unresolved":false,"context_lines":[{"line_number":56,"context_line":"changing the default policy rule."},{"line_number":57,"context_line":""},{"line_number":58,"context_line":"API returns each cell\u0027s information belong to one server, inclucding socket,"},{"line_number":59,"context_line":"cpu,thread, mem, page size, cpuset,CPU pinned info, siblings, thread policy,"},{"line_number":60,"context_line":"CPU pinning, host NUMA node number."},{"line_number":61,"context_line":""},{"line_number":62,"context_line":"If there is no NUMA information available, the corresponding key\u0027s value"}],"source_content_type":"text/x-rst","patch_set":15,"id":"dfd5e7cf_70e8e915","line":59,"range":{"start_line":59,"start_character":34,"end_line":59,"end_character":35},"in_reply_to":"ffd0ebdf_4a03a243","updated":"2019-01-07 01:48:03.000000000","message":"Done","commit_id":"0004c0201e21fd0f2ea4bad077675222280f3f22"},{"author":{"_account_id":6873,"name":"Matt Riedemann","email":"mriedem.os@gmail.com","username":"mriedem"},"change_message_id":"01f6ad2d2d102990ed2b1630edaa97ff0f50d366","unresolved":false,"context_lines":[{"line_number":68,"context_line":"Instead of put these information into ``GET /servers/{server_id}/diagnostics``,"},{"line_number":69,"context_line":"there are other 2 options:"},{"line_number":70,"context_line":""},{"line_number":71,"context_line":"* add a new sub-resource ``topology`` to servers:"},{"line_number":72,"context_line":"  ``GET /servers/{server_id}/topology``"},{"line_number":73,"context_line":"  returns the NUMA information for one server."},{"line_number":74,"context_line":""},{"line_number":75,"context_line":"* put the NUMA information under ``GET /servers/{id}`` and"},{"line_number":76,"context_line":"  ``GET /servers/detail``."}],"source_content_type":"text/x-rst","patch_set":15,"id":"ffd0ebdf_af510311","line":73,"range":{"start_line":71,"start_character":0,"end_line":73,"end_character":46},"updated":"2019-01-03 21:54:45.000000000","message":"This is what Jay was asking for, and for the record I\u0027m OK with it as well (and said so in the ML thread). I just don\u0027t want to have to put this into the GET /servers/{server_id} (nova show) or GET /servers/detail (nova list) API responses.","commit_id":"0004c0201e21fd0f2ea4bad077675222280f3f22"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"ea142abe6f8727132f7037dc61f2fd1fe07e54ac","unresolved":false,"context_lines":[{"line_number":68,"context_line":"Instead of put these information into ``GET /servers/{server_id}/diagnostics``,"},{"line_number":69,"context_line":"there are other 2 options:"},{"line_number":70,"context_line":""},{"line_number":71,"context_line":"* add a new sub-resource ``topology`` to servers:"},{"line_number":72,"context_line":"  ``GET /servers/{server_id}/topology``"},{"line_number":73,"context_line":"  returns the NUMA information for one server."},{"line_number":74,"context_line":""},{"line_number":75,"context_line":"* put the NUMA information under ``GET /servers/{id}`` and"},{"line_number":76,"context_line":"  ``GET /servers/detail``."}],"source_content_type":"text/x-rst","patch_set":15,"id":"dfd5e7cf_70d1c957","line":73,"range":{"start_line":71,"start_character":0,"end_line":73,"end_character":46},"in_reply_to":"ffd0ebdf_af510311","updated":"2019-01-07 01:48:03.000000000","message":"thank. it clear enough for me how to change the spec.","commit_id":"0004c0201e21fd0f2ea4bad077675222280f3f22"},{"author":{"_account_id":25625,"name":"Tetsuro Nakamura","email":"tetsuro.nakamura.bc@hco.ntt.co.jp","username":"tetsuro0907"},"change_message_id":"55073403f3cfad1e5cd4fa6dd5e7c35c24f2e35a","unresolved":false,"context_lines":[{"line_number":119,"context_line":""},{"line_number":120,"context_line":"                         } # numa_topology"},{"line_number":121,"context_line":""},{"line_number":122,"context_line":"         \"emulator_threads_policy\": \"share\","},{"line_number":123,"context_line":""},{"line_number":124,"context_line":"    }"},{"line_number":125,"context_line":""}],"source_content_type":"text/x-rst","patch_set":15,"id":"ffd0ebdf_dded1e26","line":122,"range":{"start_line":122,"start_character":9,"end_line":122,"end_character":44},"updated":"2019-01-04 05:26:42.000000000","message":"Isn\u0027t it good to also show the pcpus which the emulator threads use, or is it too difficult?","commit_id":"0004c0201e21fd0f2ea4bad077675222280f3f22"},{"author":{"_account_id":25625,"name":"Tetsuro Nakamura","email":"tetsuro.nakamura.bc@hco.ntt.co.jp","username":"tetsuro0907"},"change_message_id":"f958de8f15302a7d7cd3b4253f7f22a964c68e95","unresolved":false,"context_lines":[{"line_number":119,"context_line":""},{"line_number":120,"context_line":"                         } # numa_topology"},{"line_number":121,"context_line":""},{"line_number":122,"context_line":"         \"emulator_threads_policy\": \"share\","},{"line_number":123,"context_line":""},{"line_number":124,"context_line":"    }"},{"line_number":125,"context_line":""}],"source_content_type":"text/x-rst","patch_set":15,"id":"dfd5e7cf_0e3e1a29","line":122,"range":{"start_line":122,"start_character":9,"end_line":122,"end_character":44},"in_reply_to":"dfd5e7cf_d050b5d7","updated":"2019-01-07 06:31:44.000000000","message":"When this policy is set to \"isolate\", the thread(s) is pinned to one pcpu and that pcpu number is in the InstanceNUMATopology.cpuset_reserved while the value is null if \"share\" policy is specified.\n\nIn rocky, we changed the \"share\" policy a bit to let emulator threads use pcpus specified in ``[compute]/cpu_shared_set`` in the nova.conf. However, it looks like that the pcpus in the ``cpu_shared_set`` is still not retained in InstanceNUMATopology.cpuset_reserved since the operation is done in the libvirt driver [1].\n\n[1] https://review.openstack.org/#/c/510897/\n\nAs it\u0027s a bit complicated I just thought it is nice to show in this API which pcpus the emulator thread(s) is using, but yes, as it\u0027s a bit complicated it is possibly better to discuss this in a separate spec.","commit_id":"0004c0201e21fd0f2ea4bad077675222280f3f22"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"ea142abe6f8727132f7037dc61f2fd1fe07e54ac","unresolved":false,"context_lines":[{"line_number":119,"context_line":""},{"line_number":120,"context_line":"                         } # numa_topology"},{"line_number":121,"context_line":""},{"line_number":122,"context_line":"         \"emulator_threads_policy\": \"share\","},{"line_number":123,"context_line":""},{"line_number":124,"context_line":"    }"},{"line_number":125,"context_line":""}],"source_content_type":"text/x-rst","patch_set":15,"id":"dfd5e7cf_d050b5d7","line":122,"range":{"start_line":122,"start_character":9,"end_line":122,"end_character":44},"in_reply_to":"ffd0ebdf_dded1e26","updated":"2019-01-07 01:48:03.000000000","message":"emulator thread\u0027s pcpu not in the Nova yet(fix me). this request adding that feature first.","commit_id":"0004c0201e21fd0f2ea4bad077675222280f3f22"},{"author":{"_account_id":25625,"name":"Tetsuro Nakamura","email":"tetsuro.nakamura.bc@hco.ntt.co.jp","username":"tetsuro0907"},"change_message_id":"f958de8f15302a7d7cd3b4253f7f22a964c68e95","unresolved":false,"context_lines":[{"line_number":36,"context_line":"  instances for the purpose of debugging, and admin need make sure the NUMA"},{"line_number":37,"context_line":"  topology is what it\u0027s supposed to be, and is correctly mapped onto Host."},{"line_number":38,"context_line":""},{"line_number":39,"context_line":"* The end user could have all of above abilities if amdin alow them by change"},{"line_number":40,"context_line":"  policy rule."},{"line_number":41,"context_line":""},{"line_number":42,"context_line":""}],"source_content_type":"text/x-rst","patch_set":17,"id":"dfd5e7cf_2e70be72","line":39,"range":{"start_line":39,"start_character":52,"end_line":39,"end_character":62},"updated":"2019-01-07 06:31:44.000000000","message":"nit: admin allows","commit_id":"3034ef0bf07c511a47198bbb2c10d2ff77794c9c"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"ad0c4c726db2095655be34a55241a91522ac7aa3","unresolved":false,"context_lines":[{"line_number":36,"context_line":"  instances for the purpose of debugging, and admin need make sure the NUMA"},{"line_number":37,"context_line":"  topology is what it\u0027s supposed to be, and is correctly mapped onto Host."},{"line_number":38,"context_line":""},{"line_number":39,"context_line":"* The end user could have all of above abilities if amdin alow them by change"},{"line_number":40,"context_line":"  policy rule."},{"line_number":41,"context_line":""},{"line_number":42,"context_line":""}],"source_content_type":"text/x-rst","patch_set":17,"id":"dfd5e7cf_130dde3d","line":39,"range":{"start_line":39,"start_character":52,"end_line":39,"end_character":62},"in_reply_to":"dfd5e7cf_2e70be72","updated":"2019-01-07 14:27:13.000000000","message":"Done","commit_id":"3034ef0bf07c511a47198bbb2c10d2ff77794c9c"},{"author":{"_account_id":25625,"name":"Tetsuro Nakamura","email":"tetsuro.nakamura.bc@hco.ntt.co.jp","username":"tetsuro0907"},"change_message_id":"f958de8f15302a7d7cd3b4253f7f22a964c68e95","unresolved":false,"context_lines":[{"line_number":69,"context_line":""},{"line_number":70,"context_line":"* add NUMA information into existed sub-resource ``diagnostics``:"},{"line_number":71,"context_line":"  ``GET /servers/{server_id}/diagnostics``"},{"line_number":72,"context_line":"  returns the NUMA information for one server."},{"line_number":73,"context_line":""},{"line_number":74,"context_line":"* put the NUMA information under ``GET /servers/{id}`` and"},{"line_number":75,"context_line":"  ``GET /servers/detail``."}],"source_content_type":"text/x-rst","patch_set":17,"id":"dfd5e7cf_8e044ac8","line":72,"updated":"2019-01-07 06:31:44.000000000","message":"nit: It is good to add why we didn\u0027t go this way","commit_id":"3034ef0bf07c511a47198bbb2c10d2ff77794c9c"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"ad0c4c726db2095655be34a55241a91522ac7aa3","unresolved":false,"context_lines":[{"line_number":69,"context_line":""},{"line_number":70,"context_line":"* add NUMA information into existed sub-resource ``diagnostics``:"},{"line_number":71,"context_line":"  ``GET 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   \"numa_node\": 3, # Host Numa Node"},{"line_number":102,"context_line":"                      # 0:5 means vcpu 0 pinning to pcpu 5"}],"source_content_type":"text/x-rst","patch_set":18,"id":"dfd5e7cf_ae67c525","line":99,"range":{"start_line":99,"start_character":10,"end_line":99,"end_character":15},"updated":"2019-01-07 14:52:46.000000000","message":"maybe called as nodes?, somewhere we called as cell and somewhere we called as node.","commit_id":"fd2dd37af8a318fdcb66258f4d7a1c11c9c5043a"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"3625fd36fd492ac791be8f55e4dc50a6627580e4","unresolved":false,"context_lines":[{"line_number":96,"context_line":""},{"line_number":97,"context_line":"   {"},{"line_number":98,"context_line":""},{"line_number":99,"context_line":"         \"cells\":["},{"line_number":100,"context_line":"                    {"},{"line_number":101,"context_line":"                      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This spec proposes an API to present"},{"line_number":48,"context_line":"all this NUMA information, including the virtual-to-physical mapping."},{"line_number":49,"context_line":""},{"line_number":50,"context_line":"This spec proposes a new sub-resource \u0027topology\u0027 to servers API:"}],"source_content_type":"text/x-rst","patch_set":20,"id":"dfd5e7cf_fbffb564","line":47,"range":{"start_line":47,"start_character":11,"end_line":47,"end_character":19},"updated":"2019-01-08 17:15:02.000000000","message":"s/cpu pin/the vCPU thread to logical host processor mapping, and the/","commit_id":"311b94eeae4bed5eb53b89a95273fb960eff312c"},{"author":{"_account_id":7,"name":"Jay Pipes","email":"jaypipes@gmail.com","username":"jaypipes"},"change_message_id":"dceadb8cdcdbc4d1d12e9d27741791fa025a4649","unresolved":false,"context_lines":[{"line_number":44,"context_line":"\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d"},{"line_number":45,"context_line":""},{"line_number":46,"context_line":"In nova, NUMA topology contains group of related properties, like mem size,"},{"line_number":47,"context_line":"page size, cpu pin, cpu/thread policy. This spec proposes an API to present"},{"line_number":48,"context_line":"all this NUMA information, including the virtual-to-physical mapping."},{"line_number":49,"context_line":""},{"line_number":50,"context_line":"This spec proposes a new sub-resource \u0027topology\u0027 to servers API:"}],"source_content_type":"text/x-rst","patch_set":20,"id":"dfd5e7cf_7bdae517","line":47,"range":{"start_line":47,"start_character":0,"end_line":47,"end_character":9},"updated":"2019-01-08 17:15:02.000000000","message":"s/page size/the list of memory page sizes supported on the NUMA cell/","commit_id":"311b94eeae4bed5eb53b89a95273fb960eff312c"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"07703de968b96bad9d96eacd607e4f8c5d1ceaa7","unresolved":false,"context_lines":[{"line_number":44,"context_line":"\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d"},{"line_number":45,"context_line":""},{"line_number":46,"context_line":"In nova, NUMA topology contains group of related properties, like mem size,"},{"line_number":47,"context_line":"page size, cpu pin, cpu/thread policy. This spec proposes an API to present"},{"line_number":48,"context_line":"all this NUMA information, including the virtual-to-physical mapping."},{"line_number":49,"context_line":""},{"line_number":50,"context_line":"This spec proposes a new sub-resource \u0027topology\u0027 to servers API:"}],"source_content_type":"text/x-rst","patch_set":20,"id":"dfd5e7cf_701c3c6a","line":47,"range":{"start_line":47,"start_character":11,"end_line":47,"end_character":19},"in_reply_to":"dfd5e7cf_fbffb564","updated":"2019-01-08 22:40:21.000000000","message":"Done","commit_id":"311b94eeae4bed5eb53b89a95273fb960eff312c"},{"author":{"_account_id":7,"name":"Jay Pipes","email":"jaypipes@gmail.com","username":"jaypipes"},"change_message_id":"dceadb8cdcdbc4d1d12e9d27741791fa025a4649","unresolved":false,"context_lines":[{"line_number":54,"context_line":"This API is admin only by default, it could be exposed to users/roles by"},{"line_number":55,"context_line":"changing the default policy rule."},{"line_number":56,"context_line":""},{"line_number":57,"context_line":"API returns each cell\u0027s information belong to one server, including socket,"},{"line_number":58,"context_line":"cpu, thread, mem, page size, cpuset, CPU pinned info, siblings, thread policy,"},{"line_number":59,"context_line":"CPU pinning, host NUMA node number."},{"line_number":60,"context_line":""}],"source_content_type":"text/x-rst","patch_set":20,"id":"dfd5e7cf_7bf3c59f","line":57,"range":{"start_line":57,"start_character":36,"end_line":57,"end_character":42},"updated":"2019-01-08 17:15:02.000000000","message":"s/belong/belonging/","commit_id":"311b94eeae4bed5eb53b89a95273fb960eff312c"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"07703de968b96bad9d96eacd607e4f8c5d1ceaa7","unresolved":false,"context_lines":[{"line_number":54,"context_line":"This API is admin only by default, it could be exposed to users/roles by"},{"line_number":55,"context_line":"changing the default policy rule."},{"line_number":56,"context_line":""},{"line_number":57,"context_line":"API returns each cell\u0027s information belong to one server, including socket,"},{"line_number":58,"context_line":"cpu, thread, mem, page size, cpuset, CPU pinned info, siblings, thread policy,"},{"line_number":59,"context_line":"CPU pinning, host NUMA node number."},{"line_number":60,"context_line":""}],"source_content_type":"text/x-rst","patch_set":20,"id":"dfd5e7cf_502d7893","line":57,"range":{"start_line":57,"start_character":36,"end_line":57,"end_character":42},"in_reply_to":"dfd5e7cf_7bf3c59f","updated":"2019-01-08 22:40:21.000000000","message":"Done","commit_id":"311b94eeae4bed5eb53b89a95273fb960eff312c"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"2c10661781279e30997cccdaf6cb4633fdaf9342","unresolved":false,"context_lines":[{"line_number":98,"context_line":""},{"line_number":99,"context_line":"         \"nodes\":["},{"line_number":100,"context_line":"                    {"},{"line_number":101,"context_line":"                      \"host_numa_node\": 3, # Host Numa Node"},{"line_number":102,"context_line":"                      # 0:5 means vcpu 0 pinning to pcpu 5"},{"line_number":103,"context_line":"                      \"cpu_pinning\": {0:5, 1:6},"},{"line_number":104,"context_line":"                      \"cpu_thread_policy\": \"prefer\","}],"source_content_type":"text/x-rst","patch_set":20,"id":"dfd5e7cf_9e3217f1","line":101,"range":{"start_line":101,"start_character":22,"end_line":101,"end_character":59},"updated":"2019-01-08 17:46:21.000000000","message":"i know that this api in general will be admin only\nbut even when the defaul policy is relaxed i think this should be admin only still or governmened by a secound policy atibute so that you can make the general api non admin but keep the host specific stuff admin only.","commit_id":"311b94eeae4bed5eb53b89a95273fb960eff312c"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"536d7f10e331ccc876b7297699dd97e813b410bb","unresolved":false,"context_lines":[{"line_number":98,"context_line":""},{"line_number":99,"context_line":"         \"nodes\":["},{"line_number":100,"context_line":"                    {"},{"line_number":101,"context_line":"                      \"host_numa_node\": 3, # Host Numa Node"},{"line_number":102,"context_line":"                      # 0:5 means vcpu 0 pinning to pcpu 5"},{"line_number":103,"context_line":"                      \"cpu_pinning\": {0:5, 1:6},"},{"line_number":104,"context_line":"                      \"cpu_thread_policy\": \"prefer\","}],"source_content_type":"text/x-rst","patch_set":20,"id":"dfd5e7cf_c494498e","line":101,"range":{"start_line":101,"start_character":22,"end_line":101,"end_character":59},"in_reply_to":"dfd5e7cf_9e3217f1","updated":"2019-01-08 23:24:05.000000000","message":"Done","commit_id":"311b94eeae4bed5eb53b89a95273fb960eff312c"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"2c10661781279e30997cccdaf6cb4633fdaf9342","unresolved":false,"context_lines":[{"line_number":100,"context_line":"                    {"},{"line_number":101,"context_line":"                      \"host_numa_node\": 3, # Host Numa Node"},{"line_number":102,"context_line":"                      # 0:5 means vcpu 0 pinning to pcpu 5"},{"line_number":103,"context_line":"                      \"cpu_pinning\": {0:5, 1:6},"},{"line_number":104,"context_line":"                      \"cpu_thread_policy\": \"prefer\","},{"line_number":105,"context_line":"                      \"cpuset\": [0,1,2,3],"},{"line_number":106,"context_line":"                      \"siblings\": [[0,1],[2,3]],"}],"source_content_type":"text/x-rst","patch_set":20,"id":"dfd5e7cf_7e63b3dd","line":103,"range":{"start_line":103,"start_character":23,"end_line":103,"end_character":48},"updated":"2019-01-08 17:46:21.000000000","message":"this should be admin only.\n\nalso this example does not map to the values later in this example\n\n \"sockets\": 0,\n \"cores\": 2,\n \"threads\": 2\n\nthis would require 4 cpu mapping not 2","commit_id":"311b94eeae4bed5eb53b89a95273fb960eff312c"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"536d7f10e331ccc876b7297699dd97e813b410bb","unresolved":false,"context_lines":[{"line_number":100,"context_line":"                    {"},{"line_number":101,"context_line":"                      \"host_numa_node\": 3, # Host Numa Node"},{"line_number":102,"context_line":"                      # 0:5 means vcpu 0 pinning to pcpu 5"},{"line_number":103,"context_line":"                      \"cpu_pinning\": {0:5, 1:6},"},{"line_number":104,"context_line":"                      \"cpu_thread_policy\": \"prefer\","},{"line_number":105,"context_line":"                      \"cpuset\": [0,1,2,3],"},{"line_number":106,"context_line":"                      \"siblings\": [[0,1],[2,3]],"}],"source_content_type":"text/x-rst","patch_set":20,"id":"dfd5e7cf_848e4176","line":103,"range":{"start_line":103,"start_character":23,"end_line":103,"end_character":48},"in_reply_to":"dfd5e7cf_7e63b3dd","updated":"2019-01-08 23:24:05.000000000","message":"done for admin only part.","commit_id":"311b94eeae4bed5eb53b89a95273fb960eff312c"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"07703de968b96bad9d96eacd607e4f8c5d1ceaa7","unresolved":false,"context_lines":[{"line_number":100,"context_line":"                    {"},{"line_number":101,"context_line":"                      \"host_numa_node\": 3, # Host Numa Node"},{"line_number":102,"context_line":"                      # 0:5 means vcpu 0 pinning to pcpu 5"},{"line_number":103,"context_line":"                      \"cpu_pinning\": {0:5, 1:6},"},{"line_number":104,"context_line":"                      \"cpu_thread_policy\": \"prefer\","},{"line_number":105,"context_line":"                      \"cpuset\": [0,1,2,3],"},{"line_number":106,"context_line":"                      \"siblings\": [[0,1],[2,3]],"}],"source_content_type":"text/x-rst","patch_set":20,"id":"dfd5e7cf_50949837","line":103,"range":{"start_line":103,"start_character":23,"end_line":103,"end_character":48},"in_reply_to":"dfd5e7cf_7e63b3dd","updated":"2019-01-08 22:40:21.000000000","message":"fix me, i think it\u0027s total threads number not per core, or we redefined it to per core thread number.","commit_id":"311b94eeae4bed5eb53b89a95273fb960eff312c"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"2c10661781279e30997cccdaf6cb4633fdaf9342","unresolved":false,"context_lines":[{"line_number":101,"context_line":"                      \"host_numa_node\": 3, # Host Numa Node"},{"line_number":102,"context_line":"                      # 0:5 means vcpu 0 pinning to pcpu 5"},{"line_number":103,"context_line":"                      \"cpu_pinning\": {0:5, 1:6},"},{"line_number":104,"context_line":"                      \"cpu_thread_policy\": \"prefer\","},{"line_number":105,"context_line":"                      \"cpuset\": [0,1,2,3],"},{"line_number":106,"context_line":"                      \"siblings\": [[0,1],[2,3]],"},{"line_number":107,"context_line":"                      \"memory_mb\": 1024,"}],"source_content_type":"text/x-rst","patch_set":20,"id":"dfd5e7cf_de917f54","line":104,"range":{"start_line":104,"start_character":22,"end_line":104,"end_character":52},"updated":"2019-01-08 17:46:21.000000000","message":"this should be pulled out of the nodes section and moved to line 115 as it is common to all core on the vm.\nyou would also proably want to have a cpu_policy value to indicate if the policy is shared or dedicated in the first place and finally it would be good to include the realtime mask.\n\nthe cpu_thread_policy and realtime mask are libvirt specific so jay\u0027s objection to includeing the emulator_threads_policy would equally apply.","commit_id":"311b94eeae4bed5eb53b89a95273fb960eff312c"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"536d7f10e331ccc876b7297699dd97e813b410bb","unresolved":false,"context_lines":[{"line_number":101,"context_line":"                      \"host_numa_node\": 3, # Host Numa Node"},{"line_number":102,"context_line":"                      # 0:5 means vcpu 0 pinning to pcpu 5"},{"line_number":103,"context_line":"                      \"cpu_pinning\": {0:5, 1:6},"},{"line_number":104,"context_line":"                      \"cpu_thread_policy\": \"prefer\","},{"line_number":105,"context_line":"                      \"cpuset\": [0,1,2,3],"},{"line_number":106,"context_line":"                      \"siblings\": [[0,1],[2,3]],"},{"line_number":107,"context_line":"                      \"memory_mb\": 1024,"}],"source_content_type":"text/x-rst","patch_set":20,"id":"dfd5e7cf_c4c20986","line":104,"range":{"start_line":104,"start_character":22,"end_line":104,"end_character":52},"in_reply_to":"dfd5e7cf_de917f54","updated":"2019-01-08 23:24:05.000000000","message":"this not exactly jay\u0027s comment. libvirt emulator thread is not the same as this one.","commit_id":"311b94eeae4bed5eb53b89a95273fb960eff312c"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"2c10661781279e30997cccdaf6cb4633fdaf9342","unresolved":false,"context_lines":[{"line_number":102,"context_line":"                      # 0:5 means vcpu 0 pinning to pcpu 5"},{"line_number":103,"context_line":"                      \"cpu_pinning\": {0:5, 1:6},"},{"line_number":104,"context_line":"                      \"cpu_thread_policy\": \"prefer\","},{"line_number":105,"context_line":"                      \"cpuset\": [0,1,2,3],"},{"line_number":106,"context_line":"                      \"siblings\": [[0,1],[2,3]],"},{"line_number":107,"context_line":"                      \"memory_mb\": 1024,"},{"line_number":108,"context_line":"                      \"pagesize_mb\": 4096,"},{"line_number":109,"context_line":"                      \"sockets\": 0,"}],"source_content_type":"text/x-rst","patch_set":20,"id":"dfd5e7cf_7e02d3b6","line":106,"range":{"start_line":105,"start_character":21,"end_line":106,"end_character":48},"updated":"2019-01-08 17:46:21.000000000","message":"assuming this is the virtual cpuset and sibling set then this is fine to be non admin.","commit_id":"311b94eeae4bed5eb53b89a95273fb960eff312c"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"536d7f10e331ccc876b7297699dd97e813b410bb","unresolved":false,"context_lines":[{"line_number":102,"context_line":"                      # 0:5 means vcpu 0 pinning to pcpu 5"},{"line_number":103,"context_line":"                      \"cpu_pinning\": {0:5, 1:6},"},{"line_number":104,"context_line":"                      \"cpu_thread_policy\": \"prefer\","},{"line_number":105,"context_line":"                      \"cpuset\": [0,1,2,3],"},{"line_number":106,"context_line":"                      \"siblings\": [[0,1],[2,3]],"},{"line_number":107,"context_line":"                      \"memory_mb\": 1024,"},{"line_number":108,"context_line":"                      \"pagesize_mb\": 4096,"},{"line_number":109,"context_line":"                      \"sockets\": 0,"}],"source_content_type":"text/x-rst","patch_set":20,"id":"dfd5e7cf_c4d9a983","line":106,"range":{"start_line":105,"start_character":21,"end_line":106,"end_character":48},"in_reply_to":"dfd5e7cf_7e02d3b6","updated":"2019-01-08 23:24:05.000000000","message":"yes, it is.","commit_id":"311b94eeae4bed5eb53b89a95273fb960eff312c"},{"author":{"_account_id":7,"name":"Jay Pipes","email":"jaypipes@gmail.com","username":"jaypipes"},"change_message_id":"dceadb8cdcdbc4d1d12e9d27741791fa025a4649","unresolved":false,"context_lines":[{"line_number":105,"context_line":"                      \"cpuset\": [0,1,2,3],"},{"line_number":106,"context_line":"                      \"siblings\": [[0,1],[2,3]],"},{"line_number":107,"context_line":"                      \"memory_mb\": 1024,"},{"line_number":108,"context_line":"                      \"pagesize_mb\": 4096,"},{"line_number":109,"context_line":"                      \"sockets\": 0,"},{"line_number":110,"context_line":"                      \"cores\": 2,"},{"line_number":111,"context_line":"                      \"threads\": 2"}],"source_content_type":"text/x-rst","patch_set":20,"id":"dfd5e7cf_bb27ed12","line":108,"range":{"start_line":108,"start_character":22,"end_line":108,"end_character":42},"updated":"2019-01-08 17:15:02.000000000","message":"this particular attribute never really made sense to me. The thing that would be useful to show would be the number of hugepages of a particular size that have been dedicated/reserved for this guest instance on this NUMA node. So, something more like this:\n\n \"memory_pages\": [\n   {\n     \"size_kb\": 2,\n     \"total\": 1000\n   },\n   {\n     \"size_kb\": 4096,\n     \"total\": 10\n   },\n ]","commit_id":"311b94eeae4bed5eb53b89a95273fb960eff312c"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"2c10661781279e30997cccdaf6cb4633fdaf9342","unresolved":false,"context_lines":[{"line_number":105,"context_line":"                      \"cpuset\": [0,1,2,3],"},{"line_number":106,"context_line":"                      \"siblings\": [[0,1],[2,3]],"},{"line_number":107,"context_line":"                      \"memory_mb\": 1024,"},{"line_number":108,"context_line":"                      \"pagesize_mb\": 4096,"},{"line_number":109,"context_line":"                      \"sockets\": 0,"},{"line_number":110,"context_line":"                      \"cores\": 2,"},{"line_number":111,"context_line":"                      \"threads\": 2"}],"source_content_type":"text/x-rst","patch_set":20,"id":"dfd5e7cf_be3b5bcf","line":108,"range":{"start_line":108,"start_character":22,"end_line":108,"end_character":42},"in_reply_to":"dfd5e7cf_bb27ed12","updated":"2019-01-08 17:46:21.000000000","message":"the pagesieze ins not specsified in MBs its in KBs\n\nso hw:mem_page_size\u003d4 specify that the guest should use 4k pages which are the default on x86 for the linux kernel.\n\nlibvirt support a guest with multiple page sizes but nova does not so all guest memory will have a singel page size.\n\nour unit tests assert that we are able to generate configs for multiple pages sizes but there is no code or way to request that when booting an instance.\n\nif we wanted to future proof incase we allow mixed page sizes in the futrue then \n\n \"memory_pages\": [\n   {\n     \"size_kb\": 4,\n     \"total\": 1000\n   },\n   {\n     \"size_kb\": 2048,\n     \"total\": 10\n   },\n ]\n\nwould make sense but if we jsut wanted to support want can be used today then we shoudl change pagesize_mb -\u003e pagesize_kb\n\nthe other thing to mention is the flaover support this value being set to  a number in kilobytes, or a number with a unit sufix e.g. 1G or sentenal values smnall.large,any.\n\nas such while this value should report the memory size the guest is actully backed with it may not match the format that it was specified in the flaovr and we shoudl docuemnt that so that consumers of this info are not confused.\n\nthis should also be and  admin only field in the response as it is host specific.","commit_id":"311b94eeae4bed5eb53b89a95273fb960eff312c"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"07703de968b96bad9d96eacd607e4f8c5d1ceaa7","unresolved":false,"context_lines":[{"line_number":105,"context_line":"                      \"cpuset\": [0,1,2,3],"},{"line_number":106,"context_line":"                      \"siblings\": [[0,1],[2,3]],"},{"line_number":107,"context_line":"                      \"memory_mb\": 1024,"},{"line_number":108,"context_line":"                      \"pagesize_mb\": 4096,"},{"line_number":109,"context_line":"                      \"sockets\": 0,"},{"line_number":110,"context_line":"                      \"cores\": 2,"},{"line_number":111,"context_line":"                      \"threads\": 2"}],"source_content_type":"text/x-rst","patch_set":20,"id":"dfd5e7cf_906a007e","line":108,"range":{"start_line":108,"start_character":22,"end_line":108,"end_character":42},"in_reply_to":"dfd5e7cf_be3b5bcf","updated":"2019-01-08 22:40:21.000000000","message":"change to \u0027kb\u0027, thanks.","commit_id":"311b94eeae4bed5eb53b89a95273fb960eff312c"},{"author":{"_account_id":7,"name":"Jay Pipes","email":"jaypipes@gmail.com","username":"jaypipes"},"change_message_id":"dceadb8cdcdbc4d1d12e9d27741791fa025a4649","unresolved":false,"context_lines":[{"line_number":113,"context_line":"                    ..."},{"line_number":114,"context_line":"                   ] # cells"},{"line_number":115,"context_line":""},{"line_number":116,"context_line":"         \"emulator_threads_policy\": \"share\","},{"line_number":117,"context_line":""},{"line_number":118,"context_line":"    }"},{"line_number":119,"context_line":""}],"source_content_type":"text/x-rst","patch_set":20,"id":"dfd5e7cf_9b4c69c8","line":116,"range":{"start_line":116,"start_character":0,"end_line":116,"end_character":44},"updated":"2019-01-08 17:15:02.000000000","message":"frankly, I believe this should NOT be returned. The reason is because this is both virt-driver-specific (libvirt only) and really is an internal implementation detail and something that we probably will change over the next few releases (because, again, it\u0027s more of an internal implementation detail than something that is concrete in the API representation of an instance).","commit_id":"311b94eeae4bed5eb53b89a95273fb960eff312c"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"07703de968b96bad9d96eacd607e4f8c5d1ceaa7","unresolved":false,"context_lines":[{"line_number":113,"context_line":"                    ..."},{"line_number":114,"context_line":"                   ] # cells"},{"line_number":115,"context_line":""},{"line_number":116,"context_line":"         \"emulator_threads_policy\": \"share\","},{"line_number":117,"context_line":""},{"line_number":118,"context_line":"    }"},{"line_number":119,"context_line":""}],"source_content_type":"text/x-rst","patch_set":20,"id":"dfd5e7cf_f00eece3","line":116,"range":{"start_line":116,"start_character":0,"end_line":116,"end_character":44},"in_reply_to":"dfd5e7cf_9b4c69c8","updated":"2019-01-08 22:40:21.000000000","message":"Done","commit_id":"311b94eeae4bed5eb53b89a95273fb960eff312c"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"2c10661781279e30997cccdaf6cb4633fdaf9342","unresolved":false,"context_lines":[{"line_number":113,"context_line":"                    ..."},{"line_number":114,"context_line":"                   ] # cells"},{"line_number":115,"context_line":""},{"line_number":116,"context_line":"         \"emulator_threads_policy\": \"share\","},{"line_number":117,"context_line":""},{"line_number":118,"context_line":"    }"},{"line_number":119,"context_line":""}],"source_content_type":"text/x-rst","patch_set":20,"id":"dfd5e7cf_9e51b7db","line":116,"range":{"start_line":116,"start_character":0,"end_line":116,"end_character":44},"in_reply_to":"dfd5e7cf_9b4c69c8","updated":"2019-01-08 17:46:21.000000000","message":"well this api is ment to help operator debug things.\n\ni see it similarly to the diagnostics api in that it perhapse should allow driver specific info. that said its a valid point about this being libvirt specific.","commit_id":"311b94eeae4bed5eb53b89a95273fb960eff312c"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"2c10661781279e30997cccdaf6cb4633fdaf9342","unresolved":false,"context_lines":[{"line_number":126,"context_line":""},{"line_number":127,"context_line":"* Add new ``topology`` policy, admin only by default:"},{"line_number":128,"context_line":""},{"line_number":129,"context_line":"server_topology_policies \u003d ["},{"line_number":130,"context_line":"    policy.DocumentedRuleDefault("},{"line_number":131,"context_line":"        BASE_POLICY_NAME,"},{"line_number":132,"context_line":"        base.RULE_ADMIN_API,"},{"line_number":133,"context_line":"        \"Show the topology data for a server\","},{"line_number":134,"context_line":"        ["},{"line_number":135,"context_line":"            {"},{"line_number":136,"context_line":"                \u0027method\u0027: \u0027GET\u0027,"},{"line_number":137,"context_line":"                \u0027path\u0027: \u0027/servers/{server_id}/topology\u0027"},{"line_number":138,"context_line":"            }"},{"line_number":139,"context_line":"        ]),"},{"line_number":140,"context_line":"]"},{"line_number":141,"context_line":""},{"line_number":142,"context_line":""},{"line_number":143,"context_line":"Notifications impact"}],"source_content_type":"text/x-rst","patch_set":20,"id":"dfd5e7cf_7e6df396","line":140,"range":{"start_line":129,"start_character":0,"end_line":140,"end_character":1},"updated":"2019-01-08 17:46:21.000000000","message":"as i said above i would like to see a more granular policy \nto allow admins to expose this api if they choose to guest without exposing the host specific fields.","commit_id":"311b94eeae4bed5eb53b89a95273fb960eff312c"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"536d7f10e331ccc876b7297699dd97e813b410bb","unresolved":false,"context_lines":[{"line_number":126,"context_line":""},{"line_number":127,"context_line":"* Add new ``topology`` policy, admin only by default:"},{"line_number":128,"context_line":""},{"line_number":129,"context_line":"server_topology_policies \u003d ["},{"line_number":130,"context_line":"    policy.DocumentedRuleDefault("},{"line_number":131,"context_line":"        BASE_POLICY_NAME,"},{"line_number":132,"context_line":"        base.RULE_ADMIN_API,"},{"line_number":133,"context_line":"        \"Show the topology data for a server\","},{"line_number":134,"context_line":"        ["},{"line_number":135,"context_line":"            {"},{"line_number":136,"context_line":"                \u0027method\u0027: \u0027GET\u0027,"},{"line_number":137,"context_line":"                \u0027path\u0027: \u0027/servers/{server_id}/topology\u0027"},{"line_number":138,"context_line":"            }"},{"line_number":139,"context_line":"        ]),"},{"line_number":140,"context_line":"]"},{"line_number":141,"context_line":""},{"line_number":142,"context_line":""},{"line_number":143,"context_line":"Notifications impact"}],"source_content_type":"text/x-rst","patch_set":20,"id":"dfd5e7cf_243755b3","line":140,"range":{"start_line":129,"start_character":0,"end_line":140,"end_character":1},"in_reply_to":"dfd5e7cf_7e6df396","updated":"2019-01-08 23:24:05.000000000","message":"Done","commit_id":"311b94eeae4bed5eb53b89a95273fb960eff312c"},{"author":{"_account_id":5754,"name":"Alex Xu","email":"hejie.xu@intel.com","username":"xuhj"},"change_message_id":"2b073dd2f886f799c1e7ad8d9ded68310c827481","unresolved":false,"context_lines":[{"line_number":106,"context_line":"                      \"cpu_pinning\": {0:5, 1:6},"},{"line_number":107,"context_line":"                      # 0:5 means vcpu 0 pinning to pcpu 5"},{"line_number":108,"context_line":"                      # control by policy TOPOLOGY % \u0027index:host_info\u0027"},{"line_number":109,"context_line":"                      \"cpu_thread_policy\": \"prefer\","},{"line_number":110,"context_line":"                      \"cpuset\": [0,1,2,3],"},{"line_number":111,"context_line":"                      \"siblings\": [[0,1],[2,3]],"},{"line_number":112,"context_line":"                      \"memory_mb\": 1024,"}],"source_content_type":"text/x-rst","patch_set":22,"id":"dfd5e7cf_123fea25","line":109,"range":{"start_line":109,"start_character":22,"end_line":109,"end_character":52},"updated":"2019-01-09 12:16:23.000000000","message":"I agree with Sean, we should put this to the same level with \u0027nodes\u0027 field. We can\u0027t set thread policy for each node. I remember I raise this problem in the previous version...\n\nAnd I don\u0027t think this is libvirt specific.","commit_id":"70695fad950e6a3c94ace9e7ea5a0fa2546dd8e8"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"ca608d459e189b328b3ec6f269a4d39c701d2b2a","unresolved":false,"context_lines":[{"line_number":106,"context_line":"                      \"cpu_pinning\": {0:5, 1:6},"},{"line_number":107,"context_line":"                      # 0:5 means vcpu 0 pinning to pcpu 5"},{"line_number":108,"context_line":"                      # control by policy TOPOLOGY % \u0027index:host_info\u0027"},{"line_number":109,"context_line":"                      \"cpu_thread_policy\": \"prefer\","},{"line_number":110,"context_line":"                      \"cpuset\": [0,1,2,3],"},{"line_number":111,"context_line":"                      \"siblings\": [[0,1],[2,3]],"},{"line_number":112,"context_line":"                      \"memory_mb\": 1024,"}],"source_content_type":"text/x-rst","patch_set":22,"id":"dfd5e7cf_c3d67228","line":109,"range":{"start_line":109,"start_character":22,"end_line":109,"end_character":52},"in_reply_to":"dfd5e7cf_123fea25","updated":"2019-01-09 14:23:53.000000000","message":"Done","commit_id":"70695fad950e6a3c94ace9e7ea5a0fa2546dd8e8"},{"author":{"_account_id":5754,"name":"Alex Xu","email":"hejie.xu@intel.com","username":"xuhj"},"change_message_id":"2b073dd2f886f799c1e7ad8d9ded68310c827481","unresolved":false,"context_lines":[{"line_number":111,"context_line":"                      \"siblings\": [[0,1],[2,3]],"},{"line_number":112,"context_line":"                      \"memory_mb\": 1024,"},{"line_number":113,"context_line":"                      \"pagesize_kb\": 4096,"},{"line_number":114,"context_line":"                      \"sockets\": 0,"},{"line_number":115,"context_line":"                      \"cores\": 2,"},{"line_number":116,"context_line":"                      \"threads\": 2"},{"line_number":117,"context_line":"                      # one core has at least one thread"}],"source_content_type":"text/x-rst","patch_set":22,"id":"dfd5e7cf_f2990679","line":114,"range":{"start_line":114,"start_character":33,"end_line":114,"end_character":34},"updated":"2019-01-09 12:16:23.000000000","message":"this can\u0027t be the zero, right? This is the number of sockets, it is the id of socket.","commit_id":"70695fad950e6a3c94ace9e7ea5a0fa2546dd8e8"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"ca608d459e189b328b3ec6f269a4d39c701d2b2a","unresolved":false,"context_lines":[{"line_number":111,"context_line":"                      \"siblings\": [[0,1],[2,3]],"},{"line_number":112,"context_line":"                      \"memory_mb\": 1024,"},{"line_number":113,"context_line":"                      \"pagesize_kb\": 4096,"},{"line_number":114,"context_line":"                      \"sockets\": 0,"},{"line_number":115,"context_line":"                      \"cores\": 2,"},{"line_number":116,"context_line":"                      \"threads\": 2"},{"line_number":117,"context_line":"                      # one core has at least one thread"}],"source_content_type":"text/x-rst","patch_set":22,"id":"dfd5e7cf_e3f056cc","line":114,"range":{"start_line":114,"start_character":33,"end_line":114,"end_character":34},"in_reply_to":"dfd5e7cf_d207221c","updated":"2019-01-09 14:23:53.000000000","message":"Done","commit_id":"70695fad950e6a3c94ace9e7ea5a0fa2546dd8e8"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"ca608d459e189b328b3ec6f269a4d39c701d2b2a","unresolved":false,"context_lines":[{"line_number":111,"context_line":"                      \"siblings\": [[0,1],[2,3]],"},{"line_number":112,"context_line":"                      \"memory_mb\": 1024,"},{"line_number":113,"context_line":"                      \"pagesize_kb\": 4096,"},{"line_number":114,"context_line":"                      \"sockets\": 0,"},{"line_number":115,"context_line":"                      \"cores\": 2,"},{"line_number":116,"context_line":"                      \"threads\": 2"},{"line_number":117,"context_line":"                      # one core has at least one thread"}],"source_content_type":"text/x-rst","patch_set":22,"id":"dfd5e7cf_43e28203","line":114,"range":{"start_line":114,"start_character":33,"end_line":114,"end_character":34},"in_reply_to":"dfd5e7cf_f2990679","updated":"2019-01-09 14:23:53.000000000","message":"Done","commit_id":"70695fad950e6a3c94ace9e7ea5a0fa2546dd8e8"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"c59128a93d9dcd7c687791689161560e6a7a2b18","unresolved":false,"context_lines":[{"line_number":111,"context_line":"                      \"siblings\": [[0,1],[2,3]],"},{"line_number":112,"context_line":"                      \"memory_mb\": 1024,"},{"line_number":113,"context_line":"                      \"pagesize_kb\": 4096,"},{"line_number":114,"context_line":"                      \"sockets\": 0,"},{"line_number":115,"context_line":"                      \"cores\": 2,"},{"line_number":116,"context_line":"                      \"threads\": 2"},{"line_number":117,"context_line":"                      # one core has at least one thread"}],"source_content_type":"text/x-rst","patch_set":22,"id":"dfd5e7cf_d207221c","line":114,"range":{"start_line":114,"start_character":33,"end_line":114,"end_character":34},"in_reply_to":"dfd5e7cf_f2990679","updated":"2019-01-09 12:26:06.000000000","message":"if it the the number of sockets then it will aways be 1 or grater\n\nif it the socket id then the field shoudl be \"socket\" singual not sockets plural which implies this is a count of the sockets.","commit_id":"70695fad950e6a3c94ace9e7ea5a0fa2546dd8e8"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"cb8ea15b4b5e84c68450d6b005c596c42c261897","unresolved":false,"context_lines":[{"line_number":94,"context_line":""},{"line_number":95,"context_line":"The returned information for NUMA topology:"},{"line_number":96,"context_line":""},{"line_number":97,"context_line":".. code-block:: javascript"},{"line_number":98,"context_line":""},{"line_number":99,"context_line":"   {"},{"line_number":100,"context_line":"         # overall policy: TOPOLOGY % \u0027index"}],"source_content_type":"text/x-rst","patch_set":23,"id":"dfd5e7cf_433a8234","line":97,"range":{"start_line":97,"start_character":16,"end_line":97,"end_character":26},"updated":"2019-01-09 14:26:43.000000000","message":"nit: i think this should technically be json but javascipt renders correctly so its fine.","commit_id":"ea3e8ba1cbcb006623714f9b6dbc8241f1ada973"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"b1e13eb395e16b70de13506f023c2dc225f7fd74","unresolved":false,"context_lines":[{"line_number":94,"context_line":""},{"line_number":95,"context_line":"The returned information for NUMA topology:"},{"line_number":96,"context_line":""},{"line_number":97,"context_line":".. code-block:: javascript"},{"line_number":98,"context_line":""},{"line_number":99,"context_line":"   {"},{"line_number":100,"context_line":"         # overall policy: TOPOLOGY % \u0027index"}],"source_content_type":"text/x-rst","patch_set":23,"id":"dfd5e7cf_a3632e1a","line":97,"range":{"start_line":97,"start_character":16,"end_line":97,"end_character":26},"in_reply_to":"dfd5e7cf_433a8234","updated":"2019-01-09 14:44:07.000000000","message":"Done","commit_id":"ea3e8ba1cbcb006623714f9b6dbc8241f1ada973"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"cb8ea15b4b5e84c68450d6b005c596c42c261897","unresolved":false,"context_lines":[{"line_number":118,"context_line":"                    ..."},{"line_number":119,"context_line":"                   ], # nodes"},{"line_number":120,"context_line":""},{"line_number":121,"context_line":"\t\"cpu_thread_policy\": \"prefer\""},{"line_number":122,"context_line":""},{"line_number":123,"context_line":"    }"},{"line_number":124,"context_line":""}],"source_content_type":"text/x-rst","patch_set":23,"id":"dfd5e7cf_43f5a282","line":121,"range":{"start_line":121,"start_character":0,"end_line":121,"end_character":1},"updated":"2019-01-09 14:26:43.000000000","message":"nit: tab","commit_id":"ea3e8ba1cbcb006623714f9b6dbc8241f1ada973"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"b1e13eb395e16b70de13506f023c2dc225f7fd74","unresolved":false,"context_lines":[{"line_number":118,"context_line":"                    ..."},{"line_number":119,"context_line":"                   ], # nodes"},{"line_number":120,"context_line":""},{"line_number":121,"context_line":"\t\"cpu_thread_policy\": \"prefer\""},{"line_number":122,"context_line":""},{"line_number":123,"context_line":"    }"},{"line_number":124,"context_line":""}],"source_content_type":"text/x-rst","patch_set":23,"id":"dfd5e7cf_43ada22f","line":121,"range":{"start_line":121,"start_character":0,"end_line":121,"end_character":1},"in_reply_to":"dfd5e7cf_43f5a282","updated":"2019-01-09 14:44:07.000000000","message":"Done","commit_id":"ea3e8ba1cbcb006623714f9b6dbc8241f1ada973"},{"author":{"_account_id":7,"name":"Jay Pipes","email":"jaypipes@gmail.com","username":"jaypipes"},"change_message_id":"55d66fac296dc702619986f5e137bb7d2f76c8ff","unresolved":false,"context_lines":[{"line_number":101,"context_line":"         \"nodes\":["},{"line_number":102,"context_line":"                    {"},{"line_number":103,"context_line":"                      \"host_numa_node\": 3,"},{"line_number":104,"context_line":"                      # Host Numa Node"},{"line_number":105,"context_line":"                      # control by policy TOPOLOGY % \u0027index:host_info\u0027"},{"line_number":106,"context_line":"                      \"cpu_pinning\": {0:5, 1:6},"},{"line_number":107,"context_line":"                      # 0:5 means vcpu 0 pinning to pcpu 5"},{"line_number":108,"context_line":"                      # control by policy TOPOLOGY % \u0027index:host_info\u0027"}],"source_content_type":"text/x-rst","patch_set":24,"id":"dfd5e7cf_084b32b0","line":105,"range":{"start_line":104,"start_character":22,"end_line":105,"end_character":70},"updated":"2019-01-09 18:50:22.000000000","message":"please place this above the \"host_numa_node\": 3 line...","commit_id":"c4307f14b54f338d94ee13b0250a03a1c42be688"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"ea231c5b4675f3a3524ffea48e6572496c091a15","unresolved":false,"context_lines":[{"line_number":101,"context_line":"         \"nodes\":["},{"line_number":102,"context_line":"                    {"},{"line_number":103,"context_line":"                      \"host_numa_node\": 3,"},{"line_number":104,"context_line":"                      # Host Numa Node"},{"line_number":105,"context_line":"                      # control by policy TOPOLOGY % \u0027index:host_info\u0027"},{"line_number":106,"context_line":"                      \"cpu_pinning\": {0:5, 1:6},"},{"line_number":107,"context_line":"                      # 0:5 means vcpu 0 pinning to pcpu 5"},{"line_number":108,"context_line":"                      # control by policy TOPOLOGY % \u0027index:host_info\u0027"}],"source_content_type":"text/x-rst","patch_set":24,"id":"dfd5e7cf_5a8fbb22","line":105,"range":{"start_line":104,"start_character":22,"end_line":105,"end_character":70},"in_reply_to":"dfd5e7cf_084b32b0","updated":"2019-01-09 22:42:50.000000000","message":"Done","commit_id":"c4307f14b54f338d94ee13b0250a03a1c42be688"},{"author":{"_account_id":7,"name":"Jay Pipes","email":"jaypipes@gmail.com","username":"jaypipes"},"change_message_id":"55d66fac296dc702619986f5e137bb7d2f76c8ff","unresolved":false,"context_lines":[{"line_number":103,"context_line":"                      \"host_numa_node\": 3,"},{"line_number":104,"context_line":"                      # Host Numa Node"},{"line_number":105,"context_line":"                      # control by policy TOPOLOGY % \u0027index:host_info\u0027"},{"line_number":106,"context_line":"                      \"cpu_pinning\": {0:5, 1:6},"},{"line_number":107,"context_line":"                      # 0:5 means vcpu 0 pinning to pcpu 5"},{"line_number":108,"context_line":"                      # control by policy TOPOLOGY % \u0027index:host_info\u0027"},{"line_number":109,"context_line":"                      \"cpuset\": [0,1,2,3],"}],"source_content_type":"text/x-rst","patch_set":24,"id":"dfd5e7cf_48d61ac6","line":106,"range":{"start_line":106,"start_character":22,"end_line":106,"end_character":35},"updated":"2019-01-09 18:50:22.000000000","message":"\"cpu_pinning\" is fine since it matches the (terribly-named) field in the InstanceNUMATopology.\n\nWe could also go with a better name for this information. Something like \"vcpu_to_pcpu_map\" would be more descriptive.","commit_id":"c4307f14b54f338d94ee13b0250a03a1c42be688"},{"author":{"_account_id":5754,"name":"Alex Xu","email":"hejie.xu@intel.com","username":"xuhj"},"change_message_id":"a9dfd5773809af34440e4b3694521f27465b86e3","unresolved":false,"context_lines":[{"line_number":103,"context_line":"                      \"host_numa_node\": 3,"},{"line_number":104,"context_line":"                      # Host Numa Node"},{"line_number":105,"context_line":"                      # control by policy TOPOLOGY % \u0027index:host_info\u0027"},{"line_number":106,"context_line":"                      \"cpu_pinning\": {0:5, 1:6},"},{"line_number":107,"context_line":"                      # 0:5 means vcpu 0 pinning to pcpu 5"},{"line_number":108,"context_line":"                      # control by policy TOPOLOGY % \u0027index:host_info\u0027"},{"line_number":109,"context_line":"                      \"cpuset\": [0,1,2,3],"}],"source_content_type":"text/x-rst","patch_set":24,"id":"dfd5e7cf_9d4f5dbc","line":106,"range":{"start_line":106,"start_character":22,"end_line":106,"end_character":35},"in_reply_to":"dfd5e7cf_48d61ac6","updated":"2019-01-10 00:17:29.000000000","message":"I\u0027m thinking, if we don\u0027t have cpu pinning, then we just pinning the vcpu to the all pcpus in a numa node. That that time, we don\u0027t show it in this field. So called it as vcpu_to_pcpu_map is not exactly the meaning.","commit_id":"c4307f14b54f338d94ee13b0250a03a1c42be688"},{"author":{"_account_id":7,"name":"Jay Pipes","email":"jaypipes@gmail.com","username":"jaypipes"},"change_message_id":"55d66fac296dc702619986f5e137bb7d2f76c8ff","unresolved":false,"context_lines":[{"line_number":104,"context_line":"                      # Host Numa Node"},{"line_number":105,"context_line":"                      # control by policy TOPOLOGY % \u0027index:host_info\u0027"},{"line_number":106,"context_line":"                      \"cpu_pinning\": {0:5, 1:6},"},{"line_number":107,"context_line":"                      # 0:5 means vcpu 0 pinning to pcpu 5"},{"line_number":108,"context_line":"                      # control by policy TOPOLOGY % \u0027index:host_info\u0027"},{"line_number":109,"context_line":"                      \"cpuset\": [0,1,2,3],"},{"line_number":110,"context_line":"                      \"siblings\": [[0,1],[2,3]],"},{"line_number":111,"context_line":"                      \"memory_mb\": 1024,"}],"source_content_type":"text/x-rst","patch_set":24,"id":"dfd5e7cf_08e01296","line":108,"range":{"start_line":107,"start_character":0,"end_line":108,"end_character":70},"updated":"2019-01-09 18:50:22.000000000","message":"please move above the \"cpu_pinning\": {0:5, 1:6}, line...","commit_id":"c4307f14b54f338d94ee13b0250a03a1c42be688"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"ea231c5b4675f3a3524ffea48e6572496c091a15","unresolved":false,"context_lines":[{"line_number":104,"context_line":"                      # Host Numa Node"},{"line_number":105,"context_line":"                      # control by policy TOPOLOGY % \u0027index:host_info\u0027"},{"line_number":106,"context_line":"                      \"cpu_pinning\": {0:5, 1:6},"},{"line_number":107,"context_line":"                      # 0:5 means vcpu 0 pinning to pcpu 5"},{"line_number":108,"context_line":"                      # control by policy TOPOLOGY % \u0027index:host_info\u0027"},{"line_number":109,"context_line":"                      \"cpuset\": [0,1,2,3],"},{"line_number":110,"context_line":"                      \"siblings\": [[0,1],[2,3]],"},{"line_number":111,"context_line":"                      \"memory_mb\": 1024,"}],"source_content_type":"text/x-rst","patch_set":24,"id":"dfd5e7cf_3ab517ce","line":108,"range":{"start_line":107,"start_character":0,"end_line":108,"end_character":70},"in_reply_to":"dfd5e7cf_08e01296","updated":"2019-01-09 22:42:50.000000000","message":"Done","commit_id":"c4307f14b54f338d94ee13b0250a03a1c42be688"},{"author":{"_account_id":7,"name":"Jay Pipes","email":"jaypipes@gmail.com","username":"jaypipes"},"change_message_id":"55d66fac296dc702619986f5e137bb7d2f76c8ff","unresolved":false,"context_lines":[{"line_number":106,"context_line":"                      \"cpu_pinning\": {0:5, 1:6},"},{"line_number":107,"context_line":"                      # 0:5 means vcpu 0 pinning to pcpu 5"},{"line_number":108,"context_line":"                      # control by policy TOPOLOGY % \u0027index:host_info\u0027"},{"line_number":109,"context_line":"                      \"cpuset\": [0,1,2,3],"},{"line_number":110,"context_line":"                      \"siblings\": [[0,1],[2,3]],"},{"line_number":111,"context_line":"                      \"memory_mb\": 1024,"},{"line_number":112,"context_line":"                      \"pagesize_kb\": 4096,"}],"source_content_type":"text/x-rst","patch_set":24,"id":"dfd5e7cf_08a7b251","line":109,"range":{"start_line":109,"start_character":23,"end_line":109,"end_character":29},"updated":"2019-01-09 18:50:22.000000000","message":"this is another terribly-named attribute that is taken pretty-much verbatim from sysfs on Linux... would be great to call this \"vcpu_ids\" or \"vcpu_set\" since it\u0027s frankly confusing because it refers to the *vCPU* processor IDs that are associated with this guest NUMA cell, not the host logical processor IDs (you need to get that by looking at the cpu_pinning map.\n\nThis is one of the reasons I objected to just exposing the internal InstanceNUMATopology attributes/structure so directly through the public API. :(","commit_id":"c4307f14b54f338d94ee13b0250a03a1c42be688"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"ea231c5b4675f3a3524ffea48e6572496c091a15","unresolved":false,"context_lines":[{"line_number":106,"context_line":"                      \"cpu_pinning\": {0:5, 1:6},"},{"line_number":107,"context_line":"                      # 0:5 means vcpu 0 pinning to pcpu 5"},{"line_number":108,"context_line":"                      # control by policy TOPOLOGY % \u0027index:host_info\u0027"},{"line_number":109,"context_line":"                      \"cpuset\": [0,1,2,3],"},{"line_number":110,"context_line":"                      \"siblings\": [[0,1],[2,3]],"},{"line_number":111,"context_line":"                      \"memory_mb\": 1024,"},{"line_number":112,"context_line":"                      \"pagesize_kb\": 4096,"}],"source_content_type":"text/x-rst","patch_set":24,"id":"dfd5e7cf_7ae07fcd","line":109,"range":{"start_line":109,"start_character":23,"end_line":109,"end_character":29},"in_reply_to":"dfd5e7cf_08a7b251","updated":"2019-01-09 22:42:50.000000000","message":"Done","commit_id":"c4307f14b54f338d94ee13b0250a03a1c42be688"},{"author":{"_account_id":7,"name":"Jay Pipes","email":"jaypipes@gmail.com","username":"jaypipes"},"change_message_id":"55d66fac296dc702619986f5e137bb7d2f76c8ff","unresolved":false,"context_lines":[{"line_number":110,"context_line":"                      \"siblings\": [[0,1],[2,3]],"},{"line_number":111,"context_line":"                      \"memory_mb\": 1024,"},{"line_number":112,"context_line":"                      \"pagesize_kb\": 4096,"},{"line_number":113,"context_line":"                      \"socket\": 1,"},{"line_number":114,"context_line":"                      \"cores\": 2,"},{"line_number":115,"context_line":"                      \"threads\": 2"},{"line_number":116,"context_line":"                      # one core has at least one thread"}],"source_content_type":"text/x-rst","patch_set":24,"id":"dfd5e7cf_88ede28c","line":113,"range":{"start_line":113,"start_character":23,"end_line":113,"end_character":29},"updated":"2019-01-09 18:50:22.000000000","message":"should be \"sockets\"","commit_id":"c4307f14b54f338d94ee13b0250a03a1c42be688"},{"author":{"_account_id":7543,"name":"Yongli He","email":"yongli.he@intel.com","username":"yongli.he"},"change_message_id":"ea231c5b4675f3a3524ffea48e6572496c091a15","unresolved":false,"context_lines":[{"line_number":110,"context_line":"                      \"siblings\": [[0,1],[2,3]],"},{"line_number":111,"context_line":"                      \"memory_mb\": 1024,"},{"line_number":112,"context_line":"                      \"pagesize_kb\": 4096,"},{"line_number":113,"context_line":"                      \"socket\": 1,"},{"line_number":114,"context_line":"                      \"cores\": 2,"},{"line_number":115,"context_line":"                      \"threads\": 2"},{"line_number":116,"context_line":"                      # one core has at least one thread"}],"source_content_type":"text/x-rst","patch_set":24,"id":"dfd5e7cf_9ada0315","line":113,"range":{"start_line":113,"start_character":23,"end_line":113,"end_character":29},"in_reply_to":"dfd5e7cf_88ede28c","updated":"2019-01-09 22:42:50.000000000","message":"Done","commit_id":"c4307f14b54f338d94ee13b0250a03a1c42be688"},{"author":{"_account_id":7634,"name":"Takashi Natsume","email":"takanattie@gmail.com","username":"natsumet"},"change_message_id":"f83cf26d85fa0935bc619c6f4cc3ab128c59a6c0","unresolved":false,"context_lines":[{"line_number":132,"context_line":""},{"line_number":133,"context_line":"* Add new ``topology`` policy, admin only by default:"},{"line_number":134,"context_line":""},{"line_number":135,"context_line":"TOPOLOGY \u003d \u0027os_compute_api:servers:topology:%s\u0027"},{"line_number":136,"context_line":""},{"line_number":137,"context_line":"server_topology_policies \u003d ["},{"line_number":138,"context_line":"    policy.DocumentedRuleDefault("},{"line_number":139,"context_line":"        BASE_POLICY_NAME,"},{"line_number":140,"context_line":"        base.RULE_ADMIN_API,"},{"line_number":141,"context_line":"        \"Show the topology data for a server\","},{"line_number":142,"context_line":"        ["},{"line_number":143,"context_line":"            {"},{"line_number":144,"context_line":"                \u0027method\u0027: \u0027GET\u0027,"},{"line_number":145,"context_line":"                \u0027path\u0027: \u0027/servers/{server_id}/topology\u0027"},{"line_number":146,"context_line":"            }"},{"line_number":147,"context_line":"        ]),"},{"line_number":148,"context_line":"    policy.DocumentedRuleDefault("},{"line_number":149,"context_line":"        # control host numa node and cpu pin information"},{"line_number":150,"context_line":"        TOPOLOGY % \u0027index:host_info\u0027,"},{"line_number":151,"context_line":"        base.RULE_ADMIN_API,"},{"line_number":152,"context_line":"        \"List all servers with detailed information\","},{"line_number":153,"context_line":"        ["},{"line_number":154,"context_line":"            {"},{"line_number":155,"context_line":"                \u0027method\u0027: \u0027GET\u0027,"},{"line_number":156,"context_line":"                \u0027path\u0027: \u0027/servers/{server_id}/topology\u0027"},{"line_number":157,"context_line":"            }"},{"line_number":158,"context_line":"        ]),"},{"line_number":159,"context_line":"]"},{"line_number":160,"context_line":""},{"line_number":161,"context_line":""},{"line_number":162,"context_line":"Notifications impact"}],"source_content_type":"text/x-rst","patch_set":25,"id":"dfd5e7cf_804ff290","line":159,"range":{"start_line":135,"start_character":0,"end_line":159,"end_character":1},"updated":"2019-01-10 02:04:54.000000000","message":"It should be in code-block.","commit_id":"19c32e4ee99c73b2d39b237fbf256846b84aebeb"},{"author":{"_account_id":7634,"name":"Takashi Natsume","email":"takanattie@gmail.com","username":"natsumet"},"change_message_id":"f83cf26d85fa0935bc619c6f4cc3ab128c59a6c0","unresolved":false,"context_lines":[{"line_number":216,"context_line":"\u003d\u003d\u003d\u003d\u003d\u003d\u003d"},{"line_number":217,"context_line":""},{"line_number":218,"context_line":"* Add functional api_sample tests."},{"line_number":219,"context_line":""},{"line_number":220,"context_line":"Documentation Impact"},{"line_number":221,"context_line":"\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d"},{"line_number":222,"context_line":""}],"source_content_type":"text/x-rst","patch_set":25,"id":"dfd5e7cf_c0541a24","line":219,"updated":"2019-01-10 02:04:54.000000000","message":"Tempest tests should be added.","commit_id":"19c32e4ee99c73b2d39b237fbf256846b84aebeb"}]}