)]}'
{"specs/victoria/approved/use-pcpu-vcpu-in-one-instance.rst":[{"author":{"_account_id":5754,"name":"Alex Xu","email":"hejie.xu@intel.com","username":"xuhj"},"change_message_id":"dc8f47486190f3e31a33cc68670f5f78abb54929","unresolved":false,"context_lines":[{"line_number":255,"context_line":"Data model impact"},{"line_number":256,"context_line":"-----------------"},{"line_number":257,"context_line":""},{"line_number":258,"context_line":"No change to data objects."},{"line_number":259,"context_line":""},{"line_number":260,"context_line":"..note::"},{"line_number":261,"context_line":"    The ``InstanceNUMACell.cpu_pinning`` field keeps the CPU pinning"}],"source_content_type":"text/x-rst","patch_set":1,"id":"1f493fa4_ffaac516","line":258,"updated":"2020-05-07 07:11:55.000000000","message":"we add pcpu field to the instance numa cell. so we better to mention that.\n\nAnd we will do the data migration.","commit_id":"93368221e8a93d6a6b5f0a352dd7d7481d08c4e0"},{"author":{"_account_id":30209,"name":"Huaqiang","email":"huaqiang.wang@intel.com","username":"Huaqiang.Wang"},"change_message_id":"8719d9446bd35259b33ffe951f6228646c4024c0","unresolved":false,"context_lines":[{"line_number":255,"context_line":"Data model impact"},{"line_number":256,"context_line":"-----------------"},{"line_number":257,"context_line":""},{"line_number":258,"context_line":"No change to data objects."},{"line_number":259,"context_line":""},{"line_number":260,"context_line":"..note::"},{"line_number":261,"context_line":"    The ``InstanceNUMACell.cpu_pinning`` field keeps the CPU pinning"}],"source_content_type":"text/x-rst","patch_set":1,"id":"1f493fa4_fa9db366","line":258,"in_reply_to":"1f493fa4_da16f749","updated":"2020-05-07 07:39:08.000000000","message":"\u003e @alex, you are right. We have added a \u0027pcpu\u0027 field in\n \u003e \u0027InstanceNUMACell\u0027 object in our implementation code. I\u0027ll add some\n \u003e words to reflect this change.\n\nmore precisely, we have added \u0027InstanceNUMACell.pcpuset\u0027 for the dedicated CPUs and the \u0027InstanceNUMACell.cpuset\u0027 is for shared CPUs only in the implementation for mixed instance spec of Ussiri.","commit_id":"93368221e8a93d6a6b5f0a352dd7d7481d08c4e0"},{"author":{"_account_id":30209,"name":"Huaqiang","email":"huaqiang.wang@intel.com","username":"Huaqiang.Wang"},"change_message_id":"dfc0e855d0e88e10b66e03afb825117ff111813f","unresolved":false,"context_lines":[{"line_number":255,"context_line":"Data model impact"},{"line_number":256,"context_line":"-----------------"},{"line_number":257,"context_line":""},{"line_number":258,"context_line":"No change to data objects."},{"line_number":259,"context_line":""},{"line_number":260,"context_line":"..note::"},{"line_number":261,"context_line":"    The ``InstanceNUMACell.cpu_pinning`` field keeps the CPU pinning"}],"source_content_type":"text/x-rst","patch_set":1,"id":"1f493fa4_da16f749","line":258,"in_reply_to":"1f493fa4_ffaac516","updated":"2020-05-07 07:30:05.000000000","message":"@alex, you are right. We have added a \u0027pcpu\u0027 field in \u0027InstanceNUMACell\u0027 object in our implementation code. I\u0027ll add some words to reflect this change.","commit_id":"93368221e8a93d6a6b5f0a352dd7d7481d08c4e0"},{"author":{"_account_id":5754,"name":"Alex Xu","email":"hejie.xu@intel.com","username":"xuhj"},"change_message_id":"dc8f47486190f3e31a33cc68670f5f78abb54929","unresolved":false,"context_lines":[{"line_number":286,"context_line":"host CPUs."},{"line_number":287,"context_line":""},{"line_number":288,"context_line":"The new cpu policy ``mixed`` is added to extra spec ``hw:cpu_policy``."},{"line_number":289,"context_line":""},{"line_number":290,"context_line":"Security impact"},{"line_number":291,"context_line":"---------------"},{"line_number":292,"context_line":""}],"source_content_type":"text/x-rst","patch_set":1,"id":"1f493fa4_5f6f79fb","line":289,"updated":"2020-05-07 07:11:55.000000000","message":"maybe also mention \u0027hw:cpu_dedicated_mask\u0027 at here.","commit_id":"93368221e8a93d6a6b5f0a352dd7d7481d08c4e0"},{"author":{"_account_id":30209,"name":"Huaqiang","email":"huaqiang.wang@intel.com","username":"Huaqiang.Wang"},"change_message_id":"dfc0e855d0e88e10b66e03afb825117ff111813f","unresolved":false,"context_lines":[{"line_number":286,"context_line":"host CPUs."},{"line_number":287,"context_line":""},{"line_number":288,"context_line":"The new cpu policy ``mixed`` is added to extra spec ``hw:cpu_policy``."},{"line_number":289,"context_line":""},{"line_number":290,"context_line":"Security impact"},{"line_number":291,"context_line":"---------------"},{"line_number":292,"context_line":""}],"source_content_type":"text/x-rst","patch_set":1,"id":"1f493fa4_ba496b33","line":289,"in_reply_to":"1f493fa4_5f6f79fb","updated":"2020-05-07 07:30:05.000000000","message":"@Alex, Not catch your idea well. Do you mean the content of metadata `dedicated_cpus` should be fetched from `hw:cpu_dedicated_mask` (or `hw:cpu_realtime_mask` if it exists)?","commit_id":"93368221e8a93d6a6b5f0a352dd7d7481d08c4e0"}]}