)]}'
{"/PATCHSET_LEVEL":[{"author":{"_account_id":1004,"name":"Mohammed Naser","email":"mnaser@vexxhost.com","username":"mnaser"},"change_message_id":"2dcb1c875c0307c8b420963792ec66d130b6f80e","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":1,"id":"32336b29_5f9698ae","updated":"2022-05-03 13:58:59.000000000","message":"I\u0027ve added some reviews here","commit_id":"6c5b60af78c6b972cf3bcf4bc5984bee0ede0a01"},{"author":{"_account_id":1004,"name":"Mohammed Naser","email":"mnaser@vexxhost.com","username":"mnaser"},"change_message_id":"f1abc3f7360e386747e7634d729407fe5817d06f","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":2,"id":"928cc838_e92e8713","updated":"2022-05-03 20:33:48.000000000","message":"Thank you so much for the detailed review, Sean","commit_id":"1393468a04fed8b015e6538027fe1dee48c4da0a"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"44ac274aec0a341d775c7a6b7852794ac38bb5c9","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":2,"id":"01622aa0_ad3832bf","updated":"2022-05-03 20:27:06.000000000","message":"over all im supportive of this.\n\ni think we are leaking too much of the libvirt internal here via the api\n\ni would prefer to only expose the vioummy model and address width intially\nand enable the interupt remmaping, cache, iotlb and eim features allway  when approprate if\na vIOMMU  is requested unless someone explicitly asks for a way to disable them.\n\ni have rephased some of the content to make more like a typical spec but over all the content looks ok to me.\n\n","commit_id":"1393468a04fed8b015e6538027fe1dee48c4da0a"},{"author":{"_account_id":9708,"name":"Balazs Gibizer","display_name":"gibi","email":"gibizer@gmail.com","username":"gibi"},"change_message_id":"bc320227633aa0493feddd2c5729da26e5a2b294","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":5,"id":"e5f9d131_a5206692","updated":"2022-05-10 12:20:29.000000000","message":"I have one question about the memory locking inline.","commit_id":"28fce254ce7741d4c793f3d65dbe0ee54edba744"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"81dcc5509e2c5299ac43a379367de454b1e7297c","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":5,"id":"d90714d6_04400331","updated":"2022-05-10 13:12:06.000000000","message":"i think there are enough nits to justify a respin and there are some open questions so -1 for now\n","commit_id":"28fce254ce7741d4c793f3d65dbe0ee54edba744"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"b43c2365cf384f64a9152ab6d585f11efe039bc4","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":6,"id":"3db3d904_680f8a96","updated":"2022-05-13 10:11:48.000000000","message":"i think im happy with this over all now\ncan you make the last few edits for the extra spec names and ack the other comments if you\nagree with them regardign ci/history\n\nother then that i think this is ok to proceed.","commit_id":"d15a3299691e38101a29f3fa6a0736dca4a25dac"},{"author":{"_account_id":15334,"name":"Stephen Finucane","display_name":"stephenfin","email":"stephenfin@redhat.com","username":"sfinucan"},"change_message_id":"545018e9a3f11cf5f301354a8e9d7a74c09e7600","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":7,"id":"28326b1b_eb730516","updated":"2022-05-13 11:16:09.000000000","message":"I\u0027d like a lot more context on these options, since this seems to have expanded from a single, non-configurable feature to a highly configurable feature. If we\u0027re exposing knobs, I\u0027d like to know why these are necessary 😊","commit_id":"a73038faa3867aac2e9091a2b7a5017b5c860e10"},{"author":{"_account_id":15334,"name":"Stephen Finucane","display_name":"stephenfin","email":"stephenfin@redhat.com","username":"sfinucan"},"change_message_id":"b90f3fc3fa807053bcaa092b941c2a22c5a56357","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":9,"id":"4820b241_3ff627a1","updated":"2022-05-18 15:55:17.000000000","message":"@ricolin Can you mark comments as \"Addressed\" once they\u0027re addressed to clear up the comments, please 🙏","commit_id":"7addd23365353144b1c35c3117950798c1c908bc"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"6624110f013f467d68132a12dcc7b0f274d6325a","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":9,"id":"70f5ecd4_dcb52e5c","updated":"2022-05-18 13:57:19.000000000","message":"i still think this makes sense but i know stpehen had some open questoins.\n\nso +1 for now so they have time to review.","commit_id":"7addd23365353144b1c35c3117950798c1c908bc"},{"author":{"_account_id":12404,"name":"Rico Lin","email":"ricolin@ricolky.com","username":"rico.lin"},"change_message_id":"041e3cd9b2060b72b580c452ac7b08060b146f10","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":9,"id":"b58fb7f5_2a07f526","in_reply_to":"4820b241_3ff627a1","updated":"2022-05-24 07:18:15.000000000","message":"Okay, sure thing, but you mean \"Resolved\" right?","commit_id":"7addd23365353144b1c35c3117950798c1c908bc"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"82bb508a0801106edfdc03f3383643dbc1b31140","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":10,"id":"6f2a7540_bc3437fa","updated":"2022-05-24 07:49:00.000000000","message":"+1 pending stephend’s review ","commit_id":"5d4f1defda108228796b313b6ecb5208ef8dfd69"},{"author":{"_account_id":15334,"name":"Stephen Finucane","display_name":"stephenfin","email":"stephenfin@redhat.com","username":"sfinucan"},"change_message_id":"5869f04481e0e27b6d8985364af3a70cc5e8f8d9","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":10,"id":"cf83d394_d5886ba7","updated":"2022-05-25 15:40:11.000000000","message":"Almost there. If you can address Sean\u0027s comment and comment on the \u0027auto\u0027 idea, I think we\u0027re good to go","commit_id":"5d4f1defda108228796b313b6ecb5208ef8dfd69"},{"author":{"_account_id":15334,"name":"Stephen Finucane","display_name":"stephenfin","email":"stephenfin@redhat.com","username":"sfinucan"},"change_message_id":"30570546293ac60fd6c0e6fe5cdd87dfeea507c0","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":11,"id":"48c4206f_89a200dc","updated":"2022-05-30 10:51:36.000000000","message":"Same comments as Sean. Otherwise LGTM","commit_id":"381097010efd44f17e42dbb37dcbe47612005259"}],"specs/zed/approved/libvirt-viommu-device.rst":[{"author":{"_account_id":1004,"name":"Mohammed Naser","email":"mnaser@vexxhost.com","username":"mnaser"},"change_message_id":"2dcb1c875c0307c8b420963792ec66d130b6f80e","unresolved":true,"context_lines":[{"line_number":40,"context_line":""},{"line_number":41,"context_line":"* This spec proposes adding new guest configs for"},{"line_number":42,"context_line":"  IOMMU (`LibvirtConfigGuestIOMMU`) and"},{"line_number":43,"context_line":"  APIC feature (`LibvirtConfigGuestFeatureIOAPIC`)."},{"line_number":44,"context_line":""},{"line_number":45,"context_line":"* Add following attribute to image property and extra_spces:"},{"line_number":46,"context_line":""}],"source_content_type":"text/x-rst","patch_set":1,"id":"30eeb7fb_f26c6d88","line":43,"updated":"2022-05-03 13:58:59.000000000","message":"Another thing we need to do is add `\u003clocked/\u003e` to `\u003cmemoryBacking\u003e`.  The reason behind that is that when using vIOMMU, the MEMLOCK_RLIMIT will be hit, read more here:\n\nhttps://listman.redhat.com/archives/vfio-users/2018-July/msg00001.html\n\n\u003e I\u0027m guessing you\u0027re assigning multiple devices to the same VM, which\ndoesn\u0027t work well with a guest IOMMU currently.  The trouble is that\nwith a guest IOMMU, each assigned device has a separate address space\nthat is initially configured to map the full address space of the VM\nand each vfio container for each device is accounted separately.\nlibvirt will only set the locked memory limit to a value sufficient for\nlocking the memory once, whereas in this configuration we\u0027re locking it\nonce per assigned device.  Without a guest IOMMU, all devices run in\nthe same address space and therefore the same container, and we only\naccount the memory once for any number of devices.\n\nWe ran into this in our testing, by adding `\u003clocked/\u003e`, we\u0027re removing all of the limits (this is similar to how it was handled when SEV was implemented).","commit_id":"6c5b60af78c6b972cf3bcf4bc5984bee0ede0a01"},{"author":{"_account_id":12404,"name":"Rico Lin","email":"ricolin@ricolky.com","username":"rico.lin"},"change_message_id":"b655deaf274e005132625271586b3a4a3140de4c","unresolved":false,"context_lines":[{"line_number":40,"context_line":""},{"line_number":41,"context_line":"* This spec proposes adding new guest configs for"},{"line_number":42,"context_line":"  IOMMU (`LibvirtConfigGuestIOMMU`) and"},{"line_number":43,"context_line":"  APIC feature (`LibvirtConfigGuestFeatureIOAPIC`)."},{"line_number":44,"context_line":""},{"line_number":45,"context_line":"* Add following attribute to image property and extra_spces:"},{"line_number":46,"context_line":""}],"source_content_type":"text/x-rst","patch_set":1,"id":"9a8cce25_87658153","line":43,"in_reply_to":"30eeb7fb_f26c6d88","updated":"2022-05-03 18:10:18.000000000","message":"Done","commit_id":"6c5b60af78c6b972cf3bcf4bc5984bee0ede0a01"},{"author":{"_account_id":1004,"name":"Mohammed Naser","email":"mnaser@vexxhost.com","username":"mnaser"},"change_message_id":"2dcb1c875c0307c8b420963792ec66d130b6f80e","unresolved":true,"context_lines":[{"line_number":44,"context_line":""},{"line_number":45,"context_line":"* Add following attribute to image property and extra_spces:"},{"line_number":46,"context_line":""},{"line_number":47,"context_line":"  ** hw_viommu_modle: support values: none|intel|smmuv3|virtio"},{"line_number":48,"context_line":""},{"line_number":49,"context_line":"  ** hw_viommu_interrupt_remapping: boolean option, default to false"},{"line_number":50,"context_line":""}],"source_content_type":"text/x-rst","patch_set":1,"id":"1d3ee207_57ab98a9","line":47,"updated":"2022-05-03 13:58:59.000000000","message":"I think you mean `model` here, and I guess we should add a detail that the flavour property would be something like `hw:viommu_model` instead","commit_id":"6c5b60af78c6b972cf3bcf4bc5984bee0ede0a01"},{"author":{"_account_id":12404,"name":"Rico Lin","email":"ricolin@ricolky.com","username":"rico.lin"},"change_message_id":"b655deaf274e005132625271586b3a4a3140de4c","unresolved":false,"context_lines":[{"line_number":44,"context_line":""},{"line_number":45,"context_line":"* Add following attribute to image property and extra_spces:"},{"line_number":46,"context_line":""},{"line_number":47,"context_line":"  ** hw_viommu_modle: support values: none|intel|smmuv3|virtio"},{"line_number":48,"context_line":""},{"line_number":49,"context_line":"  ** hw_viommu_interrupt_remapping: boolean option, default to false"},{"line_number":50,"context_line":""}],"source_content_type":"text/x-rst","patch_set":1,"id":"52955f03_e5b09f63","line":47,"in_reply_to":"1d3ee207_57ab98a9","updated":"2022-05-03 18:10:18.000000000","message":"Done","commit_id":"6c5b60af78c6b972cf3bcf4bc5984bee0ede0a01"},{"author":{"_account_id":1004,"name":"Mohammed Naser","email":"mnaser@vexxhost.com","username":"mnaser"},"change_message_id":"2dcb1c875c0307c8b420963792ec66d130b6f80e","unresolved":true,"context_lines":[{"line_number":59,"context_line":"  These attributes are options for `LibvirtConfigGuestIOMMU`, More"},{"line_number":60,"context_line":"  information for them can be found in `libvirt format domain`_."},{"line_number":61,"context_line":""},{"line_number":62,"context_line":"* Add IOMMU config when generating guest config. And enable IOAPIC within."},{"line_number":63,"context_line":""},{"line_number":64,"context_line":".. _`libvirt format domain`: https://libvirt.org/formatdomain.html#iommu-devices"},{"line_number":65,"context_line":""}],"source_content_type":"text/x-rst","patch_set":1,"id":"ea27e9fe_929da55e","line":62,"updated":"2022-05-03 13:58:59.000000000","message":"Indeed, for context, enabling ioapic is needed to have a vIOMMU","commit_id":"6c5b60af78c6b972cf3bcf4bc5984bee0ede0a01"},{"author":{"_account_id":12404,"name":"Rico Lin","email":"ricolin@ricolky.com","username":"rico.lin"},"change_message_id":"b655deaf274e005132625271586b3a4a3140de4c","unresolved":false,"context_lines":[{"line_number":59,"context_line":"  These attributes are options for `LibvirtConfigGuestIOMMU`, More"},{"line_number":60,"context_line":"  information for them can be found in `libvirt format domain`_."},{"line_number":61,"context_line":""},{"line_number":62,"context_line":"* Add IOMMU config when generating guest config. And enable IOAPIC within."},{"line_number":63,"context_line":""},{"line_number":64,"context_line":".. _`libvirt format domain`: https://libvirt.org/formatdomain.html#iommu-devices"},{"line_number":65,"context_line":""}],"source_content_type":"text/x-rst","patch_set":1,"id":"74164580_6fd90dee","line":62,"in_reply_to":"ea27e9fe_929da55e","updated":"2022-05-03 18:10:18.000000000","message":"Ack","commit_id":"6c5b60af78c6b972cf3bcf4bc5984bee0ede0a01"},{"author":{"_account_id":1004,"name":"Mohammed Naser","email":"mnaser@vexxhost.com","username":"mnaser"},"change_message_id":"2dcb1c875c0307c8b420963792ec66d130b6f80e","unresolved":true,"context_lines":[{"line_number":147,"context_line":"\u003d\u003d\u003d\u003d\u003d\u003d\u003d"},{"line_number":148,"context_line":""},{"line_number":149,"context_line":"* Unit test for in patch."},{"line_number":150,"context_line":"* We can work on more advance test against real environment."},{"line_number":151,"context_line":"  Not that needed for this patch IMO but we still should provide certain level"},{"line_number":152,"context_line":"  of examine for extra guarantee."},{"line_number":153,"context_line":""}],"source_content_type":"text/x-rst","patch_set":1,"id":"1b48dc9c_047dfbe0","line":150,"updated":"2022-05-03 13:58:59.000000000","message":"We\u0027ve got an environment where we can test this on our side.  I know it\u0027s not really how we like to do testing but sadly I don\u0027t think there\u0027s a cleaner way of being able to test this.\n\nOr perhaps we can spin up a domain with vIOMMU, that probably would work just fine?  We\u0027d have to boot with a specific flag and check that IOMMU is working inside the system, but I think that starts to test a bit more than what we do.","commit_id":"6c5b60af78c6b972cf3bcf4bc5984bee0ede0a01"},{"author":{"_account_id":12404,"name":"Rico Lin","email":"ricolin@ricolky.com","username":"rico.lin"},"change_message_id":"81c37a04110c61cb8c8c937062b2d5651d29049e","unresolved":true,"context_lines":[{"line_number":147,"context_line":"\u003d\u003d\u003d\u003d\u003d\u003d\u003d"},{"line_number":148,"context_line":""},{"line_number":149,"context_line":"* Unit test for in patch."},{"line_number":150,"context_line":"* We can work on more advance test against real environment."},{"line_number":151,"context_line":"  Not that needed for this patch IMO but we still should provide certain level"},{"line_number":152,"context_line":"  of examine for extra guarantee."},{"line_number":153,"context_line":""}],"source_content_type":"text/x-rst","patch_set":1,"id":"f5dd49cb_b8e637ba","line":150,"in_reply_to":"1b48dc9c_047dfbe0","updated":"2022-05-03 18:10:48.000000000","message":"+1","commit_id":"6c5b60af78c6b972cf3bcf4bc5984bee0ede0a01"},{"author":{"_account_id":12404,"name":"Rico Lin","email":"ricolin@ricolky.com","username":"rico.lin"},"change_message_id":"53fecc273758c021520dc5e5fe5c955800861c94","unresolved":false,"context_lines":[{"line_number":147,"context_line":"\u003d\u003d\u003d\u003d\u003d\u003d\u003d"},{"line_number":148,"context_line":""},{"line_number":149,"context_line":"* Unit test for in patch."},{"line_number":150,"context_line":"* We can work on more advance test against real environment."},{"line_number":151,"context_line":"  Not that needed for this patch IMO but we still should provide certain level"},{"line_number":152,"context_line":"  of examine for extra guarantee."},{"line_number":153,"context_line":""}],"source_content_type":"text/x-rst","patch_set":1,"id":"09740d6d_d74a3ac3","line":150,"in_reply_to":"284604e8_15389ecf","updated":"2022-05-13 10:24:17.000000000","message":"Ack","commit_id":"6c5b60af78c6b972cf3bcf4bc5984bee0ede0a01"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"44ac274aec0a341d775c7a6b7852794ac38bb5c9","unresolved":true,"context_lines":[{"line_number":147,"context_line":"\u003d\u003d\u003d\u003d\u003d\u003d\u003d"},{"line_number":148,"context_line":""},{"line_number":149,"context_line":"* Unit test for in patch."},{"line_number":150,"context_line":"* We can work on more advance test against real environment."},{"line_number":151,"context_line":"  Not that needed for this patch IMO but we still should provide certain level"},{"line_number":152,"context_line":"  of examine for extra guarantee."},{"line_number":153,"context_line":""}],"source_content_type":"text/x-rst","patch_set":1,"id":"284604e8_15389ecf","line":150,"in_reply_to":"f5dd49cb_b8e637ba","updated":"2022-05-03 20:27:06.000000000","message":"we do not relaly need real hardware to test this\nwe can test it entirly upstream with tempest.\n\nthe vIOMMU does not require hardware support to use.\n\nif you want to test this either vi third party ci or manually test it and provide import upstream that is fine in addtion to unit and fuctional test but upstream tempest can also test this.\n\n\nif you want to go one step beyond that but not all the way to third party ci\nyou could also extend https://opendev.org/openstack/whitebox-tempest-plugin/src/branch/master/whitebox_tempest_plugin/api/compute to add a viommu test case like\n\nhttps://opendev.org/openstack/whitebox-tempest-plugin/src/branch/master/whitebox_tempest_plugin/api/compute/test_vpmu.py\n\nor \n\nhttps://opendev.org/openstack/whitebox-tempest-plugin/src/branch/master/whitebox_tempest_plugin/api/compute/test_virtio_rng.py\n\nwe dont currently run whitebox against nova but we want to enable it at least as a weekly periodic job eventually and we ill use it in our downstream testing.","commit_id":"6c5b60af78c6b972cf3bcf4bc5984bee0ede0a01"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"44ac274aec0a341d775c7a6b7852794ac38bb5c9","unresolved":true,"context_lines":[{"line_number":10,"context_line":""},{"line_number":11,"context_line":"https://blueprints.launchpad.net/nova/+spec/libvirt-viommu-device"},{"line_number":12,"context_line":""},{"line_number":13,"context_line":"The spec is about the adding support for IOMMU with libvirt driver."},{"line_number":14,"context_line":"Aiming IOMMU support for OpenStack, provide basic libvirt iommu element to"},{"line_number":15,"context_line":"add an IOMMU device."},{"line_number":16,"context_line":""},{"line_number":17,"context_line":"Problem description"},{"line_number":18,"context_line":"\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d"}],"source_content_type":"text/x-rst","patch_set":2,"id":"f3f7410b_cd6a0c66","line":15,"range":{"start_line":13,"start_character":0,"end_line":15,"end_character":20},"updated":"2022-05-03 20:27:06.000000000","message":"we shoudl spell out what vIOMMU stands for early in the doc then we can use teh acronm througout the rest of it since it has been intoduced to the reader.\n\n\"The spec addresses expose a virtual IO memory mapping unit (vIOMMU) with libvirt driver.\"","commit_id":"1393468a04fed8b015e6538027fe1dee48c4da0a"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"ec1e04862caef3fce45f6340cbd68af140f3bd90","unresolved":false,"context_lines":[{"line_number":10,"context_line":""},{"line_number":11,"context_line":"https://blueprints.launchpad.net/nova/+spec/libvirt-viommu-device"},{"line_number":12,"context_line":""},{"line_number":13,"context_line":"The spec is about the adding support for IOMMU with libvirt driver."},{"line_number":14,"context_line":"Aiming IOMMU support for OpenStack, provide basic libvirt iommu element to"},{"line_number":15,"context_line":"add an IOMMU device."},{"line_number":16,"context_line":""},{"line_number":17,"context_line":"Problem description"},{"line_number":18,"context_line":"\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d"}],"source_content_type":"text/x-rst","patch_set":2,"id":"b0beb66c_b3c9ab86","line":15,"range":{"start_line":13,"start_character":0,"end_line":15,"end_character":20},"in_reply_to":"f3f7410b_cd6a0c66","updated":"2022-05-10 13:10:10.000000000","message":"Done","commit_id":"1393468a04fed8b015e6538027fe1dee48c4da0a"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"44ac274aec0a341d775c7a6b7852794ac38bb5c9","unresolved":true,"context_lines":[{"line_number":25,"context_line":"And also as community reachs better ARM support on libvirt driver, I think it"},{"line_number":26,"context_line":"make sense to provide better functionality support for ARM virt. And brough"},{"line_number":27,"context_line":"IOMMU support is required (for some use case, like us)."},{"line_number":28,"context_line":""},{"line_number":29,"context_line":"Use Cases"},{"line_number":30,"context_line":"---------"},{"line_number":31,"context_line":""}],"source_content_type":"text/x-rst","patch_set":2,"id":"8b0f5b7e_e8835fd0","line":28,"updated":"2022-05-03 20:27:06.000000000","message":"this is ok but i might wordsmith it a little.\n\n\"\"\"Currently it is possible to use libvirt to expose vIOMMU to a guest when using the x86 Q35 or ARM virt machine types.\non some platfroms such as AArch64 an vIOMMU is required to fully supprot pci passthough and in general it can enable use fo vfio-pci in guest that requrie it.\nnova does not currently expose vIOMMU functionality to operators or users.\"\"\"\n\nwe can leave the specific models to the proposed change section as that is just an implemenation detail not really part of the probelm satement.","commit_id":"1393468a04fed8b015e6538027fe1dee48c4da0a"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"ec1e04862caef3fce45f6340cbd68af140f3bd90","unresolved":false,"context_lines":[{"line_number":25,"context_line":"And also as community reachs better ARM support on libvirt driver, I think it"},{"line_number":26,"context_line":"make sense to provide better functionality support for ARM virt. And brough"},{"line_number":27,"context_line":"IOMMU support is required (for some use case, like us)."},{"line_number":28,"context_line":""},{"line_number":29,"context_line":"Use Cases"},{"line_number":30,"context_line":"---------"},{"line_number":31,"context_line":""}],"source_content_type":"text/x-rst","patch_set":2,"id":"11864006_9f84b66b","line":28,"in_reply_to":"8b0f5b7e_e8835fd0","updated":"2022-05-10 13:10:10.000000000","message":"Done","commit_id":"1393468a04fed8b015e6538027fe1dee48c4da0a"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"44ac274aec0a341d775c7a6b7852794ac38bb5c9","unresolved":true,"context_lines":[{"line_number":29,"context_line":"Use Cases"},{"line_number":30,"context_line":"---------"},{"line_number":31,"context_line":""},{"line_number":32,"context_line":"We need this driver support for our current aarch64 environment."},{"line_number":33,"context_line":"Without IOMMU supported to our hardware, we don\u0027t have stright forward way"},{"line_number":34,"context_line":"to passthrough device to our instance and proper managed by Nova. With ARM"},{"line_number":35,"context_line":"support with OpenStack getting ready, I think there will be more use case"},{"line_number":36,"context_line":"require this feature."},{"line_number":37,"context_line":""},{"line_number":38,"context_line":"Proposed change"},{"line_number":39,"context_line":"\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d"}],"source_content_type":"text/x-rst","patch_set":2,"id":"204cb819_9a420602","line":36,"range":{"start_line":32,"start_character":0,"end_line":36,"end_character":20},"updated":"2022-05-03 20:27:06.000000000","message":"this is not really written as a use case \nso just rephrasing this as a use-case I would write something like this.\n\n\"\"\"As an operator deploying nova on aarch64, I would like to be able to leverage PCI\npassthrough to support assigning accelerators and other PCIe devices to my guests.\"\"\"\n\nso in general use-cases should read like this\n\"As a \u003crole\u003e, i would like to be able to do \u003caction\u003e to support/enable \u003coutcome\u003e\"\n\nexposition is fine in the intro/problem description or other parts of the spec but I like to try and keep the series short and to the port and add multiple if they exist.\n\nThey should level set on what you want to enable without prescribing necessarily how you do it so they should not repeat the problem description or include info about the proposed change.\n\nThe problem description is the \"what\"\nUse Cases are the \"why\"\nand Proposed change is the \"how\"\n\nin nova, we don\u0027t really differentiate between PCI devices and PCIe devices.\nwe use PCI to refer to both just an FYI\n\nsome other use-case might be \n\n\"as an operator, I would like to enable my end users to use dpdk in their vms\" \n\n(this use case implies we should add a flavour extra specs or operator configurable way to enable for them to enable the feature)\n\n\"as a vnf vendor, that delivers applications that leverage accelerators that require an iommu I would like to express that as an attribute of the image\"\n(this use case mirrors the previous implying we should expose the configuration via an image property so that you can enable it as part of image ingest/vnf provisioning.)\n\nfinally \n\n\"as an operator, I would like to nova to expose vIOMMU capability on a host that supports it and automatically place vms that requires it on appropriate hosts\"\n\nthis implies we should have a compute capability trait and a scheduler prefilter that will request the trait when the image or flavour extra spec are used so that operators do not need to manually configure aggregates or a trait request in the flavor or image.\n\n\nso the use-case to me would be:\n\nUse Cases\n---------\n\n* As an operator deploying nova on aarch64, I would like to be able to leverage PCI\npassthrough to support assigning accelerators and other PCIe devices to my guests.\n* As an operator, I would like to enable my end users to use dpdk in their vms\n* As a vnf vendor, that delivers applications that leverage accelerators that require an iommu I would like to express that as an attribute of the image\n* As an operator, I would like to nova to expose vIOMMU capability on a host that supports it and automatically place vms that requires it on appropriate hosts","commit_id":"1393468a04fed8b015e6538027fe1dee48c4da0a"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"ec1e04862caef3fce45f6340cbd68af140f3bd90","unresolved":false,"context_lines":[{"line_number":29,"context_line":"Use Cases"},{"line_number":30,"context_line":"---------"},{"line_number":31,"context_line":""},{"line_number":32,"context_line":"We need this driver support for our current aarch64 environment."},{"line_number":33,"context_line":"Without IOMMU supported to our hardware, we don\u0027t have stright forward way"},{"line_number":34,"context_line":"to passthrough device to our instance and proper managed by Nova. With ARM"},{"line_number":35,"context_line":"support with OpenStack getting ready, I think there will be more use case"},{"line_number":36,"context_line":"require this feature."},{"line_number":37,"context_line":""},{"line_number":38,"context_line":"Proposed change"},{"line_number":39,"context_line":"\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d"}],"source_content_type":"text/x-rst","patch_set":2,"id":"a52b38dc_d556acde","line":36,"range":{"start_line":32,"start_character":0,"end_line":36,"end_character":20},"in_reply_to":"07db4d12_f445c46c","updated":"2022-05-10 13:10:10.000000000","message":"Done","commit_id":"1393468a04fed8b015e6538027fe1dee48c4da0a"},{"author":{"_account_id":12404,"name":"Rico Lin","email":"ricolin@ricolky.com","username":"rico.lin"},"change_message_id":"5690748b09afa36a4af1d5e343cf11ba4cc29443","unresolved":true,"context_lines":[{"line_number":29,"context_line":"Use Cases"},{"line_number":30,"context_line":"---------"},{"line_number":31,"context_line":""},{"line_number":32,"context_line":"We need this driver support for our current aarch64 environment."},{"line_number":33,"context_line":"Without IOMMU supported to our hardware, we don\u0027t have stright forward way"},{"line_number":34,"context_line":"to passthrough device to our instance and proper managed by Nova. With ARM"},{"line_number":35,"context_line":"support with OpenStack getting ready, I think there will be more use case"},{"line_number":36,"context_line":"require this feature."},{"line_number":37,"context_line":""},{"line_number":38,"context_line":"Proposed change"},{"line_number":39,"context_line":"\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d"}],"source_content_type":"text/x-rst","patch_set":2,"id":"07db4d12_f445c46c","line":36,"range":{"start_line":32,"start_character":0,"end_line":36,"end_character":20},"in_reply_to":"204cb819_9a420602","updated":"2022-05-09 12:07:33.000000000","message":"wow. simply wow.thanks for this detail guideline for nova spec","commit_id":"1393468a04fed8b015e6538027fe1dee48c4da0a"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"44ac274aec0a341d775c7a6b7852794ac38bb5c9","unresolved":true,"context_lines":[{"line_number":48,"context_line":"     hw:viommu_model (for extra_spces):"},{"line_number":49,"context_line":"     support values none|intel|smmuv3|virtio"},{"line_number":50,"context_line":""},{"line_number":51,"context_line":"  ** hw_viommu_interrupt_remapping (for image property) and"},{"line_number":52,"context_line":"     hw:viommu_interrupt_remapping (for extra_spces): boolean option, default"},{"line_number":53,"context_line":"     to false"},{"line_number":54,"context_line":""},{"line_number":55,"context_line":"  ** hw_viommu_caching_mode (for image property) and"},{"line_number":56,"context_line":"     hw:viommu_caching_mode (for extra_spces): boolean option, default to false"},{"line_number":57,"context_line":""},{"line_number":58,"context_line":"  ** hw_viommu_aw_bits (for image property) and"},{"line_number":59,"context_line":"     hw:viommu_aw_bits (for extra_spces): support values: postive integer"}],"source_content_type":"text/x-rst","patch_set":2,"id":"4d9b35aa_4d6acc96","line":56,"range":{"start_line":51,"start_character":1,"end_line":56,"end_character":79},"updated":"2022-05-03 20:27:06.000000000","message":"i would acully not expose this unless we need to and jsut hard code interrupt remapping and caching to true unless we have a use case to trun them off?\n\nthey shoudl be be enaled if the viommu_model is unset or set to a value other then none by default too if we were to expose them.","commit_id":"1393468a04fed8b015e6538027fe1dee48c4da0a"},{"author":{"_account_id":12404,"name":"Rico Lin","email":"ricolin@ricolky.com","username":"rico.lin"},"change_message_id":"5690748b09afa36a4af1d5e343cf11ba4cc29443","unresolved":false,"context_lines":[{"line_number":48,"context_line":"     hw:viommu_model (for extra_spces):"},{"line_number":49,"context_line":"     support values none|intel|smmuv3|virtio"},{"line_number":50,"context_line":""},{"line_number":51,"context_line":"  ** hw_viommu_interrupt_remapping (for image property) and"},{"line_number":52,"context_line":"     hw:viommu_interrupt_remapping (for extra_spces): boolean option, default"},{"line_number":53,"context_line":"     to false"},{"line_number":54,"context_line":""},{"line_number":55,"context_line":"  ** hw_viommu_caching_mode (for image property) and"},{"line_number":56,"context_line":"     hw:viommu_caching_mode (for extra_spces): boolean option, default to false"},{"line_number":57,"context_line":""},{"line_number":58,"context_line":"  ** hw_viommu_aw_bits (for image property) and"},{"line_number":59,"context_line":"     hw:viommu_aw_bits (for extra_spces): support values: postive integer"}],"source_content_type":"text/x-rst","patch_set":2,"id":"8607a6af_f40cf33c","line":56,"range":{"start_line":51,"start_character":1,"end_line":56,"end_character":79},"in_reply_to":"4d9b35aa_4d6acc96","updated":"2022-05-09 12:07:33.000000000","message":"Done","commit_id":"1393468a04fed8b015e6538027fe1dee48c4da0a"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"44ac274aec0a341d775c7a6b7852794ac38bb5c9","unresolved":true,"context_lines":[{"line_number":58,"context_line":"  ** hw_viommu_aw_bits (for image property) and"},{"line_number":59,"context_line":"     hw:viommu_aw_bits (for extra_spces): support values: postive integer"},{"line_number":60,"context_line":""},{"line_number":61,"context_line":"  ** hw_viommu_iotlb (for image property) and"},{"line_number":62,"context_line":"     hw:viommu_iotlb (for extra_spces): boolean option, default to false"},{"line_number":63,"context_line":""},{"line_number":64,"context_line":"  ** hw_viommu_eim (for image property) and"},{"line_number":65,"context_line":"     hw:viommu_eim (for extra_spces): boolean option, default to false"}],"source_content_type":"text/x-rst","patch_set":2,"id":"ed56a2f1_c671b00b","line":62,"range":{"start_line":61,"start_character":2,"end_line":62,"end_character":72},"updated":"2022-05-03 20:27:06.000000000","message":"i also would not expose this and hard code it to on.\n\nthat should be our default if we expose it\n\n--- later ---\ni realised wehn looking at eim some may not know wht iotlb is \n\nit the io space translation lookacide buffer.\n\nit a hardware level cache that cache io adresspace virtual to physicl adress page traslatation.\n\nin some system mappiing the virtual adress a profcess sees to the phyical adress/page in mmio memory or dram can have several laywer of indriction that are expensive to look up. the iotlb caches the mmio adress used to translate between the process virtual adress and the mmio reguions of passthorugh device to enable dma transfers ro reads/writes  to passthough device memeory.\n\ni stongly suspect that we will want to enable this by default or always when the vIOMMU is enabled.","commit_id":"1393468a04fed8b015e6538027fe1dee48c4da0a"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"81dcc5509e2c5299ac43a379367de454b1e7297c","unresolved":false,"context_lines":[{"line_number":58,"context_line":"  ** hw_viommu_aw_bits (for image property) and"},{"line_number":59,"context_line":"     hw:viommu_aw_bits (for extra_spces): support values: postive integer"},{"line_number":60,"context_line":""},{"line_number":61,"context_line":"  ** hw_viommu_iotlb (for image property) and"},{"line_number":62,"context_line":"     hw:viommu_iotlb (for extra_spces): boolean option, default to false"},{"line_number":63,"context_line":""},{"line_number":64,"context_line":"  ** hw_viommu_eim (for image property) and"},{"line_number":65,"context_line":"     hw:viommu_eim (for extra_spces): boolean option, default to false"}],"source_content_type":"text/x-rst","patch_set":2,"id":"7173c95b_3666205c","line":62,"range":{"start_line":61,"start_character":2,"end_line":62,"end_character":72},"in_reply_to":"ed56a2f1_c671b00b","updated":"2022-05-10 13:12:06.000000000","message":"i have asked a follow up for this in a later revision so marking this resolved.","commit_id":"1393468a04fed8b015e6538027fe1dee48c4da0a"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"44ac274aec0a341d775c7a6b7852794ac38bb5c9","unresolved":true,"context_lines":[{"line_number":61,"context_line":"  ** hw_viommu_iotlb (for image property) and"},{"line_number":62,"context_line":"     hw:viommu_iotlb (for extra_spces): boolean option, default to false"},{"line_number":63,"context_line":""},{"line_number":64,"context_line":"  ** hw_viommu_eim (for image property) and"},{"line_number":65,"context_line":"     hw:viommu_eim (for extra_spces): boolean option, default to false"},{"line_number":66,"context_line":""},{"line_number":67,"context_line":"  These attributes are options for `LibvirtConfigGuestIOMMU`, More"}],"source_content_type":"text/x-rst","patch_set":2,"id":"2cb3b593_e7c43816","line":64,"range":{"start_line":64,"start_character":5,"end_line":64,"end_character":18},"updated":"2022-05-03 20:27:06.000000000","message":"this is new to me what is the eim?\n\ncan you explay what this is.\n\n-- later --\n\n Extended Interrupt Mode.\n\n\"\"\"The eim attribute (with possible values on and off) can be used to configure Extended Interrupt Mode. A q35 domain with split I/O APIC (as described in hypervisor features), and both interrupt remapping and EIM turned on for the IOMMU, will be able to use more than 255 vCPUs. Since 3.4.0 (QEMU/KVM only)\"\"\"\n\ni would proably just turn this on if the machine type is Q35\n\n\nits very unlikely that we will have vms with more than 255 vCPUs but unless there is a performance hit to enabling this i think we should be enabling this by defaul t and not exposing this to the end user as a configurable.\n\nthis is an internal impelmentaion detail.\n\nif we really wanted too we could enable this only for flavor with more then 255 cpus but operators and endusers shoudl not have to think about this.","commit_id":"1393468a04fed8b015e6538027fe1dee48c4da0a"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"ec1e04862caef3fce45f6340cbd68af140f3bd90","unresolved":false,"context_lines":[{"line_number":61,"context_line":"  ** hw_viommu_iotlb (for image property) and"},{"line_number":62,"context_line":"     hw:viommu_iotlb (for extra_spces): boolean option, default to false"},{"line_number":63,"context_line":""},{"line_number":64,"context_line":"  ** hw_viommu_eim (for image property) and"},{"line_number":65,"context_line":"     hw:viommu_eim (for extra_spces): boolean option, default to false"},{"line_number":66,"context_line":""},{"line_number":67,"context_line":"  These attributes are options for `LibvirtConfigGuestIOMMU`, More"}],"source_content_type":"text/x-rst","patch_set":2,"id":"f12767c0_468304eb","line":64,"range":{"start_line":64,"start_character":5,"end_line":64,"end_character":18},"in_reply_to":"2cb3b593_e7c43816","updated":"2022-05-10 13:10:10.000000000","message":"Done","commit_id":"1393468a04fed8b015e6538027fe1dee48c4da0a"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"44ac274aec0a341d775c7a6b7852794ac38bb5c9","unresolved":true,"context_lines":[{"line_number":69,"context_line":""},{"line_number":70,"context_line":"* Add IOMMU config when generating guest config. And enable IOAPIC within."},{"line_number":71,"context_line":""},{"line_number":72,"context_line":"* Enable make sure ``locked`` element is present in the ``memoryBacking``"},{"line_number":73,"context_line":"  config. Similarly to the implementation for `SEV`_."},{"line_number":74,"context_line":"  Please reference to issue `MEMLOCK_RLIMIT`_."},{"line_number":75,"context_line":""}],"source_content_type":"text/x-rst","patch_set":2,"id":"5c90c893_bc18dc43","line":72,"updated":"2022-05-03 20:27:06.000000000","message":"no we shoudl not do this.\n\nif we want to contol memory locking then we either shoudl add hw:mlock\nhttps://review.opendev.org/c/openstack/nova/+/778347\nor you should use realtime instances.\n\nwe shoudl not set the locked element when using a vIOMMU by default that prevent all memory over subscrtion and is not requrie to use this feature.\n\nyour specific usecae for the acclerator you use might need it but vIOMMU does not.\n\nso either we expose it as a new parmater or you use it via requesting hw:cpu_realtime","commit_id":"1393468a04fed8b015e6538027fe1dee48c4da0a"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"6f97377cde8183b1245cb1e14a8d952127e11181","unresolved":true,"context_lines":[{"line_number":69,"context_line":""},{"line_number":70,"context_line":"* Add IOMMU config when generating guest config. And enable IOAPIC within."},{"line_number":71,"context_line":""},{"line_number":72,"context_line":"* Enable make sure ``locked`` element is present in the ``memoryBacking``"},{"line_number":73,"context_line":"  config. Similarly to the implementation for `SEV`_."},{"line_number":74,"context_line":"  Please reference to issue `MEMLOCK_RLIMIT`_."},{"line_number":75,"context_line":""}],"source_content_type":"text/x-rst","patch_set":2,"id":"d23d857e_9bebc456","line":72,"in_reply_to":"285912a7_2cf93c93","updated":"2022-05-04 11:41:28.000000000","message":"The thing is that if you use locked memory then the vms memory cant be swapped so over provisioning is broken so its really only safe to use it if yuou are using explict an  mem_page_size i.e. hugepages.\n\ni think we should just add the hw:mlock and hw_mlock extra specs to request it explictly but only allow it if you have set hw:mem_page_size equal to any value including small.\n\nthis will enable the numa aware memory tracking and properly account for the fact that memory over subscription is disabled.\n\nso if you dont want to use hugepages you would do \n\nhw:mlock\u003dtrue hw:mem_page_size\u003dsmall\n\nthat will create an implcit numa topology of 1 numa node and affinitese the vm to that numa node but that shold prevent the OOM event you would otherwise have.\n\nwould that work for you.\n\noften you will be using hugepages anyway when passing though acclerators.\nnot always but this atleast allow sthe numa toplogy filter to protect you from OOM events.","commit_id":"1393468a04fed8b015e6538027fe1dee48c4da0a"},{"author":{"_account_id":1004,"name":"Mohammed Naser","email":"mnaser@vexxhost.com","username":"mnaser"},"change_message_id":"f1abc3f7360e386747e7634d729407fe5817d06f","unresolved":true,"context_lines":[{"line_number":69,"context_line":""},{"line_number":70,"context_line":"* Add IOMMU config when generating guest config. And enable IOAPIC within."},{"line_number":71,"context_line":""},{"line_number":72,"context_line":"* Enable make sure ``locked`` element is present in the ``memoryBacking``"},{"line_number":73,"context_line":"  config. Similarly to the implementation for `SEV`_."},{"line_number":74,"context_line":"  Please reference to issue `MEMLOCK_RLIMIT`_."},{"line_number":75,"context_line":""}],"source_content_type":"text/x-rst","patch_set":2,"id":"e68e243a_d607a419","line":72,"in_reply_to":"5c90c893_bc18dc43","updated":"2022-05-03 20:33:48.000000000","message":"Sean,\n\nThe reason behind this is documented here:\n\nhttps://listman.redhat.com/archives/vfio-users/2018-July/msg00001.html\n\nPerhaps, we should instead disable all MEMLOCK limits via \u003cmemtune\u003e by calculating the needed value?  Otherwise, the instance will fail to boot with multiple passed through devices (in my testing as well).\n\nThe solution is either to take the equation listed there (# of hostdevs X memory size), or drop all limits all together.  I tried the equation and kept having issues, so what\u0027s the best way to go about this then?\n\nIn our case right now, mlock memory is okay, because we\u0027re doing numa pinning + cpu pinning + huge pages so that\u0027s not too much of an issue for us, so it still gets us what we need.\n\nwhat do you suggest do to in this scenario?","commit_id":"1393468a04fed8b015e6538027fe1dee48c4da0a"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"ec1e04862caef3fce45f6340cbd68af140f3bd90","unresolved":false,"context_lines":[{"line_number":69,"context_line":""},{"line_number":70,"context_line":"* Add IOMMU config when generating guest config. And enable IOAPIC within."},{"line_number":71,"context_line":""},{"line_number":72,"context_line":"* Enable make sure ``locked`` element is present in the ``memoryBacking``"},{"line_number":73,"context_line":"  config. Similarly to the implementation for `SEV`_."},{"line_number":74,"context_line":"  Please reference to issue `MEMLOCK_RLIMIT`_."},{"line_number":75,"context_line":""}],"source_content_type":"text/x-rst","patch_set":2,"id":"3d0211c0_48e6ce21","line":72,"in_reply_to":"9724f1f8_57953aa5","updated":"2022-05-10 13:10:10.000000000","message":"Done","commit_id":"1393468a04fed8b015e6538027fe1dee48c4da0a"},{"author":{"_account_id":1004,"name":"Mohammed Naser","email":"mnaser@vexxhost.com","username":"mnaser"},"change_message_id":"bb0f03562e1a0e9fe7816f3faf6c701205c2d056","unresolved":true,"context_lines":[{"line_number":69,"context_line":""},{"line_number":70,"context_line":"* Add IOMMU config when generating guest config. And enable IOAPIC within."},{"line_number":71,"context_line":""},{"line_number":72,"context_line":"* Enable make sure ``locked`` element is present in the ``memoryBacking``"},{"line_number":73,"context_line":"  config. Similarly to the implementation for `SEV`_."},{"line_number":74,"context_line":"  Please reference to issue `MEMLOCK_RLIMIT`_."},{"line_number":75,"context_line":""}],"source_content_type":"text/x-rst","patch_set":2,"id":"285912a7_2cf93c93","line":72,"in_reply_to":"cf882445_9d38f7e5","updated":"2022-05-04 02:07:58.000000000","message":"I see, but in our case, running multiple devs + iommu *will not* work because of the issue listed inside libvirt, unless someone enables locked memory (but that\u0027s really cheating, since it\u0027s removing memory limits) or we drop the memory limits somehow.. or we should document that you should enable memlock to work round this?","commit_id":"1393468a04fed8b015e6538027fe1dee48c4da0a"},{"author":{"_account_id":1004,"name":"Mohammed Naser","email":"mnaser@vexxhost.com","username":"mnaser"},"change_message_id":"d13ce1ee751d7251f989ea74c338f21c4d536edd","unresolved":true,"context_lines":[{"line_number":69,"context_line":""},{"line_number":70,"context_line":"* Add IOMMU config when generating guest config. And enable IOAPIC within."},{"line_number":71,"context_line":""},{"line_number":72,"context_line":"* Enable make sure ``locked`` element is present in the ``memoryBacking``"},{"line_number":73,"context_line":"  config. Similarly to the implementation for `SEV`_."},{"line_number":74,"context_line":"  Please reference to issue `MEMLOCK_RLIMIT`_."},{"line_number":75,"context_line":""}],"source_content_type":"text/x-rst","patch_set":2,"id":"9724f1f8_57953aa5","line":72,"in_reply_to":"d23d857e_9bebc456","updated":"2022-05-05 15:51:15.000000000","message":"yeah, hw:mlock\u003dtrue works for us, since we are already using hugepages, should we bring that patch back up?","commit_id":"1393468a04fed8b015e6538027fe1dee48c4da0a"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"6de319528d14c566bbe944d93b87882f08fa970a","unresolved":true,"context_lines":[{"line_number":69,"context_line":""},{"line_number":70,"context_line":"* Add IOMMU config when generating guest config. And enable IOAPIC within."},{"line_number":71,"context_line":""},{"line_number":72,"context_line":"* Enable make sure ``locked`` element is present in the ``memoryBacking``"},{"line_number":73,"context_line":"  config. Similarly to the implementation for `SEV`_."},{"line_number":74,"context_line":"  Please reference to issue `MEMLOCK_RLIMIT`_."},{"line_number":75,"context_line":""}],"source_content_type":"text/x-rst","patch_set":2,"id":"cf882445_9d38f7e5","line":72,"in_reply_to":"e68e243a_d607a419","updated":"2022-05-03 20:55:21.000000000","message":"we do not set the limit at all today.\n\nspecificaly when we set the locked element in memory backing\nhttps://libvirt.org/formatdomain.html#memory-backing\nwe do not use memtune to set the hard_limit\n\nhttps://libvirt.org/formatdomain.html#memory-tuning\n\n\nnova neve ruses memtune today to set limits as we do not have a good way to actully calulate the correct amount \n \u003c# hostdevs\u003e x \u003cVM memory size\u003e is nto really a reasonable way to caluate that.\n\nit breaks down the scond you allow hot attach and ita also massively oversised\n\n\nso yes the correct approch in my view is to not set any limits in the memtune element\n\nby the way if you look at \nhttps://github.com/openstack/nova/blob/master/nova/virt/libvirt/config.py#L2564-L2595\u003d\n\nthen look at the references its only used in unit test code\n\nhttps://github.com/openstack/nova/blob/b8cc5704558d3c08fda9db2f1bb7fecb2bcd985d/nova/tests/fixtures/libvirt_data.py#L44\nhttps://github.com/openstack/nova/blob/b8cc5704558d3c08fda9db2f1bb7fecb2bcd985d/nova/tests/unit/virt/libvirt/test_config.py#L3616\nhttps://github.com/openstack/nova/blob/b8cc5704558d3c08fda9db2f1bb7fecb2bcd985d/nova/tests/unit/virt/libvirt/test_config.py#L3622\n\nso this is dead code that likely should just  be removed.\n\n\nlibvirt is ment to raise the memlimits automticly when new defice are attached by the way. it shoudl be adding gust memroy +1G i belive per as the default configured limit in under the hood.\n\nthere was a bug in libvirt for vdpa for example https://bugzilla.redhat.com/show_bug.cgi?id\u003d1939776 where they orginally forgot to do this.\n\nso nova really should not have to do this.\nwe decided not to proceed with \nhttps://review.opendev.org/c/openstack/nova/+/778347 and tell operators to use the realtime flag in the interim until libvirt fixed the bug.\n\nif we really need to expose locked memory as a configurable to an end user that is proably better done asa sperate spec to keep this simple.","commit_id":"1393468a04fed8b015e6538027fe1dee48c4da0a"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"294f383d65d2bfc31cb1c913face02414a70b685","unresolved":true,"context_lines":[{"line_number":76,"context_line":".. _`libvirt format domain`: https://libvirt.org/formatdomain.html#iommu-devices"},{"line_number":77,"context_line":".. _`SEV`: https://blueprints.launchpad.net/nova/+spec/amd-sev-libvirt-support"},{"line_number":78,"context_line":".. _`MEMLOCK_RLIMIT`: https://listman.redhat.com/archives/vfio-users/2018-July/msg00001.html"},{"line_number":79,"context_line":""},{"line_number":80,"context_line":"Alternatives"},{"line_number":81,"context_line":"------------"},{"line_number":82,"context_line":""}],"source_content_type":"text/x-rst","patch_set":2,"id":"571b61fa_639ef067","line":79,"updated":"2022-05-03 20:40:39.000000000","message":"so we are missing a few other pieces here\n\n1 a iommu model triat shoudl be added for each of the viommu models \nso just like the graphics models https://github.com/openstack/os-traits/blob/master/os_traits/compute/graphics.py#L15\u003d\n\nyou shoudl create a compute/viommu.py file and add \n\nTRAITS \u003d [\n    # traits corresponding to the allowed values of \"hw_iommu_model\"\n    # image metadata property\n    # https://github.com/openstack/nova/blob/1f74441/nova/objects/fields.py#L501-L509\n    \u0027MODEL_NONE\u0027,\n    \u0027MODEL_INTEL\u0027,\n    \u0027MODEL_SMMUV3\u0027,\n    \u0027MODEL_VIRTIO\u0027,\n]\n\n\n2 you shoudl add \n  \u0027hw_viommu_model\u0027: \u0027COMPUTE_IOMMU\u0027,\nhere https://github.com/openstack/nova/blob/master/nova/scheduler/request_filter.py#L216\n\nthat will extend the transform_image_metadata prefilter ot select host with\nthe correct model.\n\n3 the libvirt driver shoudl report the new compute COMPUTE_IOMMU_MODEL_* capablity trait for each model it supports.\n\n\nwhith those 3 addtional changes you will be able to schdule to host that supprot the vIOMMU devices.","commit_id":"1393468a04fed8b015e6538027fe1dee48c4da0a"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"ec1e04862caef3fce45f6340cbd68af140f3bd90","unresolved":false,"context_lines":[{"line_number":76,"context_line":".. _`libvirt format domain`: https://libvirt.org/formatdomain.html#iommu-devices"},{"line_number":77,"context_line":".. _`SEV`: https://blueprints.launchpad.net/nova/+spec/amd-sev-libvirt-support"},{"line_number":78,"context_line":".. _`MEMLOCK_RLIMIT`: https://listman.redhat.com/archives/vfio-users/2018-July/msg00001.html"},{"line_number":79,"context_line":""},{"line_number":80,"context_line":"Alternatives"},{"line_number":81,"context_line":"------------"},{"line_number":82,"context_line":""}],"source_content_type":"text/x-rst","patch_set":2,"id":"5561924a_6b5e3cce","line":79,"in_reply_to":"571b61fa_639ef067","updated":"2022-05-10 13:10:10.000000000","message":"Done","commit_id":"1393468a04fed8b015e6538027fe1dee48c4da0a"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"ec1e04862caef3fce45f6340cbd68af140f3bd90","unresolved":true,"context_lines":[{"line_number":10,"context_line":""},{"line_number":11,"context_line":"https://blueprints.launchpad.net/nova/+spec/libvirt-viommu-device"},{"line_number":12,"context_line":""},{"line_number":13,"context_line":"The spec addresses expose a virtual IO memory mapping unit (vIOMMU) with"},{"line_number":14,"context_line":"libvirt driver. Aiming IOMMU support for OpenStack, provide basic libvirt"},{"line_number":15,"context_line":"iommu element to add an vIOMMU device."},{"line_number":16,"context_line":""}],"source_content_type":"text/x-rst","patch_set":5,"id":"0c647ee2_dba6c8e0","line":13,"range":{"start_line":13,"start_character":9,"end_line":13,"end_character":25},"updated":"2022-05-10 13:10:10.000000000","message":"sorry this was miss worded in my orginal comment\n\nit should be  \"adds support to expose\"","commit_id":"28fce254ce7741d4c793f3d65dbe0ee54edba744"},{"author":{"_account_id":12404,"name":"Rico Lin","email":"ricolin@ricolky.com","username":"rico.lin"},"change_message_id":"d22ca3153c58bd2ae1b75342ea3eeb2f932ee9fc","unresolved":false,"context_lines":[{"line_number":10,"context_line":""},{"line_number":11,"context_line":"https://blueprints.launchpad.net/nova/+spec/libvirt-viommu-device"},{"line_number":12,"context_line":""},{"line_number":13,"context_line":"The spec addresses expose a virtual IO memory mapping unit (vIOMMU) with"},{"line_number":14,"context_line":"libvirt driver. Aiming IOMMU support for OpenStack, provide basic libvirt"},{"line_number":15,"context_line":"iommu element to add an vIOMMU device."},{"line_number":16,"context_line":""}],"source_content_type":"text/x-rst","patch_set":5,"id":"e090825d_e24b7393","line":13,"range":{"start_line":13,"start_character":9,"end_line":13,"end_character":25},"in_reply_to":"0c647ee2_dba6c8e0","updated":"2022-05-11 17:30:06.000000000","message":"Done","commit_id":"28fce254ce7741d4c793f3d65dbe0ee54edba744"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"ec1e04862caef3fce45f6340cbd68af140f3bd90","unresolved":true,"context_lines":[{"line_number":11,"context_line":"https://blueprints.launchpad.net/nova/+spec/libvirt-viommu-device"},{"line_number":12,"context_line":""},{"line_number":13,"context_line":"The spec addresses expose a virtual IO memory mapping unit (vIOMMU) with"},{"line_number":14,"context_line":"libvirt driver. Aiming IOMMU support for OpenStack, provide basic libvirt"},{"line_number":15,"context_line":"iommu element to add an vIOMMU device."},{"line_number":16,"context_line":""},{"line_number":17,"context_line":"Problem description"},{"line_number":18,"context_line":"\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d"}],"source_content_type":"text/x-rst","patch_set":5,"id":"a5080569_4d3d5bcc","line":15,"range":{"start_line":14,"start_character":16,"end_line":15,"end_character":38},"updated":"2022-05-10 13:10:10.000000000","message":"this can be removed\n\nits not really grammatically correct and does not add any more info over the first sentence.","commit_id":"28fce254ce7741d4c793f3d65dbe0ee54edba744"},{"author":{"_account_id":12404,"name":"Rico Lin","email":"ricolin@ricolky.com","username":"rico.lin"},"change_message_id":"d22ca3153c58bd2ae1b75342ea3eeb2f932ee9fc","unresolved":false,"context_lines":[{"line_number":11,"context_line":"https://blueprints.launchpad.net/nova/+spec/libvirt-viommu-device"},{"line_number":12,"context_line":""},{"line_number":13,"context_line":"The spec addresses expose a virtual IO memory mapping unit (vIOMMU) with"},{"line_number":14,"context_line":"libvirt driver. Aiming IOMMU support for OpenStack, provide basic libvirt"},{"line_number":15,"context_line":"iommu element to add an vIOMMU device."},{"line_number":16,"context_line":""},{"line_number":17,"context_line":"Problem description"},{"line_number":18,"context_line":"\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d"}],"source_content_type":"text/x-rst","patch_set":5,"id":"4c56fecb_9bd5a467","line":15,"range":{"start_line":14,"start_character":16,"end_line":15,"end_character":38},"in_reply_to":"a5080569_4d3d5bcc","updated":"2022-05-11 17:30:06.000000000","message":"Done","commit_id":"28fce254ce7741d4c793f3d65dbe0ee54edba744"},{"author":{"_account_id":9708,"name":"Balazs Gibizer","display_name":"gibi","email":"gibizer@gmail.com","username":"gibi"},"change_message_id":"bc320227633aa0493feddd2c5729da26e5a2b294","unresolved":true,"context_lines":[{"line_number":20,"context_line":"Currently it is possible to use libvirt to expose vIOMMU to a guest when using"},{"line_number":21,"context_line":"the x86 Q35 or ARM virt machine types. On some platfroms such as AArch64 an"},{"line_number":22,"context_line":"vIOMMU is required to fully supprot pci passthough and in general it can enable"},{"line_number":23,"context_line":"use fo vfio-pci in guest that requrie it. Nova does not currently expose vIOMMU"},{"line_number":24,"context_line":"functionality to operators or users."},{"line_number":25,"context_line":""},{"line_number":26,"context_line":"Use Cases"}],"source_content_type":"text/x-rst","patch_set":5,"id":"0e8779cb_b4b6f744","line":23,"range":{"start_line":23,"start_character":30,"end_line":23,"end_character":37},"updated":"2022-05-10 12:20:29.000000000","message":"nit: require","commit_id":"28fce254ce7741d4c793f3d65dbe0ee54edba744"},{"author":{"_account_id":12404,"name":"Rico Lin","email":"ricolin@ricolky.com","username":"rico.lin"},"change_message_id":"d22ca3153c58bd2ae1b75342ea3eeb2f932ee9fc","unresolved":false,"context_lines":[{"line_number":20,"context_line":"Currently it is possible to use libvirt to expose vIOMMU to a guest when using"},{"line_number":21,"context_line":"the x86 Q35 or ARM virt machine types. On some platfroms such as AArch64 an"},{"line_number":22,"context_line":"vIOMMU is required to fully supprot pci passthough and in general it can enable"},{"line_number":23,"context_line":"use fo vfio-pci in guest that requrie it. Nova does not currently expose vIOMMU"},{"line_number":24,"context_line":"functionality to operators or users."},{"line_number":25,"context_line":""},{"line_number":26,"context_line":"Use Cases"}],"source_content_type":"text/x-rst","patch_set":5,"id":"e9fc7311_d85568d0","line":23,"range":{"start_line":23,"start_character":30,"end_line":23,"end_character":37},"in_reply_to":"0e8779cb_b4b6f744","updated":"2022-05-11 17:30:06.000000000","message":"Done","commit_id":"28fce254ce7741d4c793f3d65dbe0ee54edba744"},{"author":{"_account_id":9708,"name":"Balazs Gibizer","display_name":"gibi","email":"gibizer@gmail.com","username":"gibi"},"change_message_id":"bc320227633aa0493feddd2c5729da26e5a2b294","unresolved":true,"context_lines":[{"line_number":46,"context_line":"  IOMMU (`LibvirtConfigGuestIOMMU`) and"},{"line_number":47,"context_line":"  APIC feature (`LibvirtConfigGuestFeatureIOAPIC`)."},{"line_number":48,"context_line":""},{"line_number":49,"context_line":"* Add following attribute to image property and extra_spces:"},{"line_number":50,"context_line":""},{"line_number":51,"context_line":"  ** hw_viommu_model (for image property) and"},{"line_number":52,"context_line":"     hw:viommu_model (for extra_spces):"}],"source_content_type":"text/x-rst","patch_set":5,"id":"7d3c0dc6_0418dc15","line":49,"range":{"start_line":49,"start_character":48,"end_line":49,"end_character":59},"updated":"2022-05-10 12:20:29.000000000","message":"nit:extra_specs","commit_id":"28fce254ce7741d4c793f3d65dbe0ee54edba744"},{"author":{"_account_id":12404,"name":"Rico Lin","email":"ricolin@ricolky.com","username":"rico.lin"},"change_message_id":"d22ca3153c58bd2ae1b75342ea3eeb2f932ee9fc","unresolved":false,"context_lines":[{"line_number":46,"context_line":"  IOMMU (`LibvirtConfigGuestIOMMU`) and"},{"line_number":47,"context_line":"  APIC feature (`LibvirtConfigGuestFeatureIOAPIC`)."},{"line_number":48,"context_line":""},{"line_number":49,"context_line":"* Add following attribute to image property and extra_spces:"},{"line_number":50,"context_line":""},{"line_number":51,"context_line":"  ** hw_viommu_model (for image property) and"},{"line_number":52,"context_line":"     hw:viommu_model (for extra_spces):"}],"source_content_type":"text/x-rst","patch_set":5,"id":"51842381_885c4a36","line":49,"range":{"start_line":49,"start_character":48,"end_line":49,"end_character":59},"in_reply_to":"7d3c0dc6_0418dc15","updated":"2022-05-11 17:30:06.000000000","message":"Done","commit_id":"28fce254ce7741d4c793f3d65dbe0ee54edba744"},{"author":{"_account_id":9708,"name":"Balazs Gibizer","display_name":"gibi","email":"gibizer@gmail.com","username":"gibi"},"change_message_id":"bc320227633aa0493feddd2c5729da26e5a2b294","unresolved":true,"context_lines":[{"line_number":49,"context_line":"* Add following attribute to image property and extra_spces:"},{"line_number":50,"context_line":""},{"line_number":51,"context_line":"  ** hw_viommu_model (for image property) and"},{"line_number":52,"context_line":"     hw:viommu_model (for extra_spces):"},{"line_number":53,"context_line":"     support values none|intel|smmuv3|virtio"},{"line_number":54,"context_line":""},{"line_number":55,"context_line":"  ** hw_viommu_aw_bits (for image property) and"}],"source_content_type":"text/x-rst","patch_set":5,"id":"9cc7906b_53ef18ed","line":52,"range":{"start_line":52,"start_character":26,"end_line":52,"end_character":37},"updated":"2022-05-10 12:20:29.000000000","message":"nit: extra_specs\nhere and below","commit_id":"28fce254ce7741d4c793f3d65dbe0ee54edba744"},{"author":{"_account_id":12404,"name":"Rico Lin","email":"ricolin@ricolky.com","username":"rico.lin"},"change_message_id":"d22ca3153c58bd2ae1b75342ea3eeb2f932ee9fc","unresolved":false,"context_lines":[{"line_number":49,"context_line":"* Add following attribute to image property and extra_spces:"},{"line_number":50,"context_line":""},{"line_number":51,"context_line":"  ** hw_viommu_model (for image property) and"},{"line_number":52,"context_line":"     hw:viommu_model (for extra_spces):"},{"line_number":53,"context_line":"     support values none|intel|smmuv3|virtio"},{"line_number":54,"context_line":""},{"line_number":55,"context_line":"  ** hw_viommu_aw_bits (for image property) and"}],"source_content_type":"text/x-rst","patch_set":5,"id":"58be3562_d09af7d8","line":52,"range":{"start_line":52,"start_character":26,"end_line":52,"end_character":37},"in_reply_to":"9cc7906b_53ef18ed","updated":"2022-05-11 17:30:06.000000000","message":"Done","commit_id":"28fce254ce7741d4c793f3d65dbe0ee54edba744"},{"author":{"_account_id":9708,"name":"Balazs Gibizer","display_name":"gibi","email":"gibizer@gmail.com","username":"gibi"},"change_message_id":"bc320227633aa0493feddd2c5729da26e5a2b294","unresolved":true,"context_lines":[{"line_number":53,"context_line":"     support values none|intel|smmuv3|virtio"},{"line_number":54,"context_line":""},{"line_number":55,"context_line":"  ** hw_viommu_aw_bits (for image property) and"},{"line_number":56,"context_line":"     hw:viommu_aw_bits (for extra_spces): support values: postive integer"},{"line_number":57,"context_line":""},{"line_number":58,"context_line":"  ** hw_viommu_iotlb (for image property) and"},{"line_number":59,"context_line":"     hw:viommu_iotlb (for extra_spces): boolean option, default to true"}],"source_content_type":"text/x-rst","patch_set":5,"id":"2f45d83d_342c1266","line":56,"range":{"start_line":56,"start_character":58,"end_line":56,"end_character":65},"updated":"2022-05-10 12:20:29.000000000","message":"nit:positive","commit_id":"28fce254ce7741d4c793f3d65dbe0ee54edba744"},{"author":{"_account_id":12404,"name":"Rico Lin","email":"ricolin@ricolky.com","username":"rico.lin"},"change_message_id":"d22ca3153c58bd2ae1b75342ea3eeb2f932ee9fc","unresolved":false,"context_lines":[{"line_number":53,"context_line":"     support values none|intel|smmuv3|virtio"},{"line_number":54,"context_line":""},{"line_number":55,"context_line":"  ** hw_viommu_aw_bits (for image property) and"},{"line_number":56,"context_line":"     hw:viommu_aw_bits (for extra_spces): support values: postive integer"},{"line_number":57,"context_line":""},{"line_number":58,"context_line":"  ** hw_viommu_iotlb (for image property) and"},{"line_number":59,"context_line":"     hw:viommu_iotlb (for extra_spces): boolean option, default to true"}],"source_content_type":"text/x-rst","patch_set":5,"id":"b3c9fd1a_fbf64047","line":56,"range":{"start_line":56,"start_character":58,"end_line":56,"end_character":65},"in_reply_to":"2f45d83d_342c1266","updated":"2022-05-11 17:30:06.000000000","message":"Done","commit_id":"28fce254ce7741d4c793f3d65dbe0ee54edba744"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"ec1e04862caef3fce45f6340cbd68af140f3bd90","unresolved":true,"context_lines":[{"line_number":55,"context_line":"  ** hw_viommu_aw_bits (for image property) and"},{"line_number":56,"context_line":"     hw:viommu_aw_bits (for extra_spces): support values: postive integer"},{"line_number":57,"context_line":""},{"line_number":58,"context_line":"  ** hw_viommu_iotlb (for image property) and"},{"line_number":59,"context_line":"     hw:viommu_iotlb (for extra_spces): boolean option, default to true"},{"line_number":60,"context_line":"     Side Note:"},{"line_number":61,"context_line":"     iotlb (io space translation lookaside buffer) is io space translation"},{"line_number":62,"context_line":"     lookaside buffer is hardware level cache that caches io address pace"}],"source_content_type":"text/x-rst","patch_set":5,"id":"045e162d_00c9c3f8","line":59,"range":{"start_line":58,"start_character":5,"end_line":59,"end_character":21},"updated":"2022-05-10 13:10:10.000000000","message":"im still not convicce we need that ablity to turn this off.\n\ncan you explain why this is requried.\n\nwe we want to make this configurable then i agree with these names.\n\nnit while the default behavour  woudl be \"true\"  when \nviommu_model is defiend in treally the default woudl be unset/None\n\nand it would have no effect without enabling the viommu.","commit_id":"28fce254ce7741d4c793f3d65dbe0ee54edba744"},{"author":{"_account_id":12404,"name":"Rico Lin","email":"ricolin@ricolky.com","username":"rico.lin"},"change_message_id":"53fecc273758c021520dc5e5fe5c955800861c94","unresolved":false,"context_lines":[{"line_number":55,"context_line":"  ** hw_viommu_aw_bits (for image property) and"},{"line_number":56,"context_line":"     hw:viommu_aw_bits (for extra_spces): support values: postive integer"},{"line_number":57,"context_line":""},{"line_number":58,"context_line":"  ** hw_viommu_iotlb (for image property) and"},{"line_number":59,"context_line":"     hw:viommu_iotlb (for extra_spces): boolean option, default to true"},{"line_number":60,"context_line":"     Side Note:"},{"line_number":61,"context_line":"     iotlb (io space translation lookaside buffer) is io space translation"},{"line_number":62,"context_line":"     lookaside buffer is hardware level cache that caches io address pace"}],"source_content_type":"text/x-rst","patch_set":5,"id":"bc4a8129_186ed291","line":59,"range":{"start_line":58,"start_character":5,"end_line":59,"end_character":21},"in_reply_to":"019829ec_fd2cd2b6","updated":"2022-05-13 10:24:17.000000000","message":"Done","commit_id":"28fce254ce7741d4c793f3d65dbe0ee54edba744"},{"author":{"_account_id":12404,"name":"Rico Lin","email":"ricolin@ricolky.com","username":"rico.lin"},"change_message_id":"d22ca3153c58bd2ae1b75342ea3eeb2f932ee9fc","unresolved":true,"context_lines":[{"line_number":55,"context_line":"  ** hw_viommu_aw_bits (for image property) and"},{"line_number":56,"context_line":"     hw:viommu_aw_bits (for extra_spces): support values: postive integer"},{"line_number":57,"context_line":""},{"line_number":58,"context_line":"  ** hw_viommu_iotlb (for image property) and"},{"line_number":59,"context_line":"     hw:viommu_iotlb (for extra_spces): boolean option, default to true"},{"line_number":60,"context_line":"     Side Note:"},{"line_number":61,"context_line":"     iotlb (io space translation lookaside buffer) is io space translation"},{"line_number":62,"context_line":"     lookaside buffer is hardware level cache that caches io address pace"}],"source_content_type":"text/x-rst","patch_set":5,"id":"019829ec_fd2cd2b6","line":59,"range":{"start_line":58,"start_character":5,"end_line":59,"end_character":21},"in_reply_to":"045e162d_00c9c3f8","updated":"2022-05-11 17:30:06.000000000","message":"I\u0027m not strongly acquired this option, so I guess we can leave it and see if anyone needs this someday.","commit_id":"28fce254ce7741d4c793f3d65dbe0ee54edba744"},{"author":{"_account_id":9708,"name":"Balazs Gibizer","display_name":"gibi","email":"gibizer@gmail.com","username":"gibi"},"change_message_id":"bc320227633aa0493feddd2c5729da26e5a2b294","unresolved":true,"context_lines":[{"line_number":58,"context_line":"  ** hw_viommu_iotlb (for image property) and"},{"line_number":59,"context_line":"     hw:viommu_iotlb (for extra_spces): boolean option, default to true"},{"line_number":60,"context_line":"     Side Note:"},{"line_number":61,"context_line":"     iotlb (io space translation lookaside buffer) is io space translation"},{"line_number":62,"context_line":"     lookaside buffer is hardware level cache that caches io address pace"},{"line_number":63,"context_line":"     virtual to physical address page translation. In some systems mapping"},{"line_number":64,"context_line":"     the virtual address a process sees to the physical address/page in"}],"source_content_type":"text/x-rst","patch_set":5,"id":"a2d248c9_30aa7c9b","line":61,"range":{"start_line":61,"start_character":11,"end_line":61,"end_character":49},"updated":"2022-05-10 12:20:29.000000000","message":"it is just repeated in the sentence right away","commit_id":"28fce254ce7741d4c793f3d65dbe0ee54edba744"},{"author":{"_account_id":12404,"name":"Rico Lin","email":"ricolin@ricolky.com","username":"rico.lin"},"change_message_id":"d22ca3153c58bd2ae1b75342ea3eeb2f932ee9fc","unresolved":false,"context_lines":[{"line_number":58,"context_line":"  ** hw_viommu_iotlb (for image property) and"},{"line_number":59,"context_line":"     hw:viommu_iotlb (for extra_spces): boolean option, default to true"},{"line_number":60,"context_line":"     Side Note:"},{"line_number":61,"context_line":"     iotlb (io space translation lookaside buffer) is io space translation"},{"line_number":62,"context_line":"     lookaside buffer is hardware level cache that caches io address pace"},{"line_number":63,"context_line":"     virtual to physical address page translation. In some systems mapping"},{"line_number":64,"context_line":"     the virtual address a process sees to the physical address/page in"}],"source_content_type":"text/x-rst","patch_set":5,"id":"6bf39267_e87a7299","line":61,"range":{"start_line":61,"start_character":11,"end_line":61,"end_character":49},"in_reply_to":"a2d248c9_30aa7c9b","updated":"2022-05-11 17:30:06.000000000","message":"Done","commit_id":"28fce254ce7741d4c793f3d65dbe0ee54edba744"},{"author":{"_account_id":9708,"name":"Balazs Gibizer","display_name":"gibi","email":"gibizer@gmail.com","username":"gibi"},"change_message_id":"bc320227633aa0493feddd2c5729da26e5a2b294","unresolved":true,"context_lines":[{"line_number":59,"context_line":"     hw:viommu_iotlb (for extra_spces): boolean option, default to true"},{"line_number":60,"context_line":"     Side Note:"},{"line_number":61,"context_line":"     iotlb (io space translation lookaside buffer) is io space translation"},{"line_number":62,"context_line":"     lookaside buffer is hardware level cache that caches io address pace"},{"line_number":63,"context_line":"     virtual to physical address page translation. In some systems mapping"},{"line_number":64,"context_line":"     the virtual address a process sees to the physical address/page in"},{"line_number":65,"context_line":"     mmio memory or dram can have several layers of indirection that are"}],"source_content_type":"text/x-rst","patch_set":5,"id":"78ca1646_b4a9ece4","line":62,"range":{"start_line":62,"start_character":69,"end_line":62,"end_character":73},"updated":"2022-05-10 12:20:29.000000000","message":"nit: space?","commit_id":"28fce254ce7741d4c793f3d65dbe0ee54edba744"},{"author":{"_account_id":12404,"name":"Rico Lin","email":"ricolin@ricolky.com","username":"rico.lin"},"change_message_id":"d22ca3153c58bd2ae1b75342ea3eeb2f932ee9fc","unresolved":false,"context_lines":[{"line_number":59,"context_line":"     hw:viommu_iotlb (for extra_spces): boolean option, default to true"},{"line_number":60,"context_line":"     Side Note:"},{"line_number":61,"context_line":"     iotlb (io space translation lookaside buffer) is io space translation"},{"line_number":62,"context_line":"     lookaside buffer is hardware level cache that caches io address pace"},{"line_number":63,"context_line":"     virtual to physical address page translation. In some systems mapping"},{"line_number":64,"context_line":"     the virtual address a process sees to the physical address/page in"},{"line_number":65,"context_line":"     mmio memory or dram can have several layers of indirection that are"}],"source_content_type":"text/x-rst","patch_set":5,"id":"558136a0_87d93970","line":62,"range":{"start_line":62,"start_character":69,"end_line":62,"end_character":73},"in_reply_to":"749b679e_fe9507b0","updated":"2022-05-11 17:30:06.000000000","message":"Done","commit_id":"28fce254ce7741d4c793f3d65dbe0ee54edba744"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"acf2f0fb1c02c2f8778622257fff608fa4c7cb24","unresolved":true,"context_lines":[{"line_number":59,"context_line":"     hw:viommu_iotlb (for extra_spces): boolean option, default to true"},{"line_number":60,"context_line":"     Side Note:"},{"line_number":61,"context_line":"     iotlb (io space translation lookaside buffer) is io space translation"},{"line_number":62,"context_line":"     lookaside buffer is hardware level cache that caches io address pace"},{"line_number":63,"context_line":"     virtual to physical address page translation. In some systems mapping"},{"line_number":64,"context_line":"     the virtual address a process sees to the physical address/page in"},{"line_number":65,"context_line":"     mmio memory or dram can have several layers of indirection that are"}],"source_content_type":"text/x-rst","patch_set":5,"id":"749b679e_fe9507b0","line":62,"range":{"start_line":62,"start_character":69,"end_line":62,"end_character":73},"in_reply_to":"78ca1646_b4a9ece4","updated":"2022-05-10 12:54:11.000000000","message":"yes","commit_id":"28fce254ce7741d4c793f3d65dbe0ee54edba744"},{"author":{"_account_id":9708,"name":"Balazs Gibizer","display_name":"gibi","email":"gibizer@gmail.com","username":"gibi"},"change_message_id":"bc320227633aa0493feddd2c5729da26e5a2b294","unresolved":true,"context_lines":[{"line_number":63,"context_line":"     virtual to physical address page translation. In some systems mapping"},{"line_number":64,"context_line":"     the virtual address a process sees to the physical address/page in"},{"line_number":65,"context_line":"     mmio memory or dram can have several layers of indirection that are"},{"line_number":66,"context_line":"     expensive to look up. the iotlb caches the mmio address used to"},{"line_number":67,"context_line":"     translate between the process virtual address and the mmio regions of"},{"line_number":68,"context_line":"     passthrough device to enable DMA transfers to reads/writes to"},{"line_number":69,"context_line":"     passthrough device memory."}],"source_content_type":"text/x-rst","patch_set":5,"id":"1e431bfc_d8f516b9","line":66,"range":{"start_line":66,"start_character":27,"end_line":66,"end_character":28},"updated":"2022-05-10 12:20:29.000000000","message":"nit: T","commit_id":"28fce254ce7741d4c793f3d65dbe0ee54edba744"},{"author":{"_account_id":12404,"name":"Rico Lin","email":"ricolin@ricolky.com","username":"rico.lin"},"change_message_id":"d22ca3153c58bd2ae1b75342ea3eeb2f932ee9fc","unresolved":false,"context_lines":[{"line_number":63,"context_line":"     virtual to physical address page translation. In some systems mapping"},{"line_number":64,"context_line":"     the virtual address a process sees to the physical address/page in"},{"line_number":65,"context_line":"     mmio memory or dram can have several layers of indirection that are"},{"line_number":66,"context_line":"     expensive to look up. the iotlb caches the mmio address used to"},{"line_number":67,"context_line":"     translate between the process virtual address and the mmio regions of"},{"line_number":68,"context_line":"     passthrough device to enable DMA transfers to reads/writes to"},{"line_number":69,"context_line":"     passthrough device memory."}],"source_content_type":"text/x-rst","patch_set":5,"id":"93cc8fcc_cb45eb0c","line":66,"range":{"start_line":66,"start_character":27,"end_line":66,"end_character":28},"in_reply_to":"1e431bfc_d8f516b9","updated":"2022-05-11 17:30:06.000000000","message":"Done","commit_id":"28fce254ce7741d4c793f3d65dbe0ee54edba744"},{"author":{"_account_id":9708,"name":"Balazs Gibizer","display_name":"gibi","email":"gibizer@gmail.com","username":"gibi"},"change_message_id":"bc320227633aa0493feddd2c5729da26e5a2b294","unresolved":true,"context_lines":[{"line_number":75,"context_line":""},{"line_number":76,"context_line":"* Add hw_mlock for image property and hw:mlock for extra specs."},{"line_number":77,"context_line":"  This will make sure ``locked`` element is present in the ``memoryBacking``,"},{"line_number":78,"context_line":"  but only allow it if you have also set hw:mem_page_size."},{"line_number":79,"context_line":"  Here is a reference to related issue `MEMLOCK_RLIMIT`_."},{"line_number":80,"context_line":""},{"line_number":81,"context_line":"* For eim attribute in `LibvirtConfigGuestIOMMU`:"}],"source_content_type":"text/x-rst","patch_set":5,"id":"e02c446e_1bbf63c8","line":78,"updated":"2022-05-10 12:20:29.000000000","message":"Nova already sets memory locked automatically in some cases. See the usage of LibvirtConfigGuestMemoryBacking and nova.virt.libvirt.driver.LibvirtDriver._get_guest_memory_backing_config.\n\nWhat will happen with these case if hw:mlock\u003dFalse is in the flavor extra_spec?","commit_id":"28fce254ce7741d4c793f3d65dbe0ee54edba744"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"b43c2365cf384f64a9152ab6d585f11efe039bc4","unresolved":true,"context_lines":[{"line_number":75,"context_line":""},{"line_number":76,"context_line":"* Add hw_mlock for image property and hw:mlock for extra specs."},{"line_number":77,"context_line":"  This will make sure ``locked`` element is present in the ``memoryBacking``,"},{"line_number":78,"context_line":"  but only allow it if you have also set hw:mem_page_size."},{"line_number":79,"context_line":"  Here is a reference to related issue `MEMLOCK_RLIMIT`_."},{"line_number":80,"context_line":""},{"line_number":81,"context_line":"* For eim attribute in `LibvirtConfigGuestIOMMU`:"}],"source_content_type":"text/x-rst","patch_set":5,"id":"4227e9a3_ffd52688","line":78,"in_reply_to":"0759b44c_4d1dddd9","updated":"2022-05-13 10:11:48.000000000","message":"so lets keep this in this spec. but update teh hw:mlock name to \nhw:locked_memory and hw_locked_memory based on artom\u0027s and stephen\u0027s feedback on the old patch i had for this.\nhttps://review.opendev.org/c/openstack/nova/+/778347/8/nova/api/validation/extra_specs/hw.py#150\u003d\n\ni have resotred that so ricolin should feel free to take over that and add the check for hw:mem_page_size or hw_mem_page_size beint set and update the name.","commit_id":"28fce254ce7741d4c793f3d65dbe0ee54edba744"},{"author":{"_account_id":12404,"name":"Rico Lin","email":"ricolin@ricolky.com","username":"rico.lin"},"change_message_id":"53fecc273758c021520dc5e5fe5c955800861c94","unresolved":false,"context_lines":[{"line_number":75,"context_line":""},{"line_number":76,"context_line":"* Add hw_mlock for image property and hw:mlock for extra specs."},{"line_number":77,"context_line":"  This will make sure ``locked`` element is present in the ``memoryBacking``,"},{"line_number":78,"context_line":"  but only allow it if you have also set hw:mem_page_size."},{"line_number":79,"context_line":"  Here is a reference to related issue `MEMLOCK_RLIMIT`_."},{"line_number":80,"context_line":""},{"line_number":81,"context_line":"* For eim attribute in `LibvirtConfigGuestIOMMU`:"}],"source_content_type":"text/x-rst","patch_set":5,"id":"005c1909_d5fd17b8","line":78,"in_reply_to":"4227e9a3_ffd52688","updated":"2022-05-13 10:24:17.000000000","message":"Done","commit_id":"28fce254ce7741d4c793f3d65dbe0ee54edba744"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"acf2f0fb1c02c2f8778622257fff608fa4c7cb24","unresolved":true,"context_lines":[{"line_number":75,"context_line":""},{"line_number":76,"context_line":"* Add hw_mlock for image property and hw:mlock for extra specs."},{"line_number":77,"context_line":"  This will make sure ``locked`` element is present in the ``memoryBacking``,"},{"line_number":78,"context_line":"  but only allow it if you have also set hw:mem_page_size."},{"line_number":79,"context_line":"  Here is a reference to related issue `MEMLOCK_RLIMIT`_."},{"line_number":80,"context_line":""},{"line_number":81,"context_line":"* For eim attribute in `LibvirtConfigGuestIOMMU`:"}],"source_content_type":"text/x-rst","patch_set":5,"id":"0759b44c_4d1dddd9","line":78,"in_reply_to":"e02c446e_1bbf63c8","updated":"2022-05-10 12:54:11.000000000","message":"so the viommu does not requried locked memory.\nyou can use it without pci passtough/sriov too.\n\nso locked is someithgn form a requirement of some pci passthough usecae not viommu.\nso hw:mlock\u003dFalse which would be valid in the genreal case and hw:mlock\u003dTrue would only be needed when libvit does not allcoate enough memory for multiple pci passthoug devices.\n\nlocked memory not only disables memory over subscription but it also prevent the kernel form swapping the memory so really its a very heavy restriction to enforce.\n\nby tying it to hw:mem_page_size (which also disable over subscription) we can ensure that the scheduler can actually account for this correctly and prevent out of memory events.\n\nthis could be a sperate spec or specless blueprint since its not requried for viommu but is requried for there primary usecase.","commit_id":"28fce254ce7741d4c793f3d65dbe0ee54edba744"},{"author":{"_account_id":9708,"name":"Balazs Gibizer","display_name":"gibi","email":"gibizer@gmail.com","username":"gibi"},"change_message_id":"bc320227633aa0493feddd2c5729da26e5a2b294","unresolved":true,"context_lines":[],"source_content_type":"","patch_set":5,"id":"c28e18e5_c3a2788f","line":202,"updated":"2022-05-10 12:20:29.000000000","message":"I think this spec does not follow the template as the History section is missing","commit_id":"28fce254ce7741d4c793f3d65dbe0ee54edba744"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"ec1e04862caef3fce45f6340cbd68af140f3bd90","unresolved":true,"context_lines":[],"source_content_type":"","patch_set":5,"id":"eae54c66_56f287dc","line":202,"in_reply_to":"c28e18e5_c3a2788f","updated":"2022-05-10 13:10:10.000000000","message":"its technially optional and not required by ci.\n\nif included it can be left empty but we do not assert that it is present","commit_id":"28fce254ce7741d4c793f3d65dbe0ee54edba744"},{"author":{"_account_id":12404,"name":"Rico Lin","email":"ricolin@ricolky.com","username":"rico.lin"},"change_message_id":"53fecc273758c021520dc5e5fe5c955800861c94","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":5,"id":"4180ae27_d38fb832","line":202,"in_reply_to":"eae54c66_56f287dc","updated":"2022-05-13 10:24:17.000000000","message":"Ack","commit_id":"28fce254ce7741d4c793f3d65dbe0ee54edba744"},{"author":{"_account_id":15334,"name":"Stephen Finucane","display_name":"stephenfin","email":"stephenfin@redhat.com","username":"sfinucan"},"change_message_id":"545018e9a3f11cf5f301354a8e9d7a74c09e7600","unresolved":true,"context_lines":[{"line_number":18,"context_line":""},{"line_number":19,"context_line":"Currently it is possible to use libvirt to expose vIOMMU to a guest when using"},{"line_number":20,"context_line":"the x86 Q35 or ARM virt machine types. On some platfroms such as AArch64 an"},{"line_number":21,"context_line":"vIOMMU is required to fully supprot pci passthough and in general it can enable"},{"line_number":22,"context_line":"use fo vfio-pci in guest that require it. Nova does not currently expose vIOMMU"},{"line_number":23,"context_line":"functionality to operators or users."},{"line_number":24,"context_line":""}],"source_content_type":"text/x-rst","patch_set":7,"id":"a63742bb_78ce4319","line":21,"range":{"start_line":21,"start_character":36,"end_line":21,"end_character":39},"updated":"2022-05-13 11:16:09.000000000","message":"nit: PCI","commit_id":"a73038faa3867aac2e9091a2b7a5017b5c860e10"},{"author":{"_account_id":15334,"name":"Stephen Finucane","display_name":"stephenfin","email":"stephenfin@redhat.com","username":"sfinucan"},"change_message_id":"545018e9a3f11cf5f301354a8e9d7a74c09e7600","unresolved":true,"context_lines":[{"line_number":18,"context_line":""},{"line_number":19,"context_line":"Currently it is possible to use libvirt to expose vIOMMU to a guest when using"},{"line_number":20,"context_line":"the x86 Q35 or ARM virt machine types. On some platfroms such as AArch64 an"},{"line_number":21,"context_line":"vIOMMU is required to fully supprot pci passthough and in general it can enable"},{"line_number":22,"context_line":"use fo vfio-pci in guest that require it. Nova does not currently expose vIOMMU"},{"line_number":23,"context_line":"functionality to operators or users."},{"line_number":24,"context_line":""}],"source_content_type":"text/x-rst","patch_set":7,"id":"b5555d83_277dcfb7","line":21,"range":{"start_line":21,"start_character":28,"end_line":21,"end_character":35},"updated":"2022-05-13 11:16:09.000000000","message":"nit: support","commit_id":"a73038faa3867aac2e9091a2b7a5017b5c860e10"},{"author":{"_account_id":12404,"name":"Rico Lin","email":"ricolin@ricolky.com","username":"rico.lin"},"change_message_id":"273894cde9ddf81127dac932a39071796ce89c31","unresolved":false,"context_lines":[{"line_number":18,"context_line":""},{"line_number":19,"context_line":"Currently it is possible to use libvirt to expose vIOMMU to a guest when using"},{"line_number":20,"context_line":"the x86 Q35 or ARM virt machine types. On some platfroms such as AArch64 an"},{"line_number":21,"context_line":"vIOMMU is required to fully supprot pci passthough and in general it can enable"},{"line_number":22,"context_line":"use fo vfio-pci in guest that require it. Nova does not currently expose vIOMMU"},{"line_number":23,"context_line":"functionality to operators or users."},{"line_number":24,"context_line":""}],"source_content_type":"text/x-rst","patch_set":7,"id":"63fb795c_0b38d010","line":21,"range":{"start_line":21,"start_character":36,"end_line":21,"end_character":39},"in_reply_to":"a63742bb_78ce4319","updated":"2022-05-17 07:34:28.000000000","message":"Done","commit_id":"a73038faa3867aac2e9091a2b7a5017b5c860e10"},{"author":{"_account_id":12404,"name":"Rico Lin","email":"ricolin@ricolky.com","username":"rico.lin"},"change_message_id":"273894cde9ddf81127dac932a39071796ce89c31","unresolved":false,"context_lines":[{"line_number":18,"context_line":""},{"line_number":19,"context_line":"Currently it is possible to use libvirt to expose vIOMMU to a guest when using"},{"line_number":20,"context_line":"the x86 Q35 or ARM virt machine types. On some platfroms such as AArch64 an"},{"line_number":21,"context_line":"vIOMMU is required to fully supprot pci passthough and in general it can enable"},{"line_number":22,"context_line":"use fo vfio-pci in guest that require it. Nova does not currently expose vIOMMU"},{"line_number":23,"context_line":"functionality to operators or users."},{"line_number":24,"context_line":""}],"source_content_type":"text/x-rst","patch_set":7,"id":"01460655_79ea0e2d","line":21,"range":{"start_line":21,"start_character":28,"end_line":21,"end_character":35},"in_reply_to":"b5555d83_277dcfb7","updated":"2022-05-17 07:34:28.000000000","message":"Done","commit_id":"a73038faa3867aac2e9091a2b7a5017b5c860e10"},{"author":{"_account_id":15334,"name":"Stephen Finucane","display_name":"stephenfin","email":"stephenfin@redhat.com","username":"sfinucan"},"change_message_id":"545018e9a3f11cf5f301354a8e9d7a74c09e7600","unresolved":true,"context_lines":[{"line_number":19,"context_line":"Currently it is possible to use libvirt to expose vIOMMU to a guest when using"},{"line_number":20,"context_line":"the x86 Q35 or ARM virt machine types. On some platfroms such as AArch64 an"},{"line_number":21,"context_line":"vIOMMU is required to fully supprot pci passthough and in general it can enable"},{"line_number":22,"context_line":"use fo vfio-pci in guest that require it. Nova does not currently expose vIOMMU"},{"line_number":23,"context_line":"functionality to operators or users."},{"line_number":24,"context_line":""},{"line_number":25,"context_line":"Use Cases"}],"source_content_type":"text/x-rst","patch_set":7,"id":"d232f500_83d7f3e1","line":22,"range":{"start_line":22,"start_character":19,"end_line":22,"end_character":24},"updated":"2022-05-13 11:16:09.000000000","message":"nit: guests","commit_id":"a73038faa3867aac2e9091a2b7a5017b5c860e10"},{"author":{"_account_id":15334,"name":"Stephen Finucane","display_name":"stephenfin","email":"stephenfin@redhat.com","username":"sfinucan"},"change_message_id":"545018e9a3f11cf5f301354a8e9d7a74c09e7600","unresolved":true,"context_lines":[{"line_number":19,"context_line":"Currently it is possible to use libvirt to expose vIOMMU to a guest when using"},{"line_number":20,"context_line":"the x86 Q35 or ARM virt machine types. On some platfroms such as AArch64 an"},{"line_number":21,"context_line":"vIOMMU is required to fully supprot pci passthough and in general it can enable"},{"line_number":22,"context_line":"use fo vfio-pci in guest that require it. Nova does not currently expose vIOMMU"},{"line_number":23,"context_line":"functionality to operators or users."},{"line_number":24,"context_line":""},{"line_number":25,"context_line":"Use Cases"}],"source_content_type":"text/x-rst","patch_set":7,"id":"a2256b8a_239f0047","line":22,"range":{"start_line":22,"start_character":4,"end_line":22,"end_character":6},"updated":"2022-05-13 11:16:09.000000000","message":"nit: of","commit_id":"a73038faa3867aac2e9091a2b7a5017b5c860e10"},{"author":{"_account_id":12404,"name":"Rico Lin","email":"ricolin@ricolky.com","username":"rico.lin"},"change_message_id":"273894cde9ddf81127dac932a39071796ce89c31","unresolved":false,"context_lines":[{"line_number":19,"context_line":"Currently it is possible to use libvirt to expose vIOMMU to a guest when using"},{"line_number":20,"context_line":"the x86 Q35 or ARM virt machine types. On some platfroms such as AArch64 an"},{"line_number":21,"context_line":"vIOMMU is required to fully supprot pci passthough and in general it can enable"},{"line_number":22,"context_line":"use fo vfio-pci in guest that require it. Nova does not currently expose vIOMMU"},{"line_number":23,"context_line":"functionality to operators or users."},{"line_number":24,"context_line":""},{"line_number":25,"context_line":"Use Cases"}],"source_content_type":"text/x-rst","patch_set":7,"id":"cf779d0e_d5ece41e","line":22,"range":{"start_line":22,"start_character":4,"end_line":22,"end_character":6},"in_reply_to":"a2256b8a_239f0047","updated":"2022-05-17 07:34:28.000000000","message":"Done","commit_id":"a73038faa3867aac2e9091a2b7a5017b5c860e10"},{"author":{"_account_id":12404,"name":"Rico Lin","email":"ricolin@ricolky.com","username":"rico.lin"},"change_message_id":"273894cde9ddf81127dac932a39071796ce89c31","unresolved":false,"context_lines":[{"line_number":19,"context_line":"Currently it is possible to use libvirt to expose vIOMMU to a guest when using"},{"line_number":20,"context_line":"the x86 Q35 or ARM virt machine types. On some platfroms such as AArch64 an"},{"line_number":21,"context_line":"vIOMMU is required to fully supprot pci passthough and in general it can enable"},{"line_number":22,"context_line":"use fo vfio-pci in guest that require it. Nova does not currently expose vIOMMU"},{"line_number":23,"context_line":"functionality to operators or users."},{"line_number":24,"context_line":""},{"line_number":25,"context_line":"Use Cases"}],"source_content_type":"text/x-rst","patch_set":7,"id":"7ce9d99b_82cb5234","line":22,"range":{"start_line":22,"start_character":19,"end_line":22,"end_character":24},"in_reply_to":"d232f500_83d7f3e1","updated":"2022-05-17 07:34:28.000000000","message":"Done","commit_id":"a73038faa3867aac2e9091a2b7a5017b5c860e10"},{"author":{"_account_id":15334,"name":"Stephen Finucane","display_name":"stephenfin","email":"stephenfin@redhat.com","username":"sfinucan"},"change_message_id":"545018e9a3f11cf5f301354a8e9d7a74c09e7600","unresolved":true,"context_lines":[{"line_number":47,"context_line":""},{"line_number":48,"context_line":"* Add following attribute to image property and extra_specs:"},{"line_number":49,"context_line":""},{"line_number":50,"context_line":"  ** hw_viommu_model (for image property) and"},{"line_number":51,"context_line":"     hw:viommu_model (for extra_specs):"},{"line_number":52,"context_line":"     support values none|intel|smmuv3|virtio"},{"line_number":53,"context_line":""}],"source_content_type":"text/x-rst","patch_set":7,"id":"466f109a_af81dd32","line":50,"range":{"start_line":50,"start_character":2,"end_line":50,"end_character":4},"updated":"2022-05-13 11:16:09.000000000","message":"This isn\u0027t how you do lists in rST. You want a single asterisk here","commit_id":"a73038faa3867aac2e9091a2b7a5017b5c860e10"},{"author":{"_account_id":15334,"name":"Stephen Finucane","display_name":"stephenfin","email":"stephenfin@redhat.com","username":"sfinucan"},"change_message_id":"545018e9a3f11cf5f301354a8e9d7a74c09e7600","unresolved":true,"context_lines":[{"line_number":47,"context_line":""},{"line_number":48,"context_line":"* Add following attribute to image property and extra_specs:"},{"line_number":49,"context_line":""},{"line_number":50,"context_line":"  ** hw_viommu_model (for image property) and"},{"line_number":51,"context_line":"     hw:viommu_model (for extra_specs):"},{"line_number":52,"context_line":"     support values none|intel|smmuv3|virtio"},{"line_number":53,"context_line":""}],"source_content_type":"text/x-rst","patch_set":7,"id":"f9b7526b_b28b1337","line":50,"range":{"start_line":50,"start_character":5,"end_line":50,"end_character":20},"updated":"2022-05-13 11:16:09.000000000","message":"nit: ``code`` (for the rest of the extra specs too)","commit_id":"a73038faa3867aac2e9091a2b7a5017b5c860e10"},{"author":{"_account_id":12404,"name":"Rico Lin","email":"ricolin@ricolky.com","username":"rico.lin"},"change_message_id":"273894cde9ddf81127dac932a39071796ce89c31","unresolved":false,"context_lines":[{"line_number":47,"context_line":""},{"line_number":48,"context_line":"* Add following attribute to image property and extra_specs:"},{"line_number":49,"context_line":""},{"line_number":50,"context_line":"  ** hw_viommu_model (for image property) and"},{"line_number":51,"context_line":"     hw:viommu_model (for extra_specs):"},{"line_number":52,"context_line":"     support values none|intel|smmuv3|virtio"},{"line_number":53,"context_line":""}],"source_content_type":"text/x-rst","patch_set":7,"id":"e1f47ae7_5fbadbe4","line":50,"range":{"start_line":50,"start_character":2,"end_line":50,"end_character":4},"in_reply_to":"466f109a_af81dd32","updated":"2022-05-17 07:34:28.000000000","message":"Done","commit_id":"a73038faa3867aac2e9091a2b7a5017b5c860e10"},{"author":{"_account_id":12404,"name":"Rico Lin","email":"ricolin@ricolky.com","username":"rico.lin"},"change_message_id":"273894cde9ddf81127dac932a39071796ce89c31","unresolved":false,"context_lines":[{"line_number":47,"context_line":""},{"line_number":48,"context_line":"* Add following attribute to image property and extra_specs:"},{"line_number":49,"context_line":""},{"line_number":50,"context_line":"  ** hw_viommu_model (for image property) and"},{"line_number":51,"context_line":"     hw:viommu_model (for extra_specs):"},{"line_number":52,"context_line":"     support values none|intel|smmuv3|virtio"},{"line_number":53,"context_line":""}],"source_content_type":"text/x-rst","patch_set":7,"id":"aa87ad82_53dfa4c9","line":50,"range":{"start_line":50,"start_character":5,"end_line":50,"end_character":20},"in_reply_to":"f9b7526b_b28b1337","updated":"2022-05-17 07:34:28.000000000","message":"Done","commit_id":"a73038faa3867aac2e9091a2b7a5017b5c860e10"},{"author":{"_account_id":15334,"name":"Stephen Finucane","display_name":"stephenfin","email":"stephenfin@redhat.com","username":"sfinucan"},"change_message_id":"545018e9a3f11cf5f301354a8e9d7a74c09e7600","unresolved":true,"context_lines":[{"line_number":49,"context_line":""},{"line_number":50,"context_line":"  ** hw_viommu_model (for image property) and"},{"line_number":51,"context_line":"     hw:viommu_model (for extra_specs):"},{"line_number":52,"context_line":"     support values none|intel|smmuv3|virtio"},{"line_number":53,"context_line":""},{"line_number":54,"context_line":"  ** hw_viommu_aw_bits (for image property) and"},{"line_number":55,"context_line":"     hw:viommu_aw_bits (for extra_specs): support values: positive integer"}],"source_content_type":"text/x-rst","patch_set":7,"id":"142e1568_4118f696","line":52,"updated":"2022-05-13 11:16:09.000000000","message":"What\u0027s this for? Why do end users need to be concerned with it? Can\u0027t we choose a sensible default for users?","commit_id":"a73038faa3867aac2e9091a2b7a5017b5c860e10"},{"author":{"_account_id":15334,"name":"Stephen Finucane","display_name":"stephenfin","email":"stephenfin@redhat.com","username":"sfinucan"},"change_message_id":"b90f3fc3fa807053bcaa092b941c2a22c5a56357","unresolved":true,"context_lines":[{"line_number":49,"context_line":""},{"line_number":50,"context_line":"  ** hw_viommu_model (for image property) and"},{"line_number":51,"context_line":"     hw:viommu_model (for extra_specs):"},{"line_number":52,"context_line":"     support values none|intel|smmuv3|virtio"},{"line_number":53,"context_line":""},{"line_number":54,"context_line":"  ** hw_viommu_aw_bits (for image property) and"},{"line_number":55,"context_line":"     hw:viommu_aw_bits (for extra_specs): support values: positive integer"}],"source_content_type":"text/x-rst","patch_set":7,"id":"4f4f55ae_305b39c1","line":52,"in_reply_to":"142e1568_4118f696","updated":"2022-05-18 15:55:17.000000000","message":"Discussed with sean-k-mooney on IRC. This appears to be necessary because different libvirt versions support different models. However, we could put this logic into the driver itself, i.e. check what the libvirt version is and use \u0027virtio\u0027 if libvirt \u003e 8.3.0 else \u0027intel\u0027/\u0027smmuv3\u0027 for Intel/ARM respectively. So long as we record the model used in system metadata (to avoid changing the model during hard reboots or cold migrations), we should be fine. I would much rather do this than force operators to determine this stuff manually (and change it in the future if/when they upgrade libvirt).","commit_id":"a73038faa3867aac2e9091a2b7a5017b5c860e10"},{"author":{"_account_id":1004,"name":"Mohammed Naser","email":"mnaser@vexxhost.com","username":"mnaser"},"change_message_id":"63f7169c5e650e72c2754100aa6a1bf54eb04301","unresolved":true,"context_lines":[{"line_number":49,"context_line":""},{"line_number":50,"context_line":"  ** hw_viommu_model (for image property) and"},{"line_number":51,"context_line":"     hw:viommu_model (for extra_specs):"},{"line_number":52,"context_line":"     support values none|intel|smmuv3|virtio"},{"line_number":53,"context_line":""},{"line_number":54,"context_line":"  ** hw_viommu_aw_bits (for image property) and"},{"line_number":55,"context_line":"     hw:viommu_aw_bits (for extra_specs): support values: positive integer"}],"source_content_type":"text/x-rst","patch_set":7,"id":"d5388074_4baacdcd","line":52,"in_reply_to":"142e1568_4118f696","updated":"2022-05-16 15:26:49.000000000","message":"In our case, our customer has tested their stuff to work with the Intel IOMMU, so it would be nice to expose which one they can choose (I guess this would be the same as allowing different storage backends like virtio-scsi or virtio-blk)","commit_id":"a73038faa3867aac2e9091a2b7a5017b5c860e10"},{"author":{"_account_id":15334,"name":"Stephen Finucane","display_name":"stephenfin","email":"stephenfin@redhat.com","username":"sfinucan"},"change_message_id":"5701936d9daf5e55694704a134b86ea137e77610","unresolved":true,"context_lines":[{"line_number":49,"context_line":""},{"line_number":50,"context_line":"  ** hw_viommu_model (for image property) and"},{"line_number":51,"context_line":"     hw:viommu_model (for extra_specs):"},{"line_number":52,"context_line":"     support values none|intel|smmuv3|virtio"},{"line_number":53,"context_line":""},{"line_number":54,"context_line":"  ** hw_viommu_aw_bits (for image property) and"},{"line_number":55,"context_line":"     hw:viommu_aw_bits (for extra_specs): support values: positive integer"}],"source_content_type":"text/x-rst","patch_set":7,"id":"b62c368c_ca69b818","line":52,"in_reply_to":"4f4f55ae_305b39c1","updated":"2022-05-18 16:11:38.000000000","message":"Whoops, that last comment of mine should have been posted a few days ago.\n\n@mnaser That feels very...internally. I\u0027d argue that exposing even the virtio-scsi/virtio-blk was a mistake as that knob is far too low-level (not to mention far too libvirt-specific) to expose in a cloud environment. However, at least for those there are performance/scalability tradeoffs. I\u0027ve still no idea what the equivalent is for this. Does anyone?","commit_id":"a73038faa3867aac2e9091a2b7a5017b5c860e10"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"61e1bde94394dc3ff490ff5ad34a22707aa6fc9c","unresolved":false,"context_lines":[{"line_number":49,"context_line":""},{"line_number":50,"context_line":"  ** hw_viommu_model (for image property) and"},{"line_number":51,"context_line":"     hw:viommu_model (for extra_specs):"},{"line_number":52,"context_line":"     support values none|intel|smmuv3|virtio"},{"line_number":53,"context_line":""},{"line_number":54,"context_line":"  ** hw_viommu_aw_bits (for image property) and"},{"line_number":55,"context_line":"     hw:viommu_aw_bits (for extra_specs): support values: positive integer"}],"source_content_type":"text/x-rst","patch_set":7,"id":"445792d5_4adf8db6","line":52,"in_reply_to":"972c95a2_61e378b2","updated":"2022-05-30 09:41:18.000000000","message":"Done","commit_id":"a73038faa3867aac2e9091a2b7a5017b5c860e10"},{"author":{"_account_id":12404,"name":"Rico Lin","email":"ricolin@ricolky.com","username":"rico.lin"},"change_message_id":"9d9075cf30204b21c1b9066f4e5a7ed1486eab17","unresolved":false,"context_lines":[{"line_number":49,"context_line":""},{"line_number":50,"context_line":"  ** hw_viommu_model (for image property) and"},{"line_number":51,"context_line":"     hw:viommu_model (for extra_specs):"},{"line_number":52,"context_line":"     support values none|intel|smmuv3|virtio"},{"line_number":53,"context_line":""},{"line_number":54,"context_line":"  ** hw_viommu_aw_bits (for image property) and"},{"line_number":55,"context_line":"     hw:viommu_aw_bits (for extra_specs): support values: positive integer"}],"source_content_type":"text/x-rst","patch_set":7,"id":"d9c796f5_4203b3b1","line":52,"in_reply_to":"972c95a2_61e378b2","updated":"2022-05-30 11:26:35.000000000","message":"Done","commit_id":"a73038faa3867aac2e9091a2b7a5017b5c860e10"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"6ca4346f76ed869dcabfc98873af87b42c1d4dee","unresolved":true,"context_lines":[{"line_number":49,"context_line":""},{"line_number":50,"context_line":"  ** hw_viommu_model (for image property) and"},{"line_number":51,"context_line":"     hw:viommu_model (for extra_specs):"},{"line_number":52,"context_line":"     support values none|intel|smmuv3|virtio"},{"line_number":53,"context_line":""},{"line_number":54,"context_line":"  ** hw_viommu_aw_bits (for image property) and"},{"line_number":55,"context_line":"     hw:viommu_aw_bits (for extra_specs): support values: positive integer"}],"source_content_type":"text/x-rst","patch_set":7,"id":"972c95a2_61e378b2","line":52,"in_reply_to":"b62c368c_ca69b818","updated":"2022-05-18 17:54:59.000000000","message":"well vmware and hyperv also use those models so its not entirly libvirt speciifc and since it influcince the driver you need i think its good to expose.\n\nfor the recorred i want to expose the model explcitly.\ni think this *is* the correct abstraction.","commit_id":"a73038faa3867aac2e9091a2b7a5017b5c860e10"},{"author":{"_account_id":15334,"name":"Stephen Finucane","display_name":"stephenfin","email":"stephenfin@redhat.com","username":"sfinucan"},"change_message_id":"545018e9a3f11cf5f301354a8e9d7a74c09e7600","unresolved":true,"context_lines":[{"line_number":52,"context_line":"     support values none|intel|smmuv3|virtio"},{"line_number":53,"context_line":""},{"line_number":54,"context_line":"  ** hw_viommu_aw_bits (for image property) and"},{"line_number":55,"context_line":"     hw:viommu_aw_bits (for extra_specs): support values: positive integer"},{"line_number":56,"context_line":""},{"line_number":57,"context_line":"  These attributes are options for `LibvirtConfigGuestIOMMU`, More"},{"line_number":58,"context_line":"  information for them can be found in `libvirt format domain`_."}],"source_content_type":"text/x-rst","patch_set":7,"id":"b008ccb2_0be939f1","line":55,"updated":"2022-05-13 11:16:09.000000000","message":"Ditto. What\u0027s this for? Why do end users need to be concerned with it? Can\u0027t we choose a sensible default for users?","commit_id":"a73038faa3867aac2e9091a2b7a5017b5c860e10"},{"author":{"_account_id":1004,"name":"Mohammed Naser","email":"mnaser@vexxhost.com","username":"mnaser"},"change_message_id":"585d8375bf5634c0a655870c8f11379eebbb3931","unresolved":false,"context_lines":[{"line_number":52,"context_line":"     support values none|intel|smmuv3|virtio"},{"line_number":53,"context_line":""},{"line_number":54,"context_line":"  ** hw_viommu_aw_bits (for image property) and"},{"line_number":55,"context_line":"     hw:viommu_aw_bits (for extra_specs): support values: positive integer"},{"line_number":56,"context_line":""},{"line_number":57,"context_line":"  These attributes are options for `LibvirtConfigGuestIOMMU`, More"},{"line_number":58,"context_line":"  information for them can be found in `libvirt format domain`_."}],"source_content_type":"text/x-rst","patch_set":7,"id":"08ae3b8a_33d643af","line":55,"in_reply_to":"25cec4e8_de2a1902","updated":"2022-05-23 16:33:41.000000000","message":"let\u0027s resolve this for now and keep the discussion below.","commit_id":"a73038faa3867aac2e9091a2b7a5017b5c860e10"},{"author":{"_account_id":15334,"name":"Stephen Finucane","display_name":"stephenfin","email":"stephenfin@redhat.com","username":"sfinucan"},"change_message_id":"5701936d9daf5e55694704a134b86ea137e77610","unresolved":true,"context_lines":[{"line_number":52,"context_line":"     support values none|intel|smmuv3|virtio"},{"line_number":53,"context_line":""},{"line_number":54,"context_line":"  ** hw_viommu_aw_bits (for image property) and"},{"line_number":55,"context_line":"     hw:viommu_aw_bits (for extra_specs): support values: positive integer"},{"line_number":56,"context_line":""},{"line_number":57,"context_line":"  These attributes are options for `LibvirtConfigGuestIOMMU`, More"},{"line_number":58,"context_line":"  information for them can be found in `libvirt format domain`_."}],"source_content_type":"text/x-rst","patch_set":7,"id":"c2a9779c_be2a0e7f","line":55,"in_reply_to":"4b2bf26f_eeb1f8fd","updated":"2022-05-18 16:11:38.000000000","message":"Can we bump it by default then? We\u0027re supposed to be opinionated so we *should* have an understanding/opinion on this stuff 😅","commit_id":"a73038faa3867aac2e9091a2b7a5017b5c860e10"},{"author":{"_account_id":1004,"name":"Mohammed Naser","email":"mnaser@vexxhost.com","username":"mnaser"},"change_message_id":"a01ef177cf1c181e82738cf48cd9b6e5dcbf3c5e","unresolved":true,"context_lines":[{"line_number":52,"context_line":"     support values none|intel|smmuv3|virtio"},{"line_number":53,"context_line":""},{"line_number":54,"context_line":"  ** hw_viommu_aw_bits (for image property) and"},{"line_number":55,"context_line":"     hw:viommu_aw_bits (for extra_specs): support values: positive integer"},{"line_number":56,"context_line":""},{"line_number":57,"context_line":"  These attributes are options for `LibvirtConfigGuestIOMMU`, More"},{"line_number":58,"context_line":"  information for them can be found in `libvirt format domain`_."}],"source_content_type":"text/x-rst","patch_set":7,"id":"25cec4e8_de2a1902","line":55,"in_reply_to":"636d6eab_71eb51cc","updated":"2022-05-23 16:31:01.000000000","message":"I did a bit of digging, it looks like there is currently only two choices for this:\n\nhttps://github.com/qemu/qemu/commit/37f51384ae05bd50f83308339dbffa3e78404874\n\nOnly 39 and 48 are the two possible numbers (for Intel IOMMU).","commit_id":"a73038faa3867aac2e9091a2b7a5017b5c860e10"},{"author":{"_account_id":1004,"name":"Mohammed Naser","email":"mnaser@vexxhost.com","username":"mnaser"},"change_message_id":"63f7169c5e650e72c2754100aa6a1bf54eb04301","unresolved":true,"context_lines":[{"line_number":52,"context_line":"     support values none|intel|smmuv3|virtio"},{"line_number":53,"context_line":""},{"line_number":54,"context_line":"  ** hw_viommu_aw_bits (for image property) and"},{"line_number":55,"context_line":"     hw:viommu_aw_bits (for extra_specs): support values: positive integer"},{"line_number":56,"context_line":""},{"line_number":57,"context_line":"  These attributes are options for `LibvirtConfigGuestIOMMU`, More"},{"line_number":58,"context_line":"  information for them can be found in `libvirt format domain`_."}],"source_content_type":"text/x-rst","patch_set":7,"id":"4b2bf26f_eeb1f8fd","line":55,"in_reply_to":"b008ccb2_0be939f1","updated":"2022-05-16 15:26:49.000000000","message":"Depending on the card that is passed through, it might cause issues.  In our case, we have to bump it or otherwise we get this:\n\n  DMAR: intel_iommu_map: iommu width (39) is not sufficient for the mapped address (7f8871800000)\n\nNow, if you ask me why/what this all means, I wouldn\u0027t know that far. 😎","commit_id":"a73038faa3867aac2e9091a2b7a5017b5c860e10"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"6ca4346f76ed869dcabfc98873af87b42c1d4dee","unresolved":true,"context_lines":[{"line_number":52,"context_line":"     support values none|intel|smmuv3|virtio"},{"line_number":53,"context_line":""},{"line_number":54,"context_line":"  ** hw_viommu_aw_bits (for image property) and"},{"line_number":55,"context_line":"     hw:viommu_aw_bits (for extra_specs): support values: positive integer"},{"line_number":56,"context_line":""},{"line_number":57,"context_line":"  These attributes are options for `LibvirtConfigGuestIOMMU`, More"},{"line_number":58,"context_line":"  information for them can be found in `libvirt format domain`_."}],"source_content_type":"text/x-rst","patch_set":7,"id":"636d6eab_71eb51cc","line":55,"in_reply_to":"c2a9779c_be2a0e7f","updated":"2022-05-18 17:54:59.000000000","message":"ya i dont know i feel like this might be speficic to the host and the machine type.\n\nthis really feels to low level to me but i dont see a beter way to make this work.","commit_id":"a73038faa3867aac2e9091a2b7a5017b5c860e10"},{"author":{"_account_id":15334,"name":"Stephen Finucane","display_name":"stephenfin","email":"stephenfin@redhat.com","username":"sfinucan"},"change_message_id":"545018e9a3f11cf5f301354a8e9d7a74c09e7600","unresolved":true,"context_lines":[{"line_number":62,"context_line":"* Add hw_locked_memory for image property and hw:locked_memory for extra specs."},{"line_number":63,"context_line":"  This will make sure ``locked`` element is present in the ``memoryBacking``,"},{"line_number":64,"context_line":"  but only allow it if you have also set hw:mem_page_size."},{"line_number":65,"context_line":"  Here is a reference to related issue `MEMLOCK_RLIMIT`_."},{"line_number":66,"context_line":""},{"line_number":67,"context_line":"* For eim attribute in `LibvirtConfigGuestIOMMU`:"},{"line_number":68,"context_line":"  this will not exposed to end user, but will directly enabled if machine type"}],"source_content_type":"text/x-rst","patch_set":7,"id":"ab9a5526_efd643c5","line":65,"updated":"2022-05-13 11:16:09.000000000","message":"You need to go into a little more detail about why memory locking is necessary now. This won\u0027t be wasted effort - we can eventually forklift whatever you write here into end-user documentation.","commit_id":"a73038faa3867aac2e9091a2b7a5017b5c860e10"},{"author":{"_account_id":12404,"name":"Rico Lin","email":"ricolin@ricolky.com","username":"rico.lin"},"change_message_id":"273894cde9ddf81127dac932a39071796ce89c31","unresolved":false,"context_lines":[{"line_number":62,"context_line":"* Add hw_locked_memory for image property and hw:locked_memory for extra specs."},{"line_number":63,"context_line":"  This will make sure ``locked`` element is present in the ``memoryBacking``,"},{"line_number":64,"context_line":"  but only allow it if you have also set hw:mem_page_size."},{"line_number":65,"context_line":"  Here is a reference to related issue `MEMLOCK_RLIMIT`_."},{"line_number":66,"context_line":""},{"line_number":67,"context_line":"* For eim attribute in `LibvirtConfigGuestIOMMU`:"},{"line_number":68,"context_line":"  this will not exposed to end user, but will directly enabled if machine type"}],"source_content_type":"text/x-rst","patch_set":7,"id":"19825d1f_2fcbde65","line":65,"in_reply_to":"95e00a30_c5238b55","updated":"2022-05-17 07:34:28.000000000","message":"Ack","commit_id":"a73038faa3867aac2e9091a2b7a5017b5c860e10"},{"author":{"_account_id":1004,"name":"Mohammed Naser","email":"mnaser@vexxhost.com","username":"mnaser"},"change_message_id":"63f7169c5e650e72c2754100aa6a1bf54eb04301","unresolved":true,"context_lines":[{"line_number":62,"context_line":"* Add hw_locked_memory for image property and hw:locked_memory for extra specs."},{"line_number":63,"context_line":"  This will make sure ``locked`` element is present in the ``memoryBacking``,"},{"line_number":64,"context_line":"  but only allow it if you have also set hw:mem_page_size."},{"line_number":65,"context_line":"  Here is a reference to related issue `MEMLOCK_RLIMIT`_."},{"line_number":66,"context_line":""},{"line_number":67,"context_line":"* For eim attribute in `LibvirtConfigGuestIOMMU`:"},{"line_number":68,"context_line":"  this will not exposed to end user, but will directly enabled if machine type"}],"source_content_type":"text/x-rst","patch_set":7,"id":"95e00a30_c5238b55","line":65,"in_reply_to":"ab9a5526_efd643c5","updated":"2022-05-16 15:26:49.000000000","message":"FYI for Rico, this is mainly explained in some parts above where enabling this will disable the RLIMITs for the VM in cases where you have a large number of passed through devices.","commit_id":"a73038faa3867aac2e9091a2b7a5017b5c860e10"},{"author":{"_account_id":15334,"name":"Stephen Finucane","display_name":"stephenfin","email":"stephenfin@redhat.com","username":"sfinucan"},"change_message_id":"545018e9a3f11cf5f301354a8e9d7a74c09e7600","unresolved":false,"context_lines":[{"line_number":72,"context_line":"  can be used to configure Extended Interrupt Mode."},{"line_number":73,"context_line":"  A q35 domain with split I/O APIC (as described in hypervisor features),"},{"line_number":74,"context_line":"  and both interrupt remapping and EIM turned on for the IOMMU, will be"},{"line_number":75,"context_line":"  able to use more than 255 vCPUs. Since 3.4.0 (QEMU/KVM only)."},{"line_number":76,"context_line":""},{"line_number":77,"context_line":"* Provide iommu model triat for each viommu model."},{"line_number":78,"context_line":""}],"source_content_type":"text/x-rst","patch_set":7,"id":"38822cea_92cf2c47","line":75,"updated":"2022-05-13 11:16:09.000000000","message":"This is helpful, thanks. Please do this for the other options 😊","commit_id":"a73038faa3867aac2e9091a2b7a5017b5c860e10"},{"author":{"_account_id":15334,"name":"Stephen Finucane","display_name":"stephenfin","email":"stephenfin@redhat.com","username":"sfinucan"},"change_message_id":"545018e9a3f11cf5f301354a8e9d7a74c09e7600","unresolved":true,"context_lines":[{"line_number":74,"context_line":"  and both interrupt remapping and EIM turned on for the IOMMU, will be"},{"line_number":75,"context_line":"  able to use more than 255 vCPUs. Since 3.4.0 (QEMU/KVM only)."},{"line_number":76,"context_line":""},{"line_number":77,"context_line":"* Provide iommu model triat for each viommu model."},{"line_number":78,"context_line":""},{"line_number":79,"context_line":"* Add hw_viommu_model to request_filter, this will extend the"},{"line_number":80,"context_line":"  transform_image_metadata prefilter to select host with the correct model."}],"source_content_type":"text/x-rst","patch_set":7,"id":"a4af09eb_69ae8cad","line":77,"range":{"start_line":77,"start_character":22,"end_line":77,"end_character":27},"updated":"2022-05-13 11:16:09.000000000","message":"trait","commit_id":"a73038faa3867aac2e9091a2b7a5017b5c860e10"},{"author":{"_account_id":12404,"name":"Rico Lin","email":"ricolin@ricolky.com","username":"rico.lin"},"change_message_id":"273894cde9ddf81127dac932a39071796ce89c31","unresolved":false,"context_lines":[{"line_number":74,"context_line":"  and both interrupt remapping and EIM turned on for the IOMMU, will be"},{"line_number":75,"context_line":"  able to use more than 255 vCPUs. Since 3.4.0 (QEMU/KVM only)."},{"line_number":76,"context_line":""},{"line_number":77,"context_line":"* Provide iommu model triat for each viommu model."},{"line_number":78,"context_line":""},{"line_number":79,"context_line":"* Add hw_viommu_model to request_filter, this will extend the"},{"line_number":80,"context_line":"  transform_image_metadata prefilter to select host with the correct model."}],"source_content_type":"text/x-rst","patch_set":7,"id":"dad20e6b_ff24c86f","line":77,"range":{"start_line":77,"start_character":22,"end_line":77,"end_character":27},"in_reply_to":"a4af09eb_69ae8cad","updated":"2022-05-17 07:34:28.000000000","message":"Done","commit_id":"a73038faa3867aac2e9091a2b7a5017b5c860e10"},{"author":{"_account_id":15334,"name":"Stephen Finucane","display_name":"stephenfin","email":"stephenfin@redhat.com","username":"sfinucan"},"change_message_id":"545018e9a3f11cf5f301354a8e9d7a74c09e7600","unresolved":true,"context_lines":[{"line_number":79,"context_line":"* Add hw_viommu_model to request_filter, this will extend the"},{"line_number":80,"context_line":"  transform_image_metadata prefilter to select host with the correct model."},{"line_number":81,"context_line":""},{"line_number":82,"context_line":"* Provide new compute COMPUTE_IOMMU_MODEL_* capablity trait for each model it"},{"line_number":83,"context_line":"  supports in driver."},{"line_number":84,"context_line":""},{"line_number":85,"context_line":".. _`libvirt format domain`: https://libvirt.org/formatdomain.html#iommu-devices"}],"source_content_type":"text/x-rst","patch_set":7,"id":"a65c8c4f_ec2cfd3a","line":82,"range":{"start_line":82,"start_character":22,"end_line":82,"end_character":43},"updated":"2022-05-13 11:16:09.000000000","message":"``code``","commit_id":"a73038faa3867aac2e9091a2b7a5017b5c860e10"},{"author":{"_account_id":12404,"name":"Rico Lin","email":"ricolin@ricolky.com","username":"rico.lin"},"change_message_id":"273894cde9ddf81127dac932a39071796ce89c31","unresolved":false,"context_lines":[{"line_number":79,"context_line":"* Add hw_viommu_model to request_filter, this will extend the"},{"line_number":80,"context_line":"  transform_image_metadata prefilter to select host with the correct model."},{"line_number":81,"context_line":""},{"line_number":82,"context_line":"* Provide new compute COMPUTE_IOMMU_MODEL_* capablity trait for each model it"},{"line_number":83,"context_line":"  supports in driver."},{"line_number":84,"context_line":""},{"line_number":85,"context_line":".. _`libvirt format domain`: https://libvirt.org/formatdomain.html#iommu-devices"}],"source_content_type":"text/x-rst","patch_set":7,"id":"e30a360b_878fdc0b","line":82,"range":{"start_line":82,"start_character":22,"end_line":82,"end_character":43},"in_reply_to":"a65c8c4f_ec2cfd3a","updated":"2022-05-17 07:34:28.000000000","message":"Done","commit_id":"a73038faa3867aac2e9091a2b7a5017b5c860e10"},{"author":{"_account_id":15334,"name":"Stephen Finucane","display_name":"stephenfin","email":"stephenfin@redhat.com","username":"sfinucan"},"change_message_id":"5701936d9daf5e55694704a134b86ea137e77610","unresolved":true,"context_lines":[{"line_number":52,"context_line":"    support values none|intel|smmuv3|virtio"},{"line_number":53,"context_line":""},{"line_number":54,"context_line":"  * ``hw_viommu_aw_bits`` (for image property) and"},{"line_number":55,"context_line":"    ``hw:viommu_aw_bits`` (for extra_specs): support values: positive integer"},{"line_number":56,"context_line":""},{"line_number":57,"context_line":"  These attributes are options for ``LibvirtConfigGuestIOMMU``, More"},{"line_number":58,"context_line":"  information for them can be found in `libvirt format domain`_."}],"source_content_type":"text/x-rst","patch_set":9,"id":"13bf068a_e153d7f7","line":55,"updated":"2022-05-18 16:11:38.000000000","message":"I\u0027ve replied to the comments on PS7, but I still don\u0027t think these are needed and I\u0027d really like to get rid of them. If we\u0027re keeping them, we need clear guidance on how an operator can select suitable values. I don\u0027t think we have that information right now, do we? Can we get it?","commit_id":"7addd23365353144b1c35c3117950798c1c908bc"},{"author":{"_account_id":1004,"name":"Mohammed Naser","email":"mnaser@vexxhost.com","username":"mnaser"},"change_message_id":"585d8375bf5634c0a655870c8f11379eebbb3931","unresolved":true,"context_lines":[{"line_number":52,"context_line":"    support values none|intel|smmuv3|virtio"},{"line_number":53,"context_line":""},{"line_number":54,"context_line":"  * ``hw_viommu_aw_bits`` (for image property) and"},{"line_number":55,"context_line":"    ``hw:viommu_aw_bits`` (for extra_specs): support values: positive integer"},{"line_number":56,"context_line":""},{"line_number":57,"context_line":"  These attributes are options for ``LibvirtConfigGuestIOMMU``, More"},{"line_number":58,"context_line":"  information for them can be found in `libvirt format domain`_."}],"source_content_type":"text/x-rst","patch_set":9,"id":"d81c858b_26592c1b","line":55,"in_reply_to":"13bf068a_e153d7f7","updated":"2022-05-23 16:33:41.000000000","message":"I did a bit of digging, it looks like there is currently only two choices for this:\n\nhttps://github.com/qemu/qemu/commit/37f51384ae05bd50f83308339dbffa3e78404874\n\nOnly 39 and 48 are the two possible numbers (for Intel IOMMU).  I think if we set it to 48 by default, we\u0027ll support all of the possible use cases out of the box.  Alternatively, we can set it to 39 and allow bumping it to 48.","commit_id":"7addd23365353144b1c35c3117950798c1c908bc"},{"author":{"_account_id":12404,"name":"Rico Lin","email":"ricolin@ricolky.com","username":"rico.lin"},"change_message_id":"041e3cd9b2060b72b580c452ac7b08060b146f10","unresolved":false,"context_lines":[{"line_number":52,"context_line":"    support values none|intel|smmuv3|virtio"},{"line_number":53,"context_line":""},{"line_number":54,"context_line":"  * ``hw_viommu_aw_bits`` (for image property) and"},{"line_number":55,"context_line":"    ``hw:viommu_aw_bits`` (for extra_specs): support values: positive integer"},{"line_number":56,"context_line":""},{"line_number":57,"context_line":"  These attributes are options for ``LibvirtConfigGuestIOMMU``, More"},{"line_number":58,"context_line":"  information for them can be found in `libvirt format domain`_."}],"source_content_type":"text/x-rst","patch_set":9,"id":"82095033_e019c341","line":55,"in_reply_to":"d81c858b_26592c1b","updated":"2022-05-24 07:18:15.000000000","message":"I marked this to 48 and won\u0027t expose this until there are other requirements pop up to this spec","commit_id":"7addd23365353144b1c35c3117950798c1c908bc"},{"author":{"_account_id":15334,"name":"Stephen Finucane","display_name":"stephenfin","email":"stephenfin@redhat.com","username":"sfinucan"},"change_message_id":"5701936d9daf5e55694704a134b86ea137e77610","unresolved":true,"context_lines":[{"line_number":77,"context_line":"  once, whereas in this configuration we\u0027re locking it once per assigned"},{"line_number":78,"context_line":"  device. Without a guest IOMMU, all devices run in the same address space"},{"line_number":79,"context_line":"  and therefore the same container, and we only account the memory once for"},{"line_number":80,"context_line":"  any number of devices."},{"line_number":81,"context_line":""},{"line_number":82,"context_line":"* For eim attribute in ``LibvirtConfigGuestIOMMU``:"},{"line_number":83,"context_line":"  this will not exposed to end user, but will directly enabled if machine type"}],"source_content_type":"text/x-rst","patch_set":9,"id":"58b1988f_fa411344","line":80,"updated":"2022-05-18 16:11:38.000000000","message":"Question: if this disables overcommit, doesn\u0027t that mean we need to worry about this at schedule time? We need to exclude hosts with \u0027allocation_ratio\u0027 !\u003d 1.0, right? You should document this if so.\n\nLater: this feels like a separate mini spec...","commit_id":"7addd23365353144b1c35c3117950798c1c908bc"},{"author":{"_account_id":12404,"name":"Rico Lin","email":"ricolin@ricolky.com","username":"rico.lin"},"change_message_id":"041e3cd9b2060b72b580c452ac7b08060b146f10","unresolved":false,"context_lines":[{"line_number":77,"context_line":"  once, whereas in this configuration we\u0027re locking it once per assigned"},{"line_number":78,"context_line":"  device. Without a guest IOMMU, all devices run in the same address space"},{"line_number":79,"context_line":"  and therefore the same container, and we only account the memory once for"},{"line_number":80,"context_line":"  any number of devices."},{"line_number":81,"context_line":""},{"line_number":82,"context_line":"* For eim attribute in ``LibvirtConfigGuestIOMMU``:"},{"line_number":83,"context_line":"  this will not exposed to end user, but will directly enabled if machine type"}],"source_content_type":"text/x-rst","patch_set":9,"id":"bc2ff1c2_56f9048e","line":80,"in_reply_to":"22bed3c6_8b5d10fd","updated":"2022-05-24 07:18:15.000000000","message":"\u003e I\u0027m okay with whatever, but as long as we have a mechanism to allow steering to enabling memory locking..\n\nLet me quote what sean said, into spec to clearify.","commit_id":"7addd23365353144b1c35c3117950798c1c908bc"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"6ca4346f76ed869dcabfc98873af87b42c1d4dee","unresolved":true,"context_lines":[{"line_number":77,"context_line":"  once, whereas in this configuration we\u0027re locking it once per assigned"},{"line_number":78,"context_line":"  device. Without a guest IOMMU, all devices run in the same address space"},{"line_number":79,"context_line":"  and therefore the same container, and we only account the memory once for"},{"line_number":80,"context_line":"  any number of devices."},{"line_number":81,"context_line":""},{"line_number":82,"context_line":"* For eim attribute in ``LibvirtConfigGuestIOMMU``:"},{"line_number":83,"context_line":"  this will not exposed to end user, but will directly enabled if machine type"}],"source_content_type":"text/x-rst","patch_set":9,"id":"9f039b44_0defa89d","line":80,"in_reply_to":"58b1988f_fa411344","updated":"2022-05-18 17:54:59.000000000","message":"not really this is why i state dthat it would requrie hw:mem_page_size set to any value.\n\nthat will enabel the numa toplogy fitler to schdule based on teh fact the memory cant be over commited.","commit_id":"7addd23365353144b1c35c3117950798c1c908bc"},{"author":{"_account_id":1004,"name":"Mohammed Naser","email":"mnaser@vexxhost.com","username":"mnaser"},"change_message_id":"585d8375bf5634c0a655870c8f11379eebbb3931","unresolved":true,"context_lines":[{"line_number":77,"context_line":"  once, whereas in this configuration we\u0027re locking it once per assigned"},{"line_number":78,"context_line":"  device. Without a guest IOMMU, all devices run in the same address space"},{"line_number":79,"context_line":"  and therefore the same container, and we only account the memory once for"},{"line_number":80,"context_line":"  any number of devices."},{"line_number":81,"context_line":""},{"line_number":82,"context_line":"* For eim attribute in ``LibvirtConfigGuestIOMMU``:"},{"line_number":83,"context_line":"  this will not exposed to end user, but will directly enabled if machine type"}],"source_content_type":"text/x-rst","patch_set":9,"id":"22bed3c6_8b5d10fd","line":80,"in_reply_to":"9f039b44_0defa89d","updated":"2022-05-23 16:33:41.000000000","message":"I\u0027m okay with whatever, but as long as we have a mechanism to allow steering to enabling memory locking..","commit_id":"7addd23365353144b1c35c3117950798c1c908bc"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"6afeadb93c80bcb32cd5590993c2277305964421","unresolved":true,"context_lines":[{"line_number":47,"context_line":""},{"line_number":48,"context_line":"* Add following attribute to image property and extra_specs:"},{"line_number":49,"context_line":""},{"line_number":50,"context_line":"  * ``hw_viommu_model`` (for image property) and"},{"line_number":51,"context_line":"    ``hw:viommu_model`` (for extra_specs):"},{"line_number":52,"context_line":"    support values none|intel|smmuv3|virtio"},{"line_number":53,"context_line":""}],"source_content_type":"text/x-rst","patch_set":10,"id":"929ccb64_6b352e9f","line":50,"updated":"2022-05-25 10:28:40.000000000","message":"so i was just chatting to stephen about why we cant enable this by default and just wanted to capture it here\n\nenabling the viommu for passthough devices has a signifcant performce overhead\n\namd gave a good talk on this at kvmforum last year\nhttps://kvmforum2021.sched.com/event/ke4S/analysis-of-amd-hw-assisted-viommu-implementation-and-performance-suravee-suthikulpanit-wei-huang-amd\n\nhttps://static.sched.com/hosted_files/kvmforum2021/da/vIOMMU%20KVM%20Forum%202021%20-%20v4.pdf\n\nslide 16-19 are the performce tables\n\n[AMD Official Use Only]\nFIO\n| AMD vIOMMU | KVM Forum 202116\nIntel Samsung\nConfiguration Read (MB/sec) Write (MB/sec) Read (MB/sec) Write (MB/sec)\nBare Metal (no IOMMU) 331.82 1512.4057 327.60 376.48\nPT (no IOMMU) 318.38 1049.42 321.04 374.89\nPT + HW-vIOMMU 230.88 (72.5%) 218.66 (20.8%) 228.82 (72.3%) 240.33 (64.1%)\nPT + VirtIO IOMMU 136.02 (42.7%) 127.70 (12.2%) 132.04 (41.1%) 127.56 (34.0%)\n\n\n^ was for ssd read writes but the same picture repeats for nics too\nbasically it can reduce the performace to 1/8th  of not having the iommu enabled in some cases\n\nthat is obvioulsy not a performace regression we can live with by default\n\ncan you include a link to this presentation in the refernce section and add a note that the viommu should only be enable for workloads that require it to the performace section.\n\n\nwhen we actully add docs for this in nova we should aslo include a note on performace.\n\nthis might not be the same on arm but its certelly ture of intel and amd x86 systems today.","commit_id":"5d4f1defda108228796b313b6ecb5208ef8dfd69"},{"author":{"_account_id":12404,"name":"Rico Lin","email":"ricolin@ricolky.com","username":"rico.lin"},"change_message_id":"9d9075cf30204b21c1b9066f4e5a7ed1486eab17","unresolved":false,"context_lines":[{"line_number":47,"context_line":""},{"line_number":48,"context_line":"* Add following attribute to image property and extra_specs:"},{"line_number":49,"context_line":""},{"line_number":50,"context_line":"  * ``hw_viommu_model`` (for image property) and"},{"line_number":51,"context_line":"    ``hw:viommu_model`` (for extra_specs):"},{"line_number":52,"context_line":"    support values none|intel|smmuv3|virtio"},{"line_number":53,"context_line":""}],"source_content_type":"text/x-rst","patch_set":10,"id":"64c239b3_2a737a23","line":50,"in_reply_to":"929ccb64_6b352e9f","updated":"2022-05-30 11:26:35.000000000","message":"Done","commit_id":"5d4f1defda108228796b313b6ecb5208ef8dfd69"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"ad846e54b951b3ab536479f3c82303fa1cf8227e","unresolved":false,"context_lines":[{"line_number":47,"context_line":""},{"line_number":48,"context_line":"* Add following attribute to image property and extra_specs:"},{"line_number":49,"context_line":""},{"line_number":50,"context_line":"  * ``hw_viommu_model`` (for image property) and"},{"line_number":51,"context_line":"    ``hw:viommu_model`` (for extra_specs):"},{"line_number":52,"context_line":"    support values none|intel|smmuv3|virtio"},{"line_number":53,"context_line":""}],"source_content_type":"text/x-rst","patch_set":10,"id":"b017b0b6_e5187fc0","line":50,"in_reply_to":"929ccb64_6b352e9f","updated":"2022-05-30 10:59:13.000000000","message":"Done","commit_id":"5d4f1defda108228796b313b6ecb5208ef8dfd69"},{"author":{"_account_id":15334,"name":"Stephen Finucane","display_name":"stephenfin","email":"stephenfin@redhat.com","username":"sfinucan"},"change_message_id":"5869f04481e0e27b6d8985364af3a70cc5e8f8d9","unresolved":true,"context_lines":[{"line_number":49,"context_line":""},{"line_number":50,"context_line":"  * ``hw_viommu_model`` (for image property) and"},{"line_number":51,"context_line":"    ``hw:viommu_model`` (for extra_specs):"},{"line_number":52,"context_line":"    support values none|intel|smmuv3|virtio"},{"line_number":53,"context_line":""},{"line_number":54,"context_line":"  above attribute is on of options for ``LibvirtConfigGuestIOMMU``, More"},{"line_number":55,"context_line":"  information for them can be found in `libvirt format domain`_."}],"source_content_type":"text/x-rst","patch_set":10,"id":"4163e4ef_350db7bd","line":52,"updated":"2022-05-25 15:40:11.000000000","message":"Can we add an additional value here, \u0027auto\u0027, which will let nova auto-select the most sensible default (virtio if libvirt supports it, else \u0027intel\u0027 on x86 and \u0027smmuv3\u0027 on aarch64).","commit_id":"5d4f1defda108228796b313b6ecb5208ef8dfd69"},{"author":{"_account_id":12404,"name":"Rico Lin","email":"ricolin@ricolky.com","username":"rico.lin"},"change_message_id":"9d9075cf30204b21c1b9066f4e5a7ed1486eab17","unresolved":false,"context_lines":[{"line_number":49,"context_line":""},{"line_number":50,"context_line":"  * ``hw_viommu_model`` (for image property) and"},{"line_number":51,"context_line":"    ``hw:viommu_model`` (for extra_specs):"},{"line_number":52,"context_line":"    support values none|intel|smmuv3|virtio"},{"line_number":53,"context_line":""},{"line_number":54,"context_line":"  above attribute is on of options for ``LibvirtConfigGuestIOMMU``, More"},{"line_number":55,"context_line":"  information for them can be found in `libvirt format domain`_."}],"source_content_type":"text/x-rst","patch_set":10,"id":"487bf3db_4d4d32c1","line":52,"in_reply_to":"4163e4ef_350db7bd","updated":"2022-05-30 11:26:35.000000000","message":"Done","commit_id":"5d4f1defda108228796b313b6ecb5208ef8dfd69"},{"author":{"_account_id":15334,"name":"Stephen Finucane","display_name":"stephenfin","email":"stephenfin@redhat.com","username":"sfinucan"},"change_message_id":"6e2751b15367b16c4015f4a479ad8ac363a2b9ca","unresolved":false,"context_lines":[{"line_number":49,"context_line":""},{"line_number":50,"context_line":"  * ``hw_viommu_model`` (for image property) and"},{"line_number":51,"context_line":"    ``hw:viommu_model`` (for extra_specs):"},{"line_number":52,"context_line":"    support values none|intel|smmuv3|virtio"},{"line_number":53,"context_line":""},{"line_number":54,"context_line":"  above attribute is on of options for ``LibvirtConfigGuestIOMMU``, More"},{"line_number":55,"context_line":"  information for them can be found in `libvirt format domain`_."}],"source_content_type":"text/x-rst","patch_set":10,"id":"3827ee69_cbe4807f","line":52,"in_reply_to":"4163e4ef_350db7bd","updated":"2022-05-30 10:40:19.000000000","message":"Looks like this is done in PS11","commit_id":"5d4f1defda108228796b313b6ecb5208ef8dfd69"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"82bb508a0801106edfdc03f3383643dbc1b31140","unresolved":true,"context_lines":[{"line_number":74,"context_line":"  once, whereas in this configuration we\u0027re locking it once per assigned"},{"line_number":75,"context_line":"  device. Without a guest IOMMU, all devices run in the same address space"},{"line_number":76,"context_line":"  and therefore the same container, and we only account the memory once for"},{"line_number":77,"context_line":"  any number of devices (with  ``hw:mem_page_size`` alse setted, will enable"},{"line_number":78,"context_line":"  the NUMA toplogy fitler to schdule based on the fact the memory can\u0027t be over"},{"line_number":79,"context_line":"  commited.)."},{"line_number":80,"context_line":""}],"source_content_type":"text/x-rst","patch_set":10,"id":"a903f45e_7f04edbf","line":77,"range":{"start_line":77,"start_character":52,"end_line":77,"end_character":63},"updated":"2022-05-24 07:49:00.000000000","message":"nit: set to any value this will…","commit_id":"5d4f1defda108228796b313b6ecb5208ef8dfd69"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"61e1bde94394dc3ff490ff5ad34a22707aa6fc9c","unresolved":false,"context_lines":[{"line_number":74,"context_line":"  once, whereas in this configuration we\u0027re locking it once per assigned"},{"line_number":75,"context_line":"  device. Without a guest IOMMU, all devices run in the same address space"},{"line_number":76,"context_line":"  and therefore the same container, and we only account the memory once for"},{"line_number":77,"context_line":"  any number of devices (with  ``hw:mem_page_size`` alse setted, will enable"},{"line_number":78,"context_line":"  the NUMA toplogy fitler to schdule based on the fact the memory can\u0027t be over"},{"line_number":79,"context_line":"  commited.)."},{"line_number":80,"context_line":""}],"source_content_type":"text/x-rst","patch_set":10,"id":"2fc9db57_f85fd8df","line":77,"range":{"start_line":77,"start_character":52,"end_line":77,"end_character":63},"in_reply_to":"a903f45e_7f04edbf","updated":"2022-05-30 09:41:18.000000000","message":"Done","commit_id":"5d4f1defda108228796b313b6ecb5208ef8dfd69"},{"author":{"_account_id":12404,"name":"Rico Lin","email":"ricolin@ricolky.com","username":"rico.lin"},"change_message_id":"9d9075cf30204b21c1b9066f4e5a7ed1486eab17","unresolved":false,"context_lines":[{"line_number":74,"context_line":"  once, whereas in this configuration we\u0027re locking it once per assigned"},{"line_number":75,"context_line":"  device. Without a guest IOMMU, all devices run in the same address space"},{"line_number":76,"context_line":"  and therefore the same container, and we only account the memory once for"},{"line_number":77,"context_line":"  any number of devices (with  ``hw:mem_page_size`` alse setted, will enable"},{"line_number":78,"context_line":"  the NUMA toplogy fitler to schdule based on the fact the memory can\u0027t be over"},{"line_number":79,"context_line":"  commited.)."},{"line_number":80,"context_line":""}],"source_content_type":"text/x-rst","patch_set":10,"id":"e5e80752_1d985df0","line":77,"range":{"start_line":77,"start_character":52,"end_line":77,"end_character":63},"in_reply_to":"a903f45e_7f04edbf","updated":"2022-05-30 11:26:35.000000000","message":"Done","commit_id":"5d4f1defda108228796b313b6ecb5208ef8dfd69"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"82bb508a0801106edfdc03f3383643dbc1b31140","unresolved":true,"context_lines":[{"line_number":82,"context_line":"  This attribute can used to set the address width to allow mapping larger iova"},{"line_number":83,"context_line":"  addresses in the guest. Since 6.5.0 (QEMU/KVM only)."},{"line_number":84,"context_line":"  As Qemu current supported values are 39 and 48, I propose we set this to"},{"line_number":85,"context_line":"  larger width (48) by default and will not exposed to end user."},{"line_number":86,"context_line":""},{"line_number":87,"context_line":"* For eim attribute in ``LibvirtConfigGuestIOMMU``:"},{"line_number":88,"context_line":"  this will not exposed to end user, but will directly enabled if machine type"}],"source_content_type":"text/x-rst","patch_set":10,"id":"79ceff9c_2d281d50","line":85,"updated":"2022-05-24 07:49:00.000000000","message":"+1 this works for me\n\nalthough based on our min qemu version you will need to guard this behind a min qemu check\n\nhttps://github.com/openstack/nova/blob/master/nova/virt/libvirt/driver.py#L219-L222","commit_id":"5d4f1defda108228796b313b6ecb5208ef8dfd69"},{"author":{"_account_id":15334,"name":"Stephen Finucane","display_name":"stephenfin","email":"stephenfin@redhat.com","username":"sfinucan"},"change_message_id":"5869f04481e0e27b6d8985364af3a70cc5e8f8d9","unresolved":false,"context_lines":[{"line_number":82,"context_line":"  This attribute can used to set the address width to allow mapping larger iova"},{"line_number":83,"context_line":"  addresses in the guest. Since 6.5.0 (QEMU/KVM only)."},{"line_number":84,"context_line":"  As Qemu current supported values are 39 and 48, I propose we set this to"},{"line_number":85,"context_line":"  larger width (48) by default and will not exposed to end user."},{"line_number":86,"context_line":""},{"line_number":87,"context_line":"* For eim attribute in ``LibvirtConfigGuestIOMMU``:"},{"line_number":88,"context_line":"  this will not exposed to end user, but will directly enabled if machine type"}],"source_content_type":"text/x-rst","patch_set":10,"id":"e3be50e2_a1a53a3a","line":85,"in_reply_to":"19a13256_bf5922e8","updated":"2022-05-25 15:40:11.000000000","message":"Thanks, this seems much better","commit_id":"5d4f1defda108228796b313b6ecb5208ef8dfd69"},{"author":{"_account_id":12404,"name":"Rico Lin","email":"ricolin@ricolky.com","username":"rico.lin"},"change_message_id":"e00af9a11b3e208aed0bf071f3d501e6eea6d287","unresolved":true,"context_lines":[{"line_number":82,"context_line":"  This attribute can used to set the address width to allow mapping larger iova"},{"line_number":83,"context_line":"  addresses in the guest. Since 6.5.0 (QEMU/KVM only)."},{"line_number":84,"context_line":"  As Qemu current supported values are 39 and 48, I propose we set this to"},{"line_number":85,"context_line":"  larger width (48) by default and will not exposed to end user."},{"line_number":86,"context_line":""},{"line_number":87,"context_line":"* For eim attribute in ``LibvirtConfigGuestIOMMU``:"},{"line_number":88,"context_line":"  this will not exposed to end user, but will directly enabled if machine type"}],"source_content_type":"text/x-rst","patch_set":10,"id":"d3987a61_e135039a","line":85,"in_reply_to":"79ceff9c_2d281d50","updated":"2022-05-24 11:17:55.000000000","message":"Note: the min version for libvirt aw_bits is 6.5.0 [1]\n\nmin version for qemu aw_bits 48 is 2.12.0 [2]\n\nto compare current min version for libvirt in nova ([3])\nMIN_LIBVIRT_VERSION \u003d (6, 0, 0)\nMIN_QEMU_VERSION \u003d (4, 2, 0)\n\nDo we need to propose bump libvirt version in this spec too?\n\n[1] https://github.com/libvirt/libvirt/commit/0e5c919397ad255442844472573ef50188e3e53c \n[2] https://github.com/qemu/qemu/commit/37f51384ae05bd50f83308339dbffa3e78404874 \n[3] https://github.com/openstack/nova/blob/master/nova/virt/libvirt/driver.py#L219-L222","commit_id":"5d4f1defda108228796b313b6ecb5208ef8dfd69"},{"author":{"_account_id":12404,"name":"Rico Lin","email":"ricolin@ricolky.com","username":"rico.lin"},"change_message_id":"ae947981a49063cab9c99b35390cf12320f56401","unresolved":false,"context_lines":[{"line_number":82,"context_line":"  This attribute can used to set the address width to allow mapping larger iova"},{"line_number":83,"context_line":"  addresses in the guest. Since 6.5.0 (QEMU/KVM only)."},{"line_number":84,"context_line":"  As Qemu current supported values are 39 and 48, I propose we set this to"},{"line_number":85,"context_line":"  larger width (48) by default and will not exposed to end user."},{"line_number":86,"context_line":""},{"line_number":87,"context_line":"* For eim attribute in ``LibvirtConfigGuestIOMMU``:"},{"line_number":88,"context_line":"  this will not exposed to end user, but will directly enabled if machine type"}],"source_content_type":"text/x-rst","patch_set":10,"id":"df642c66_e9517751","line":85,"in_reply_to":"d2eddfc9_d190923d","updated":"2022-05-24 11:32:35.000000000","message":"mark as resolved","commit_id":"5d4f1defda108228796b313b6ecb5208ef8dfd69"},{"author":{"_account_id":12404,"name":"Rico Lin","email":"ricolin@ricolky.com","username":"rico.lin"},"change_message_id":"8ae3c04e57ecdea19a5a46ccd2e4a222ae1c4e42","unresolved":true,"context_lines":[{"line_number":82,"context_line":"  This attribute can used to set the address width to allow mapping larger iova"},{"line_number":83,"context_line":"  addresses in the guest. Since 6.5.0 (QEMU/KVM only)."},{"line_number":84,"context_line":"  As Qemu current supported values are 39 and 48, I propose we set this to"},{"line_number":85,"context_line":"  larger width (48) by default and will not exposed to end user."},{"line_number":86,"context_line":""},{"line_number":87,"context_line":"* For eim attribute in ``LibvirtConfigGuestIOMMU``:"},{"line_number":88,"context_line":"  this will not exposed to end user, but will directly enabled if machine type"}],"source_content_type":"text/x-rst","patch_set":10,"id":"d2eddfc9_d190923d","line":85,"in_reply_to":"d3987a61_e135039a","updated":"2022-05-24 11:31:43.000000000","message":"according to sean\u0027s feedback on IRC,\n\nwe just need to make sure we only introduce aw_bits when libvirt version over 6.5.0\n\nAnd appears, when AA releases, libvirt can bump to 7.0.0. after that  we should be able to get rid of that version compare logic in code.","commit_id":"5d4f1defda108228796b313b6ecb5208ef8dfd69"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"609c75a3edc09ee2022888dd8fca31b9c66922e1","unresolved":false,"context_lines":[{"line_number":82,"context_line":"  This attribute can used to set the address width to allow mapping larger iova"},{"line_number":83,"context_line":"  addresses in the guest. Since 6.5.0 (QEMU/KVM only)."},{"line_number":84,"context_line":"  As Qemu current supported values are 39 and 48, I propose we set this to"},{"line_number":85,"context_line":"  larger width (48) by default and will not exposed to end user."},{"line_number":86,"context_line":""},{"line_number":87,"context_line":"* For eim attribute in ``LibvirtConfigGuestIOMMU``:"},{"line_number":88,"context_line":"  this will not exposed to end user, but will directly enabled if machine type"}],"source_content_type":"text/x-rst","patch_set":10,"id":"19a13256_bf5922e8","line":85,"in_reply_to":"df642c66_e9517751","updated":"2022-05-24 11:40:27.000000000","message":"yes we have many example of this\nfor example the min libvirt verion that upport vdpa is 6.9\nhttps://github.com/openstack/nova/blob/master/nova/virt/libvirt/driver.py#L244\u003d\n\n\nso we just check that where it matters such as asking for the list of pci devices\n\nhttps://github.com/openstack/nova/blob/master/nova/virt/libvirt/driver.py#L7944-L7946\u003d\n\nin your case you will need to check it when we are generating the xml and only include it if the libvirt is new enough to accpte it","commit_id":"5d4f1defda108228796b313b6ecb5208ef8dfd69"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"61e1bde94394dc3ff490ff5ad34a22707aa6fc9c","unresolved":true,"context_lines":[{"line_number":49,"context_line":""},{"line_number":50,"context_line":"  * ``hw_viommu_model`` (for image property) and"},{"line_number":51,"context_line":"    ``hw:viommu_model`` (for extra_specs):"},{"line_number":52,"context_line":"    Support values none|intel|smmuv3|virtio|auto. Default to ``auto``."},{"line_number":53,"context_line":"    Which ``auto`` will do automatic select. For example, it will select"},{"line_number":54,"context_line":"    ``virtio`` if Libvirt supports it, else ``intel`` on X86 and ``smmuv3``"},{"line_number":55,"context_line":"    on AArch64."}],"source_content_type":"text/x-rst","patch_set":11,"id":"04fa498f_3ec65d34","line":52,"range":{"start_line":52,"start_character":61,"end_line":52,"end_character":70},"updated":"2022-05-30 09:41:18.000000000","message":"no it has to default to None.\nthe performace impact is too high to default to auto","commit_id":"381097010efd44f17e42dbb37dcbe47612005259"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"ad846e54b951b3ab536479f3c82303fa1cf8227e","unresolved":false,"context_lines":[{"line_number":49,"context_line":""},{"line_number":50,"context_line":"  * ``hw_viommu_model`` (for image property) and"},{"line_number":51,"context_line":"    ``hw:viommu_model`` (for extra_specs):"},{"line_number":52,"context_line":"    Support values none|intel|smmuv3|virtio|auto. Default to ``auto``."},{"line_number":53,"context_line":"    Which ``auto`` will do automatic select. For example, it will select"},{"line_number":54,"context_line":"    ``virtio`` if Libvirt supports it, else ``intel`` on X86 and ``smmuv3``"},{"line_number":55,"context_line":"    on AArch64."}],"source_content_type":"text/x-rst","patch_set":11,"id":"a27561ed_c2f027b9","line":52,"range":{"start_line":52,"start_character":61,"end_line":52,"end_character":70},"in_reply_to":"04fa498f_3ec65d34","updated":"2022-05-30 10:59:13.000000000","message":"Done","commit_id":"381097010efd44f17e42dbb37dcbe47612005259"},{"author":{"_account_id":12404,"name":"Rico Lin","email":"ricolin@ricolky.com","username":"rico.lin"},"change_message_id":"9d9075cf30204b21c1b9066f4e5a7ed1486eab17","unresolved":false,"context_lines":[{"line_number":49,"context_line":""},{"line_number":50,"context_line":"  * ``hw_viommu_model`` (for image property) and"},{"line_number":51,"context_line":"    ``hw:viommu_model`` (for extra_specs):"},{"line_number":52,"context_line":"    Support values none|intel|smmuv3|virtio|auto. Default to ``auto``."},{"line_number":53,"context_line":"    Which ``auto`` will do automatic select. For example, it will select"},{"line_number":54,"context_line":"    ``virtio`` if Libvirt supports it, else ``intel`` on X86 and ``smmuv3``"},{"line_number":55,"context_line":"    on AArch64."}],"source_content_type":"text/x-rst","patch_set":11,"id":"d014b3ed_18e07efa","line":52,"range":{"start_line":52,"start_character":61,"end_line":52,"end_character":70},"in_reply_to":"04fa498f_3ec65d34","updated":"2022-05-30 11:26:35.000000000","message":"Done","commit_id":"381097010efd44f17e42dbb37dcbe47612005259"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"61e1bde94394dc3ff490ff5ad34a22707aa6fc9c","unresolved":true,"context_lines":[{"line_number":50,"context_line":"  * ``hw_viommu_model`` (for image property) and"},{"line_number":51,"context_line":"    ``hw:viommu_model`` (for extra_specs):"},{"line_number":52,"context_line":"    Support values none|intel|smmuv3|virtio|auto. Default to ``auto``."},{"line_number":53,"context_line":"    Which ``auto`` will do automatic select. For example, it will select"},{"line_number":54,"context_line":"    ``virtio`` if Libvirt supports it, else ``intel`` on X86 and ``smmuv3``"},{"line_number":55,"context_line":"    on AArch64."},{"line_number":56,"context_line":""},{"line_number":57,"context_line":"  above attribute is on of options for ``LibvirtConfigGuestIOMMU``, More"},{"line_number":58,"context_line":"  information for them can be found in `libvirt format domain`_."}],"source_content_type":"text/x-rst","patch_set":11,"id":"654c31ea_6988a906","line":55,"range":{"start_line":53,"start_character":3,"end_line":55,"end_character":15},"updated":"2022-05-30 09:41:18.000000000","message":"nit: ``auto`` will select ``virtio`` if Libvirt supports it, else ``intel`` on X86 and ``smmuv3`` on AArch64.","commit_id":"381097010efd44f17e42dbb37dcbe47612005259"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"ad846e54b951b3ab536479f3c82303fa1cf8227e","unresolved":false,"context_lines":[{"line_number":50,"context_line":"  * ``hw_viommu_model`` (for image property) and"},{"line_number":51,"context_line":"    ``hw:viommu_model`` (for extra_specs):"},{"line_number":52,"context_line":"    Support values none|intel|smmuv3|virtio|auto. Default to ``auto``."},{"line_number":53,"context_line":"    Which ``auto`` will do automatic select. For example, it will select"},{"line_number":54,"context_line":"    ``virtio`` if Libvirt supports it, else ``intel`` on X86 and ``smmuv3``"},{"line_number":55,"context_line":"    on AArch64."},{"line_number":56,"context_line":""},{"line_number":57,"context_line":"  above attribute is on of options for ``LibvirtConfigGuestIOMMU``, More"},{"line_number":58,"context_line":"  information for them can be found in `libvirt format domain`_."}],"source_content_type":"text/x-rst","patch_set":11,"id":"9c2c0268_1e203afa","line":55,"range":{"start_line":53,"start_character":3,"end_line":55,"end_character":15},"in_reply_to":"654c31ea_6988a906","updated":"2022-05-30 10:59:13.000000000","message":"Done","commit_id":"381097010efd44f17e42dbb37dcbe47612005259"},{"author":{"_account_id":12404,"name":"Rico Lin","email":"ricolin@ricolky.com","username":"rico.lin"},"change_message_id":"9d9075cf30204b21c1b9066f4e5a7ed1486eab17","unresolved":false,"context_lines":[{"line_number":50,"context_line":"  * ``hw_viommu_model`` (for image property) and"},{"line_number":51,"context_line":"    ``hw:viommu_model`` (for extra_specs):"},{"line_number":52,"context_line":"    Support values none|intel|smmuv3|virtio|auto. Default to ``auto``."},{"line_number":53,"context_line":"    Which ``auto`` will do automatic select. For example, it will select"},{"line_number":54,"context_line":"    ``virtio`` if Libvirt supports it, else ``intel`` on X86 and ``smmuv3``"},{"line_number":55,"context_line":"    on AArch64."},{"line_number":56,"context_line":""},{"line_number":57,"context_line":"  above attribute is on of options for ``LibvirtConfigGuestIOMMU``, More"},{"line_number":58,"context_line":"  information for them can be found in `libvirt format domain`_."}],"source_content_type":"text/x-rst","patch_set":11,"id":"da78b1e0_30f4dcd4","line":55,"range":{"start_line":53,"start_character":3,"end_line":55,"end_character":15},"in_reply_to":"654c31ea_6988a906","updated":"2022-05-30 11:26:35.000000000","message":"Done","commit_id":"381097010efd44f17e42dbb37dcbe47612005259"},{"author":{"_account_id":15334,"name":"Stephen Finucane","display_name":"stephenfin","email":"stephenfin@redhat.com","username":"sfinucan"},"change_message_id":"30570546293ac60fd6c0e6fe5cdd87dfeea507c0","unresolved":true,"context_lines":[{"line_number":81,"context_line":"  enable the NUMA toplogy fitler to schdule based on the fact the memory can\u0027t"},{"line_number":82,"context_line":"  be over commited)."},{"line_number":83,"context_line":""},{"line_number":84,"context_line":"* For aw_bits attribute in ``LibvirtConfigGuestIOMMU``:"},{"line_number":85,"context_line":"  This attribute can used to set the address width to allow mapping larger iova"},{"line_number":86,"context_line":"  addresses in the guest. Since 6.5.0 (QEMU/KVM only)."},{"line_number":87,"context_line":"  As Qemu current supported values are 39 and 48, I propose we set this to"}],"source_content_type":"text/x-rst","patch_set":11,"id":"09b0ced8_6aaf18fe","line":84,"range":{"start_line":84,"start_character":6,"end_line":84,"end_character":13},"updated":"2022-05-30 10:51:36.000000000","message":"nit: ``code``","commit_id":"381097010efd44f17e42dbb37dcbe47612005259"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"ad846e54b951b3ab536479f3c82303fa1cf8227e","unresolved":false,"context_lines":[{"line_number":81,"context_line":"  enable the NUMA toplogy fitler to schdule based on the fact the memory can\u0027t"},{"line_number":82,"context_line":"  be over commited)."},{"line_number":83,"context_line":""},{"line_number":84,"context_line":"* For aw_bits attribute in ``LibvirtConfigGuestIOMMU``:"},{"line_number":85,"context_line":"  This attribute can used to set the address width to allow mapping larger iova"},{"line_number":86,"context_line":"  addresses in the guest. Since 6.5.0 (QEMU/KVM only)."},{"line_number":87,"context_line":"  As Qemu current supported values are 39 and 48, I propose we set this to"}],"source_content_type":"text/x-rst","patch_set":11,"id":"421375cb_147ccbd1","line":84,"range":{"start_line":84,"start_character":6,"end_line":84,"end_character":13},"in_reply_to":"09b0ced8_6aaf18fe","updated":"2022-05-30 10:59:13.000000000","message":"Done","commit_id":"381097010efd44f17e42dbb37dcbe47612005259"},{"author":{"_account_id":12404,"name":"Rico Lin","email":"ricolin@ricolky.com","username":"rico.lin"},"change_message_id":"9d9075cf30204b21c1b9066f4e5a7ed1486eab17","unresolved":false,"context_lines":[{"line_number":81,"context_line":"  enable the NUMA toplogy fitler to schdule based on the fact the memory can\u0027t"},{"line_number":82,"context_line":"  be over commited)."},{"line_number":83,"context_line":""},{"line_number":84,"context_line":"* For aw_bits attribute in ``LibvirtConfigGuestIOMMU``:"},{"line_number":85,"context_line":"  This attribute can used to set the address width to allow mapping larger iova"},{"line_number":86,"context_line":"  addresses in the guest. Since 6.5.0 (QEMU/KVM only)."},{"line_number":87,"context_line":"  As Qemu current supported values are 39 and 48, I propose we set this to"}],"source_content_type":"text/x-rst","patch_set":11,"id":"f42bce90_a418f41f","line":84,"range":{"start_line":84,"start_character":6,"end_line":84,"end_character":13},"in_reply_to":"09b0ced8_6aaf18fe","updated":"2022-05-30 11:26:35.000000000","message":"Done","commit_id":"381097010efd44f17e42dbb37dcbe47612005259"},{"author":{"_account_id":15334,"name":"Stephen Finucane","display_name":"stephenfin","email":"stephenfin@redhat.com","username":"sfinucan"},"change_message_id":"30570546293ac60fd6c0e6fe5cdd87dfeea507c0","unresolved":true,"context_lines":[{"line_number":87,"context_line":"  As Qemu current supported values are 39 and 48, I propose we set this to"},{"line_number":88,"context_line":"  larger width (48) by default and will not exposed to end user."},{"line_number":89,"context_line":""},{"line_number":90,"context_line":"* For eim attribute in ``LibvirtConfigGuestIOMMU``:"},{"line_number":91,"context_line":"  this will not exposed to end user, but will directly enabled if machine type"},{"line_number":92,"context_line":"  is Q35."},{"line_number":93,"context_line":"  Side Note:"}],"source_content_type":"text/x-rst","patch_set":11,"id":"c449b3e2_69e8d58e","line":90,"range":{"start_line":90,"start_character":6,"end_line":90,"end_character":9},"updated":"2022-05-30 10:51:36.000000000","message":"nit: ``code``","commit_id":"381097010efd44f17e42dbb37dcbe47612005259"},{"author":{"_account_id":12404,"name":"Rico Lin","email":"ricolin@ricolky.com","username":"rico.lin"},"change_message_id":"9d9075cf30204b21c1b9066f4e5a7ed1486eab17","unresolved":false,"context_lines":[{"line_number":87,"context_line":"  As Qemu current supported values are 39 and 48, I propose we set this to"},{"line_number":88,"context_line":"  larger width (48) by default and will not exposed to end user."},{"line_number":89,"context_line":""},{"line_number":90,"context_line":"* For eim attribute in ``LibvirtConfigGuestIOMMU``:"},{"line_number":91,"context_line":"  this will not exposed to end user, but will directly enabled if machine type"},{"line_number":92,"context_line":"  is Q35."},{"line_number":93,"context_line":"  Side Note:"}],"source_content_type":"text/x-rst","patch_set":11,"id":"7af691f4_1fc138f5","line":90,"range":{"start_line":90,"start_character":6,"end_line":90,"end_character":9},"in_reply_to":"c449b3e2_69e8d58e","updated":"2022-05-30 11:26:35.000000000","message":"Done","commit_id":"381097010efd44f17e42dbb37dcbe47612005259"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"ad846e54b951b3ab536479f3c82303fa1cf8227e","unresolved":false,"context_lines":[{"line_number":87,"context_line":"  As Qemu current supported values are 39 and 48, I propose we set this to"},{"line_number":88,"context_line":"  larger width (48) by default and will not exposed to end user."},{"line_number":89,"context_line":""},{"line_number":90,"context_line":"* For eim attribute in ``LibvirtConfigGuestIOMMU``:"},{"line_number":91,"context_line":"  this will not exposed to end user, but will directly enabled if machine type"},{"line_number":92,"context_line":"  is Q35."},{"line_number":93,"context_line":"  Side Note:"}],"source_content_type":"text/x-rst","patch_set":11,"id":"ecaf3b42_ce097769","line":90,"range":{"start_line":90,"start_character":6,"end_line":90,"end_character":9},"in_reply_to":"c449b3e2_69e8d58e","updated":"2022-05-30 10:59:13.000000000","message":"Done","commit_id":"381097010efd44f17e42dbb37dcbe47612005259"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"61e1bde94394dc3ff490ff5ad34a22707aa6fc9c","unresolved":true,"context_lines":[{"line_number":148,"context_line":"For above reason, vIOMMU should only be enable for workflow that require it."},{"line_number":149,"context_line":""},{"line_number":150,"context_line":".. _`AMD vIOMMU session on KVM Forum 2021`: https://static.sched.com/hosted_files/kvmforum2021/da/vIOMMU%20KVM%20Forum%202021%20-%20v4.pdf"},{"line_number":151,"context_line":""},{"line_number":152,"context_line":"Other deployer impact"},{"line_number":153,"context_line":"---------------------"},{"line_number":154,"context_line":""}],"source_content_type":"text/x-rst","patch_set":11,"id":"e461efb3_b0c68e7e","line":151,"updated":"2022-05-30 09:41:18.000000000","message":"+1","commit_id":"381097010efd44f17e42dbb37dcbe47612005259"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"ad846e54b951b3ab536479f3c82303fa1cf8227e","unresolved":false,"context_lines":[{"line_number":148,"context_line":"For above reason, vIOMMU should only be enable for workflow that require it."},{"line_number":149,"context_line":""},{"line_number":150,"context_line":".. _`AMD vIOMMU session on KVM Forum 2021`: https://static.sched.com/hosted_files/kvmforum2021/da/vIOMMU%20KVM%20Forum%202021%20-%20v4.pdf"},{"line_number":151,"context_line":""},{"line_number":152,"context_line":"Other deployer impact"},{"line_number":153,"context_line":"---------------------"},{"line_number":154,"context_line":""}],"source_content_type":"text/x-rst","patch_set":11,"id":"082591e8_8a497af4","line":151,"in_reply_to":"e461efb3_b0c68e7e","updated":"2022-05-30 10:59:13.000000000","message":"Ack","commit_id":"381097010efd44f17e42dbb37dcbe47612005259"},{"author":{"_account_id":12404,"name":"Rico Lin","email":"ricolin@ricolky.com","username":"rico.lin"},"change_message_id":"9d9075cf30204b21c1b9066f4e5a7ed1486eab17","unresolved":false,"context_lines":[{"line_number":148,"context_line":"For above reason, vIOMMU should only be enable for workflow that require it."},{"line_number":149,"context_line":""},{"line_number":150,"context_line":".. _`AMD vIOMMU session on KVM Forum 2021`: https://static.sched.com/hosted_files/kvmforum2021/da/vIOMMU%20KVM%20Forum%202021%20-%20v4.pdf"},{"line_number":151,"context_line":""},{"line_number":152,"context_line":"Other deployer impact"},{"line_number":153,"context_line":"---------------------"},{"line_number":154,"context_line":""}],"source_content_type":"text/x-rst","patch_set":11,"id":"3830a9de_168f40a5","line":151,"in_reply_to":"e461efb3_b0c68e7e","updated":"2022-05-30 11:26:35.000000000","message":"cool","commit_id":"381097010efd44f17e42dbb37dcbe47612005259"},{"author":{"_account_id":12404,"name":"Rico Lin","email":"ricolin@ricolky.com","username":"rico.lin"},"change_message_id":"a78ce66e6911f5c52066b9ab7843fc7cc8d44598","unresolved":true,"context_lines":[{"line_number":50,"context_line":"  * ``hw_viommu_model`` (for image property) and"},{"line_number":51,"context_line":"    ``hw:viommu_model`` (for extra_specs):"},{"line_number":52,"context_line":"    Support values none|intel|smmuv3|virtio|auto. Default to ``none``."},{"line_number":53,"context_line":"    ``auto`` will select ``virtio`` if Libvirt supports it,"},{"line_number":54,"context_line":"    else ``intel`` on X86 and ``smmuv3`` on AArch64."},{"line_number":55,"context_line":""},{"line_number":56,"context_line":"  above attribute is on of options for ``LibvirtConfigGuestIOMMU``, More"}],"source_content_type":"text/x-rst","patch_set":12,"id":"471f2100_8e3f7bf5","line":53,"range":{"start_line":53,"start_character":6,"end_line":53,"end_character":10},"updated":"2022-05-31 17:46:17.000000000","message":"Appears libvirt support virtio since libvirt-3.2.0-10.el7 ([1]) which is already older than our min supported libvirt. So maybe we don\u0027t actually need auto option?\n\n[1] https://github.com/libvirt/libvirt/commit/fd518643402d8233ceffe4ef28279bcce53284f6","commit_id":"faafa19c6a86094dba6226af099651d6db11d21a"},{"author":{"_account_id":12404,"name":"Rico Lin","email":"ricolin@ricolky.com","username":"rico.lin"},"change_message_id":"22647295f639a9e312872a9303a401af6a3c6452","unresolved":false,"context_lines":[{"line_number":50,"context_line":"  * ``hw_viommu_model`` (for image property) and"},{"line_number":51,"context_line":"    ``hw:viommu_model`` (for extra_specs):"},{"line_number":52,"context_line":"    Support values none|intel|smmuv3|virtio|auto. Default to ``none``."},{"line_number":53,"context_line":"    ``auto`` will select ``virtio`` if Libvirt supports it,"},{"line_number":54,"context_line":"    else ``intel`` on X86 and ``smmuv3`` on AArch64."},{"line_number":55,"context_line":""},{"line_number":56,"context_line":"  above attribute is on of options for ``LibvirtConfigGuestIOMMU``, More"}],"source_content_type":"text/x-rst","patch_set":12,"id":"f212d638_a7d7c9a8","line":53,"range":{"start_line":53,"start_character":6,"end_line":53,"end_character":10},"in_reply_to":"471f2100_8e3f7bf5","updated":"2022-05-31 20:24:34.000000000","message":"Never mind. Actually virtio mark supported since 8.3.0, for Q35 and ARM virt guests.","commit_id":"faafa19c6a86094dba6226af099651d6db11d21a"}]}