)]}'
{"/COMMIT_MSG":[{"author":{"_account_id":16929,"name":"Giridhar Jayavelu","email":"gjayavelu@vmware.com","username":"gjayavelu"},"change_message_id":"fc0e00d0dab01c1c11c9ecf03168726d3a38b14b","unresolved":false,"context_lines":[{"line_number":4,"context_line":"Commit:     Moshe Levi \u003cmoshele@mellanox.com\u003e"},{"line_number":5,"context_line":"CommitDate: 2016-04-28 21:56:20 +0300"},{"line_number":6,"context_line":""},{"line_number":7,"context_line":"Clarify SR-IOV ports vs direct attached ports"},{"line_number":8,"context_line":""},{"line_number":9,"context_line":"This patch clarify for what type of ports"},{"line_number":10,"context_line":"detach/attach pci device is needed and for what type of"}],"source_content_type":"text/x-gerrit-commit-message","patch_set":4,"id":"bab6814e_8a1dff68","line":7,"updated":"2016-05-18 05:54:19.000000000","message":"Can it be SR-IOV ports vs. \u0027direct passthrough ports\u0027 instead of \u0027direct attached ports\u0027 to be more specific?","commit_id":"7aec4af47799d01ecd01cffc9a1ce0ceff120910"},{"author":{"_account_id":12171,"name":"Moshe Levi","email":"moshele@nvidia.com","username":"moshele"},"change_message_id":"b249034d12853288b6169ab115757f25a59712d1","unresolved":false,"context_lines":[{"line_number":4,"context_line":"Commit:     Moshe Levi \u003cmoshele@mellanox.com\u003e"},{"line_number":5,"context_line":"CommitDate: 2016-04-28 21:56:20 +0300"},{"line_number":6,"context_line":""},{"line_number":7,"context_line":"Clarify SR-IOV ports vs direct attached ports"},{"line_number":8,"context_line":""},{"line_number":9,"context_line":"This patch clarify for what type of ports"},{"line_number":10,"context_line":"detach/attach pci device is needed and for what type of"}],"source_content_type":"text/x-gerrit-commit-message","patch_set":4,"id":"bab6814e_6d55521c","line":7,"in_reply_to":"bab6814e_8a1dff68","updated":"2016-05-18 09:28:11.000000000","message":"Done","commit_id":"7aec4af47799d01ecd01cffc9a1ce0ceff120910"}],"nova/network/model.py":[{"author":{"_account_id":6873,"name":"Matt Riedemann","email":"mriedem.os@gmail.com","username":"mriedem"},"change_message_id":"d9f504859511de01a0c05c538092b82a4a36a235","unresolved":false,"context_lines":[{"line_number":99,"context_line":"# Define list of ports which needs pci request."},{"line_number":100,"context_line":"# Note: The macvtap port needs PCI request as it a tap interface"},{"line_number":101,"context_line":"# with VF as the lower physical interface."},{"line_number":102,"context_line":"VNIC_TYPES_SRIOV \u003d (VNIC_TYPE_DIRECT, VNIC_TYPE_MACVTAP,"},{"line_number":103,"context_line":"                    VNIC_TYPE_DIRECT_PHYSICAL)"},{"line_number":104,"context_line":""},{"line_number":105,"context_line":"# Define list of ports which are direct attached to the guest"}],"source_content_type":"text/x-python","patch_set":2,"id":"9a061dce_570f0de1","line":102,"updated":"2016-04-04 16:45:27.000000000","message":"Is it still accurate to use this list in the compute manager here?\n\nhttps://github.com/openstack/nova/blob/9c1df17547b17a1b098738aa5f71a163fc6b434b/nova/compute/manager.py#L2016","commit_id":"f82fd2b0bec34d3a335c67be61d84795d2fc1516"},{"author":{"_account_id":12171,"name":"Moshe Levi","email":"moshele@nvidia.com","username":"moshele"},"change_message_id":"3d3251d237f71d4d9eef6f6b5a0892d38ea7faeb","unresolved":false,"context_lines":[{"line_number":99,"context_line":"# Define list of ports which needs pci request."},{"line_number":100,"context_line":"# Note: The macvtap port needs PCI request as it a tap interface"},{"line_number":101,"context_line":"# with VF as the lower physical interface."},{"line_number":102,"context_line":"VNIC_TYPES_SRIOV \u003d (VNIC_TYPE_DIRECT, VNIC_TYPE_MACVTAP,"},{"line_number":103,"context_line":"                    VNIC_TYPE_DIRECT_PHYSICAL)"},{"line_number":104,"context_line":""},{"line_number":105,"context_line":"# Define list of ports which are direct attached to the guest"}],"source_content_type":"text/x-python","patch_set":2,"id":"9a061dce_1380cd45","line":102,"in_reply_to":"9a061dce_570f0de1","updated":"2016-04-05 15:54:25.000000000","message":"I think so, according to the commit msg in \nhttps://github.com/openstack/nova/commit/77ab8f29ca19de7667ff32e798bdb4154a0c105e\nThis is for cleaning the port binding which contains the pci device. So we need to do this for all SR-IOV ports.","commit_id":"f82fd2b0bec34d3a335c67be61d84795d2fc1516"},{"author":{"_account_id":17973,"name":"Ludovic Beliveau","email":"lbeliveau@gmail.com","username":"lbeliveau"},"change_message_id":"979b0fa55260cdf3fb357585128fa47ff533b972","unresolved":false,"context_lines":[{"line_number":97,"context_line":"VNIC_TYPE_BAREMETAL \u003d \u0027baremetal\u0027"},{"line_number":98,"context_line":""},{"line_number":99,"context_line":"# Define list of ports which needs pci request."},{"line_number":100,"context_line":"# Note: The macvtap port needs PCI request as it a tap interface"},{"line_number":101,"context_line":"# with VF as the lower physical interface."},{"line_number":102,"context_line":"VNIC_TYPES_SRIOV \u003d (VNIC_TYPE_DIRECT, VNIC_TYPE_MACVTAP,"},{"line_number":103,"context_line":"                    VNIC_TYPE_DIRECT_PHYSICAL)"}],"source_content_type":"text/x-python","patch_set":3,"id":"1a122d0e_a0f66ed4","line":100,"updated":"2016-04-28 15:15:03.000000000","message":"nit: s/needs PCI request as it a tap interface/needs a PCI request as it is a tap interface/","commit_id":"eb8960de90ed196b450c8149cf5845bb6f489df1"},{"author":{"_account_id":12171,"name":"Moshe Levi","email":"moshele@nvidia.com","username":"moshele"},"change_message_id":"2d20f3623bf110b24e7d45c6967ea77c94103588","unresolved":false,"context_lines":[{"line_number":97,"context_line":"VNIC_TYPE_BAREMETAL \u003d \u0027baremetal\u0027"},{"line_number":98,"context_line":""},{"line_number":99,"context_line":"# Define list of ports which needs pci request."},{"line_number":100,"context_line":"# Note: The macvtap port needs PCI request as it a tap interface"},{"line_number":101,"context_line":"# with VF as the lower physical interface."},{"line_number":102,"context_line":"VNIC_TYPES_SRIOV \u003d (VNIC_TYPE_DIRECT, VNIC_TYPE_MACVTAP,"},{"line_number":103,"context_line":"                    VNIC_TYPE_DIRECT_PHYSICAL)"}],"source_content_type":"text/x-python","patch_set":3,"id":"1a122d0e_097b06bf","line":100,"in_reply_to":"1a122d0e_a0f66ed4","updated":"2016-04-28 18:58:53.000000000","message":"Done","commit_id":"eb8960de90ed196b450c8149cf5845bb6f489df1"},{"author":{"_account_id":17973,"name":"Ludovic Beliveau","email":"lbeliveau@gmail.com","username":"lbeliveau"},"change_message_id":"979b0fa55260cdf3fb357585128fa47ff533b972","unresolved":false,"context_lines":[{"line_number":100,"context_line":"# Note: The macvtap port needs PCI request as it a tap interface"},{"line_number":101,"context_line":"# with VF as the lower physical interface."},{"line_number":102,"context_line":"VNIC_TYPES_SRIOV \u003d (VNIC_TYPE_DIRECT, VNIC_TYPE_MACVTAP,"},{"line_number":103,"context_line":"                    VNIC_TYPE_DIRECT_PHYSICAL)"},{"line_number":104,"context_line":""},{"line_number":105,"context_line":"# Define list of ports which are direct attached to the guest"},{"line_number":106,"context_line":"# and need a spacial treatment on snapshot and suspend/resume"}],"source_content_type":"text/x-python","patch_set":3,"id":"1a122d0e_8039b2f4","line":103,"updated":"2016-04-28 15:15:03.000000000","message":"Just a suggestion, please discard if you feel this is not needed.\n\nSince one list is a superset of the other, what about:\n\nVNIC_TYPES_SRIOV \u003d VNIC_TYPES_DIRECT_ATTACHED + [ \u0027VNIC_TYPE_MACVTAP\u0027 ]\n\nThis would make the relation between the two a bit clearer in my opinion.\n\nIt would also mean that we would use list instead of tuple.","commit_id":"eb8960de90ed196b450c8149cf5845bb6f489df1"},{"author":{"_account_id":17973,"name":"Ludovic Beliveau","email":"lbeliveau@gmail.com","username":"lbeliveau"},"change_message_id":"979b0fa55260cdf3fb357585128fa47ff533b972","unresolved":false,"context_lines":[{"line_number":102,"context_line":"VNIC_TYPES_SRIOV \u003d (VNIC_TYPE_DIRECT, VNIC_TYPE_MACVTAP,"},{"line_number":103,"context_line":"                    VNIC_TYPE_DIRECT_PHYSICAL)"},{"line_number":104,"context_line":""},{"line_number":105,"context_line":"# Define list of ports which are direct attached to the guest"},{"line_number":106,"context_line":"# and need a spacial treatment on snapshot and suspend/resume"},{"line_number":107,"context_line":"VNIC_TYPES_DIRECT_ATTACHED \u003d (VNIC_TYPE_DIRECT,"},{"line_number":108,"context_line":"                              VNIC_TYPE_DIRECT_PHYSICAL)"}],"source_content_type":"text/x-python","patch_set":3,"id":"1a122d0e_c07e0a18","line":105,"updated":"2016-04-28 15:15:03.000000000","message":"s/direct/directly/","commit_id":"eb8960de90ed196b450c8149cf5845bb6f489df1"},{"author":{"_account_id":12171,"name":"Moshe Levi","email":"moshele@nvidia.com","username":"moshele"},"change_message_id":"2d20f3623bf110b24e7d45c6967ea77c94103588","unresolved":false,"context_lines":[{"line_number":102,"context_line":"VNIC_TYPES_SRIOV \u003d (VNIC_TYPE_DIRECT, VNIC_TYPE_MACVTAP,"},{"line_number":103,"context_line":"                    VNIC_TYPE_DIRECT_PHYSICAL)"},{"line_number":104,"context_line":""},{"line_number":105,"context_line":"# Define list of ports which are direct attached to the guest"},{"line_number":106,"context_line":"# and need a spacial treatment on snapshot and suspend/resume"},{"line_number":107,"context_line":"VNIC_TYPES_DIRECT_ATTACHED \u003d (VNIC_TYPE_DIRECT,"},{"line_number":108,"context_line":"                              VNIC_TYPE_DIRECT_PHYSICAL)"}],"source_content_type":"text/x-python","patch_set":3,"id":"1a122d0e_694c3a9e","line":105,"in_reply_to":"1a122d0e_c07e0a18","updated":"2016-04-28 18:58:53.000000000","message":"Done","commit_id":"eb8960de90ed196b450c8149cf5845bb6f489df1"},{"author":{"_account_id":17973,"name":"Ludovic Beliveau","email":"lbeliveau@gmail.com","username":"lbeliveau"},"change_message_id":"979b0fa55260cdf3fb357585128fa47ff533b972","unresolved":false,"context_lines":[{"line_number":103,"context_line":"                    VNIC_TYPE_DIRECT_PHYSICAL)"},{"line_number":104,"context_line":""},{"line_number":105,"context_line":"# Define list of ports which are direct attached to the guest"},{"line_number":106,"context_line":"# and need a spacial treatment on snapshot and suspend/resume"},{"line_number":107,"context_line":"VNIC_TYPES_DIRECT_ATTACHED \u003d (VNIC_TYPE_DIRECT,"},{"line_number":108,"context_line":"                              VNIC_TYPE_DIRECT_PHYSICAL)"},{"line_number":109,"context_line":""}],"source_content_type":"text/x-python","patch_set":3,"id":"1a122d0e_408afa1b","line":106,"updated":"2016-04-28 15:15:03.000000000","message":"s/spacial/special/","commit_id":"eb8960de90ed196b450c8149cf5845bb6f489df1"},{"author":{"_account_id":12171,"name":"Moshe Levi","email":"moshele@nvidia.com","username":"moshele"},"change_message_id":"2d20f3623bf110b24e7d45c6967ea77c94103588","unresolved":false,"context_lines":[{"line_number":103,"context_line":"                    VNIC_TYPE_DIRECT_PHYSICAL)"},{"line_number":104,"context_line":""},{"line_number":105,"context_line":"# Define list of ports which are direct attached to the guest"},{"line_number":106,"context_line":"# and need a spacial treatment on snapshot and suspend/resume"},{"line_number":107,"context_line":"VNIC_TYPES_DIRECT_ATTACHED \u003d (VNIC_TYPE_DIRECT,"},{"line_number":108,"context_line":"                              VNIC_TYPE_DIRECT_PHYSICAL)"},{"line_number":109,"context_line":""}],"source_content_type":"text/x-python","patch_set":3,"id":"1a122d0e_494fbe91","line":106,"in_reply_to":"1a122d0e_408afa1b","updated":"2016-04-28 18:58:53.000000000","message":"Done","commit_id":"eb8960de90ed196b450c8149cf5845bb6f489df1"}],"nova/virt/libvirt/driver.py":[{"author":{"_account_id":5511,"name":"Nikola Dipanov","email":"ndipanov@redhat.com","username":"ndipanov"},"change_message_id":"bfb1f26d1c33836fa33cbae5be5b8d6898841e84","unresolved":false,"context_lines":[{"line_number":3332,"context_line":"                                                      dev\u003dpci_devs)"},{"line_number":3333,"context_line":"        try:"},{"line_number":3334,"context_line":"            for dev in pci_devs:"},{"line_number":3335,"context_line":"                guest.detach_device("},{"line_number":3336,"context_line":"                    self._get_guest_pci_device(dev), live\u003dTrue)"},{"line_number":3337,"context_line":"                # after detachDeviceFlags returned, we should check the dom to"},{"line_number":3338,"context_line":"                # ensure the detaching is finished"},{"line_number":3339,"context_line":"                xml \u003d guest.get_xml_desc()"}],"source_content_type":"text/x-python","patch_set":1,"id":"9a061dce_faf2a505","line":3336,"range":{"start_line":3335,"start_character":16,"end_line":3336,"end_character":63},"updated":"2016-04-04 07:52:05.000000000","message":"This is just a random whitespace change.","commit_id":"043a9f2840d27048a8d9d093d1083c41ab1fe787"},{"author":{"_account_id":12171,"name":"Moshe Levi","email":"moshele@nvidia.com","username":"moshele"},"change_message_id":"8b9bdef53d74710074316b45113f157d0cbeb940","unresolved":false,"context_lines":[{"line_number":3332,"context_line":"                                                      dev\u003dpci_devs)"},{"line_number":3333,"context_line":"        try:"},{"line_number":3334,"context_line":"            for dev in pci_devs:"},{"line_number":3335,"context_line":"                guest.detach_device("},{"line_number":3336,"context_line":"                    self._get_guest_pci_device(dev), live\u003dTrue)"},{"line_number":3337,"context_line":"                # after detachDeviceFlags returned, we should check the dom to"},{"line_number":3338,"context_line":"                # ensure the detaching is finished"},{"line_number":3339,"context_line":"                xml \u003d guest.get_xml_desc()"}],"source_content_type":"text/x-python","patch_set":1,"id":"9a061dce_1ac79946","line":3336,"range":{"start_line":3335,"start_character":16,"end_line":3336,"end_character":63},"in_reply_to":"9a061dce_faf2a505","updated":"2016-04-04 08:09:08.000000000","message":"Done","commit_id":"043a9f2840d27048a8d9d093d1083c41ab1fe787"},{"author":{"_account_id":16929,"name":"Giridhar Jayavelu","email":"gjayavelu@vmware.com","username":"gjayavelu"},"change_message_id":"fc0e00d0dab01c1c11c9ecf03168726d3a38b14b","unresolved":false,"context_lines":[{"line_number":3372,"context_line":"                return True"},{"line_number":3373,"context_line":"        return False"},{"line_number":3374,"context_line":""},{"line_number":3375,"context_line":"    def _attach_direct_attached_ports("},{"line_number":3376,"context_line":"        self, context, instance, guest, network_info\u003dNone):"},{"line_number":3377,"context_line":"        if network_info is None:"},{"line_number":3378,"context_line":"            network_info \u003d instance.info_cache.network_info"}],"source_content_type":"text/x-python","patch_set":4,"id":"bab6814e_1f866fb9","line":3375,"updated":"2016-05-18 05:54:19.000000000","message":"can we call it as _attach_direct_passthrough_ports to avoid repeating *attach*?","commit_id":"7aec4af47799d01ecd01cffc9a1ce0ceff120910"},{"author":{"_account_id":12171,"name":"Moshe Levi","email":"moshele@nvidia.com","username":"moshele"},"change_message_id":"b249034d12853288b6169ab115757f25a59712d1","unresolved":false,"context_lines":[{"line_number":3372,"context_line":"                return True"},{"line_number":3373,"context_line":"        return False"},{"line_number":3374,"context_line":""},{"line_number":3375,"context_line":"    def _attach_direct_attached_ports("},{"line_number":3376,"context_line":"        self, context, instance, guest, network_info\u003dNone):"},{"line_number":3377,"context_line":"        if network_info is None:"},{"line_number":3378,"context_line":"            network_info \u003d instance.info_cache.network_info"}],"source_content_type":"text/x-python","patch_set":4,"id":"bab6814e_7073654e","line":3375,"in_reply_to":"bab6814e_1f866fb9","updated":"2016-05-18 09:28:11.000000000","message":"Done","commit_id":"7aec4af47799d01ecd01cffc9a1ce0ceff120910"},{"author":{"_account_id":16929,"name":"Giridhar Jayavelu","email":"gjayavelu@vmware.com","username":"gjayavelu"},"change_message_id":"fc0e00d0dab01c1c11c9ecf03168726d3a38b14b","unresolved":false,"context_lines":[{"line_number":3394,"context_line":"                              instance\u003dinstance)"},{"line_number":3395,"context_line":"                    guest.attach_device(cfg)"},{"line_number":3396,"context_line":""},{"line_number":3397,"context_line":"    def _detach_direct_attached_ports(self, context, instance, guest):"},{"line_number":3398,"context_line":"        network_info \u003d instance.info_cache.network_info"},{"line_number":3399,"context_line":"        if network_info is None:"},{"line_number":3400,"context_line":"            return"}],"source_content_type":"text/x-python","patch_set":4,"id":"bab6814e_3fb0938b","line":3397,"updated":"2016-05-18 05:54:19.000000000","message":"same as above.\n_detach_direct_passthrough_ports","commit_id":"7aec4af47799d01ecd01cffc9a1ce0ceff120910"},{"author":{"_account_id":12171,"name":"Moshe Levi","email":"moshele@nvidia.com","username":"moshele"},"change_message_id":"b249034d12853288b6169ab115757f25a59712d1","unresolved":false,"context_lines":[{"line_number":3394,"context_line":"                              instance\u003dinstance)"},{"line_number":3395,"context_line":"                    guest.attach_device(cfg)"},{"line_number":3396,"context_line":""},{"line_number":3397,"context_line":"    def _detach_direct_attached_ports(self, context, instance, guest):"},{"line_number":3398,"context_line":"        network_info \u003d instance.info_cache.network_info"},{"line_number":3399,"context_line":"        if network_info is None:"},{"line_number":3400,"context_line":"            return"}],"source_content_type":"text/x-python","patch_set":4,"id":"bab6814e_8295dc41","line":3397,"in_reply_to":"bab6814e_3fb0938b","updated":"2016-05-18 09:28:11.000000000","message":"Done","commit_id":"7aec4af47799d01ecd01cffc9a1ce0ceff120910"},{"author":{"_account_id":16929,"name":"Giridhar Jayavelu","email":"gjayavelu@vmware.com","username":"gjayavelu"},"change_message_id":"d116fc69b4984e89460ff3ad61f9cb7e9e3ab9d4","unresolved":false,"context_lines":[{"line_number":3189,"context_line":"                                                     instance.flavor,"},{"line_number":3190,"context_line":"                                                     CONF.libvirt.virt_type,"},{"line_number":3191,"context_line":"                                                     self._host)"},{"line_number":3192,"context_line":"                    LOG.debug(\u0027Attaching SR-IOV port %(port)s to %(dom)s\u0027,"},{"line_number":3193,"context_line":"                              {\u0027port\u0027: vif, \u0027dom\u0027: guest.id},"},{"line_number":3194,"context_line":"                              instance\u003dinstance)"},{"line_number":3195,"context_line":"                    guest.attach_device(cfg)"}],"source_content_type":"text/x-python","patch_set":5,"id":"bab6814e_b25daaeb","line":3192,"updated":"2016-05-18 18:22:19.000000000","message":"Attaching direct passthrough port ...","commit_id":"f3cd3280efb0fb32cd29338221b96767c8c48e0b"},{"author":{"_account_id":12171,"name":"Moshe Levi","email":"moshele@nvidia.com","username":"moshele"},"change_message_id":"6ad1e78d8f2bea533a0befdb7f7639c8fdb86320","unresolved":false,"context_lines":[{"line_number":3189,"context_line":"                                                     instance.flavor,"},{"line_number":3190,"context_line":"                                                     CONF.libvirt.virt_type,"},{"line_number":3191,"context_line":"                                                     self._host)"},{"line_number":3192,"context_line":"                    LOG.debug(\u0027Attaching SR-IOV port %(port)s to %(dom)s\u0027,"},{"line_number":3193,"context_line":"                              {\u0027port\u0027: vif, \u0027dom\u0027: guest.id},"},{"line_number":3194,"context_line":"                              instance\u003dinstance)"},{"line_number":3195,"context_line":"                    guest.attach_device(cfg)"}],"source_content_type":"text/x-python","patch_set":5,"id":"bab6814e_ecc6e098","line":3192,"in_reply_to":"bab6814e_b25daaeb","updated":"2016-05-23 09:05:45.000000000","message":"Done","commit_id":"f3cd3280efb0fb32cd29338221b96767c8c48e0b"},{"author":{"_account_id":16929,"name":"Giridhar Jayavelu","email":"gjayavelu@vmware.com","username":"gjayavelu"},"change_message_id":"d116fc69b4984e89460ff3ad61f9cb7e9e3ab9d4","unresolved":false,"context_lines":[{"line_number":3200,"context_line":"            return"},{"line_number":3201,"context_line":""},{"line_number":3202,"context_line":"        if self._has_direct_passthrough_port(network_info):"},{"line_number":3203,"context_line":"            # In case of SR-IOV vif types we create pci request per SR-IOV port"},{"line_number":3204,"context_line":"            # Therefore we can trust that pci_slot value in the vif is correct."},{"line_number":3205,"context_line":"            sriov_pci_addresses \u003d ["},{"line_number":3206,"context_line":"                vif[\u0027profile\u0027][\u0027pci_slot\u0027]"}],"source_content_type":"text/x-python","patch_set":5,"id":"bab6814e_526d5e97","line":3203,"updated":"2016-05-18 18:22:19.000000000","message":"is this comment still valid?","commit_id":"f3cd3280efb0fb32cd29338221b96767c8c48e0b"},{"author":{"_account_id":12171,"name":"Moshe Levi","email":"moshele@nvidia.com","username":"moshele"},"change_message_id":"6ad1e78d8f2bea533a0befdb7f7639c8fdb86320","unresolved":false,"context_lines":[{"line_number":3200,"context_line":"            return"},{"line_number":3201,"context_line":""},{"line_number":3202,"context_line":"        if self._has_direct_passthrough_port(network_info):"},{"line_number":3203,"context_line":"            # In case of SR-IOV vif types we create pci request per SR-IOV port"},{"line_number":3204,"context_line":"            # Therefore we can trust that pci_slot value in the vif is correct."},{"line_number":3205,"context_line":"            sriov_pci_addresses \u003d ["},{"line_number":3206,"context_line":"                vif[\u0027profile\u0027][\u0027pci_slot\u0027]"}],"source_content_type":"text/x-python","patch_set":5,"id":"bab6814e_27b9d72e","line":3203,"in_reply_to":"bab6814e_526d5e97","updated":"2016-05-23 09:05:45.000000000","message":"yes, but I updated the comment for just direct passthrough ports","commit_id":"f3cd3280efb0fb32cd29338221b96767c8c48e0b"},{"author":{"_account_id":16929,"name":"Giridhar Jayavelu","email":"gjayavelu@vmware.com","username":"gjayavelu"},"change_message_id":"d116fc69b4984e89460ff3ad61f9cb7e9e3ab9d4","unresolved":false,"context_lines":[{"line_number":3202,"context_line":"        if self._has_direct_passthrough_port(network_info):"},{"line_number":3203,"context_line":"            # In case of SR-IOV vif types we create pci request per SR-IOV port"},{"line_number":3204,"context_line":"            # Therefore we can trust that pci_slot value in the vif is correct."},{"line_number":3205,"context_line":"            sriov_pci_addresses \u003d ["},{"line_number":3206,"context_line":"                vif[\u0027profile\u0027][\u0027pci_slot\u0027]"},{"line_number":3207,"context_line":"                for vif in network_info"},{"line_number":3208,"context_line":"                if (vif[\u0027vnic_type\u0027] in"}],"source_content_type":"text/x-python","patch_set":5,"id":"bab6814e_922ce64b","line":3205,"updated":"2016-05-18 18:22:19.000000000","message":"please rename this variable too.","commit_id":"f3cd3280efb0fb32cd29338221b96767c8c48e0b"},{"author":{"_account_id":12171,"name":"Moshe Levi","email":"moshele@nvidia.com","username":"moshele"},"change_message_id":"6ad1e78d8f2bea533a0befdb7f7639c8fdb86320","unresolved":false,"context_lines":[{"line_number":3202,"context_line":"        if self._has_direct_passthrough_port(network_info):"},{"line_number":3203,"context_line":"            # In case of SR-IOV vif types we create pci request per SR-IOV port"},{"line_number":3204,"context_line":"            # Therefore we can trust that pci_slot value in the vif is correct."},{"line_number":3205,"context_line":"            sriov_pci_addresses \u003d ["},{"line_number":3206,"context_line":"                vif[\u0027profile\u0027][\u0027pci_slot\u0027]"},{"line_number":3207,"context_line":"                for vif in network_info"},{"line_number":3208,"context_line":"                if (vif[\u0027vnic_type\u0027] in"}],"source_content_type":"text/x-python","patch_set":5,"id":"bab6814e_67859f58","line":3205,"in_reply_to":"bab6814e_922ce64b","updated":"2016-05-23 09:05:45.000000000","message":"Done","commit_id":"f3cd3280efb0fb32cd29338221b96767c8c48e0b"},{"author":{"_account_id":16929,"name":"Giridhar Jayavelu","email":"gjayavelu@vmware.com","username":"gjayavelu"},"change_message_id":"aec5634821702d737bf2c4495c8245d82fbac032","unresolved":false,"context_lines":[{"line_number":3201,"context_line":""},{"line_number":3202,"context_line":"        if self._has_direct_passthrough_port(network_info):"},{"line_number":3203,"context_line":"            # In case of VNIC_TYPES_DIRECT_PASSTHROUGH ports we create"},{"line_number":3204,"context_line":"            # pci request per SR-IOV port. Therefore we can trust that"},{"line_number":3205,"context_line":"            # pci_slot value in the vif is correct."},{"line_number":3206,"context_line":"            direct_passthrough_pci_addresses \u003d ["},{"line_number":3207,"context_line":"                vif[\u0027profile\u0027][\u0027pci_slot\u0027]"}],"source_content_type":"text/x-python","patch_set":6,"id":"bab6814e_76c981ac","line":3204,"updated":"2016-05-24 13:07:55.000000000","message":"shouldn\u0027t this be direct passthrough port instead of SR-IOV port?","commit_id":"9d95853746997647de08b66380f27d98deea9a9d"},{"author":{"_account_id":15334,"name":"Stephen Finucane","display_name":"stephenfin","email":"stephenfin@redhat.com","username":"sfinucan"},"change_message_id":"74c2d44648c06a7aec218da3ac538bc3d55d0d20","unresolved":false,"context_lines":[{"line_number":3201,"context_line":""},{"line_number":3202,"context_line":"        if self._has_direct_passthrough_port(network_info):"},{"line_number":3203,"context_line":"            # In case of VNIC_TYPES_DIRECT_PASSTHROUGH ports we create"},{"line_number":3204,"context_line":"            # pci request per SR-IOV port. Therefore we can trust that"},{"line_number":3205,"context_line":"            # pci_slot value in the vif is correct."},{"line_number":3206,"context_line":"            direct_passthrough_pci_addresses \u003d ["},{"line_number":3207,"context_line":"                vif[\u0027profile\u0027][\u0027pci_slot\u0027]"}],"source_content_type":"text/x-python","patch_set":6,"id":"1ac06dbe_52e46a3a","line":3204,"in_reply_to":"bab6814e_76c981ac","updated":"2016-08-19 11:29:45.000000000","message":"+1","commit_id":"9d95853746997647de08b66380f27d98deea9a9d"},{"author":{"_account_id":12171,"name":"Moshe Levi","email":"moshele@nvidia.com","username":"moshele"},"change_message_id":"b6e4a1bfa1f84a1d6d8db2f4b5a2e3345ed7bf47","unresolved":false,"context_lines":[{"line_number":3201,"context_line":""},{"line_number":3202,"context_line":"        if self._has_direct_passthrough_port(network_info):"},{"line_number":3203,"context_line":"            # In case of VNIC_TYPES_DIRECT_PASSTHROUGH ports we create"},{"line_number":3204,"context_line":"            # pci request per SR-IOV port. Therefore we can trust that"},{"line_number":3205,"context_line":"            # pci_slot value in the vif is correct."},{"line_number":3206,"context_line":"            direct_passthrough_pci_addresses \u003d ["},{"line_number":3207,"context_line":"                vif[\u0027profile\u0027][\u0027pci_slot\u0027]"}],"source_content_type":"text/x-python","patch_set":6,"id":"7a8ec9b2_b98bb367","line":3204,"in_reply_to":"bab6814e_76c981ac","updated":"2016-09-20 13:18:07.000000000","message":"Done","commit_id":"9d95853746997647de08b66380f27d98deea9a9d"}]}