)]}'
{"/COMMIT_MSG":[{"author":{"_account_id":6873,"name":"Matt Riedemann","email":"mriedem.os@gmail.com","username":"mriedem"},"change_message_id":"5f015afd883167070c350a3175055eb4f60371c7","unresolved":false,"context_lines":[{"line_number":10,"context_line":"in binding profile."},{"line_number":11,"context_line":""},{"line_number":12,"context_line":"This patch adds pf_pci_slot to the port binding profile."},{"line_number":13,"context_line":""},{"line_number":14,"context_line":"Change-Id: Idf346de3301ed49b4bddfa59d1ae09e076919f64"},{"line_number":15,"context_line":"Implements: blueprint add-physical-pci-info-for-sriov-ports"}],"source_content_type":"text/x-gerrit-commit-message","patch_set":1,"id":"9f91af0f_3938a39e","line":13,"updated":"2018-01-04 21:21:31.000000000","message":"If there are no related neutron changes for this, can you explain what is consuming this information? An out of tree vif plugin? If so, please explain that in the commit message.","commit_id":"72292842e5896759b34906485a5880a5bf610463"}],"nova/network/neutronv2/api.py":[{"author":{"_account_id":12171,"name":"Moshe Levi","email":"moshele@nvidia.com","username":"moshele"},"change_message_id":"47e0dc853c765fb29f1d1f3085b3008b61174139","unresolved":false,"context_lines":[{"line_number":1090,"context_line":"        return constants.QOS_QUEUE in self.extensions"},{"line_number":1091,"context_line":""},{"line_number":1092,"context_line":"    def _get_pci_device_profile(self, pci_dev):"},{"line_number":1093,"context_line":"        dev_spec \u003d self.pci_whitelist.get_devspec(pci_dev)"},{"line_number":1094,"context_line":"        if dev_spec:"},{"line_number":1095,"context_line":"            pf_pci_slot \u003d pci_utils.get_pf_pci_by_vfpci_address("},{"line_number":1096,"context_line":"                pci_dev.address)"}],"source_content_type":"text/x-python","patch_set":1,"id":"9f91af0f_391bc381","line":1093,"range":{"start_line":1093,"start_character":50,"end_line":1093,"end_character":57},"updated":"2018-01-04 21:55:51.000000000","message":"the pci device here can be VF or PF it depend of the port type. it will be VF if it port is direct/macvtap and pf it the port is direct-physical. \n\nIn case of Active and Available Inventory (AAI) ONDP so you want to know what are the PF/VFs that are allocated?\nif that is the case I will go with exposing the nova pci_devices table in api to provide this information.","commit_id":"72292842e5896759b34906485a5880a5bf610463"}],"nova/pci/utils.py":[{"author":{"_account_id":6873,"name":"Matt Riedemann","email":"mriedem.os@gmail.com","username":"mriedem"},"change_message_id":"ecbcb8c873fed44e6f614a30c66feee81e2e4ca6","unresolved":false,"context_lines":[{"line_number":217,"context_line":"        return"},{"line_number":218,"context_line":""},{"line_number":219,"context_line":""},{"line_number":220,"context_line":"def get_pf_pci_by_vfpci_address(pci_addr):"},{"line_number":221,"context_line":"    PCI_SLOT_FIELD_NAME \u003d \"PCI_SLOT_NAME\""},{"line_number":222,"context_line":""},{"line_number":223,"context_line":"    dev_path \u003d \"/sys/bus/pci/devices/{pci_addr}/physfn/uevent\".format("}],"source_content_type":"text/x-python","patch_set":1,"id":"9f91af0f_f97ebb69","line":220,"range":{"start_line":220,"start_character":4,"end_line":220,"end_character":31},"updated":"2018-01-04 21:20:32.000000000","message":"As far as I can tell you have no testing for this code, since it\u0027s usage is all mocked out in the neutron tests.","commit_id":"72292842e5896759b34906485a5880a5bf610463"},{"author":{"_account_id":6873,"name":"Matt Riedemann","email":"mriedem.os@gmail.com","username":"mriedem"},"change_message_id":"73962545013d9d5a2abb7163343c5ab33edb1415","unresolved":false,"context_lines":[{"line_number":220,"context_line":"def get_pf_pci_by_vfpci_address(pci_addr):"},{"line_number":221,"context_line":"    PCI_SLOT_FIELD_NAME \u003d \"PCI_SLOT_NAME\""},{"line_number":222,"context_line":""},{"line_number":223,"context_line":"    dev_path \u003d \"/sys/bus/pci/devices/{pci_addr}/physfn/uevent\".format("},{"line_number":224,"context_line":"        pci_addr\u003dpci_addr)"},{"line_number":225,"context_line":""},{"line_number":226,"context_line":"    if os.path.isfile(dev_path):"}],"source_content_type":"text/x-python","patch_set":1,"id":"9f91af0f_d96f3790","line":223,"updated":"2018-01-04 21:26:07.000000000","message":"This is not safe for all environments, e.g. powervm.","commit_id":"72292842e5896759b34906485a5880a5bf610463"}]}