)]}'
{"/COMMIT_MSG":[{"author":{"_account_id":6962,"name":"Kashyap Chamarthy","email":"kchamart@redhat.com","username":"kashyapc"},"change_message_id":"4184272d34e44d3c3fb2629771b7cc7a4ce60f63","unresolved":false,"context_lines":[{"line_number":22,"context_line":"   autoadd any entry for requested hardware."},{"line_number":23,"context_line":""},{"line_number":24,"context_line":"On AArch64 with graphical console we have 5 pcie devices: disk, network,"},{"line_number":25,"context_line":"video, usb, balloon."},{"line_number":26,"context_line":""},{"line_number":27,"context_line":"Change-Id: Ic3c8761bcde3e842d1b8e1feff1d158630de59ae"}],"source_content_type":"text/x-gerrit-commit-message","patch_set":5,"id":"3fa0c359_59d7d624","line":25,"updated":"2018-02-16 14:15:21.000000000","message":"Can you write a bit about x86_64 too, please?  Since you\u0027re addressing both cases.","commit_id":"ae8177597078e700799d182263535acdfa8a01cc"},{"author":{"_account_id":24072,"name":"Marcin Juszkiewicz","email":"mjuszkiewicz@redhat.com","username":"hrw"},"change_message_id":"92de30ea3ccdb54830b882507161e98355921b07","unresolved":false,"context_lines":[{"line_number":22,"context_line":"   autoadd any entry for requested hardware."},{"line_number":23,"context_line":""},{"line_number":24,"context_line":"On AArch64 with graphical console we have 5 pcie devices: disk, network,"},{"line_number":25,"context_line":"video, usb, balloon."},{"line_number":26,"context_line":""},{"line_number":27,"context_line":"Change-Id: Ic3c8761bcde3e842d1b8e1feff1d158630de59ae"}],"source_content_type":"text/x-gerrit-commit-message","patch_set":5,"id":"3fa0c359_f9a90290","line":25,"in_reply_to":"3fa0c359_59d7d624","updated":"2018-02-16 14:17:20.000000000","message":"Have to setup all-in-one x86-64 setup for testing first. Next week then.","commit_id":"ae8177597078e700799d182263535acdfa8a01cc"},{"author":{"_account_id":7166,"name":"Sylvain Bauza","email":"sbauza@redhat.com","username":"sbauza"},"change_message_id":"bc4e1816296d33a210c3c00c1d775eb559dfdf60","unresolved":false,"context_lines":[{"line_number":6,"context_line":""},{"line_number":7,"context_line":"Allow to configure amount of PCIe ports"},{"line_number":8,"context_line":""},{"line_number":9,"context_line":"Libvirt adds as much pcie-root-port entries (aka virtual pcie slots) as"},{"line_number":10,"context_line":"it needs and adds one free. If we want to hotplug network interfaces or"},{"line_number":11,"context_line":"storage devices then we quickly run out of available pcie slots."},{"line_number":12,"context_line":""},{"line_number":13,"context_line":"This patch allows to configure amount of PCIe slots in instance. Method"}],"source_content_type":"text/x-gerrit-commit-message","patch_set":8,"id":"3fa0c359_436ca307","line":10,"range":{"start_line":9,"start_character":68,"end_line":10,"end_character":26},"updated":"2018-02-19 09:28:22.000000000","message":"What do you mean ? Libvirtd created the needed PCIe ports every time it needs it for a specific feature, like a network device ?","commit_id":"e9d5985b87aabe99d874ac4db5e3c00d1dcf1648"},{"author":{"_account_id":24072,"name":"Marcin Juszkiewicz","email":"mjuszkiewicz@redhat.com","username":"hrw"},"change_message_id":"43eed5ab4e39a67f82d50cff8aeada4741b04c00","unresolved":false,"context_lines":[{"line_number":6,"context_line":""},{"line_number":7,"context_line":"Allow to configure amount of PCIe ports"},{"line_number":8,"context_line":""},{"line_number":9,"context_line":"Libvirt adds as much pcie-root-port entries (aka virtual pcie slots) as"},{"line_number":10,"context_line":"it needs and adds one free. If we want to hotplug network interfaces or"},{"line_number":11,"context_line":"storage devices then we quickly run out of available pcie slots."},{"line_number":12,"context_line":""},{"line_number":13,"context_line":"This patch allows to configure amount of PCIe slots in instance. Method"}],"source_content_type":"text/x-gerrit-commit-message","patch_set":8,"id":"3fa0c359_a6d5751d","line":10,"range":{"start_line":9,"start_character":68,"end_line":10,"end_character":26},"in_reply_to":"3fa0c359_436ca307","updated":"2018-02-19 09:58:05.000000000","message":"After _get_guest_config() function Nova has an XML with guest setup and passes it to libvirtd. Then for each PCI card (storage, network, video, balloon, usb) one pcie-root-port is created.","commit_id":"e9d5985b87aabe99d874ac4db5e3c00d1dcf1648"},{"author":{"_account_id":7166,"name":"Sylvain Bauza","email":"sbauza@redhat.com","username":"sbauza"},"change_message_id":"bc4e1816296d33a210c3c00c1d775eb559dfdf60","unresolved":false,"context_lines":[{"line_number":10,"context_line":"it needs and adds one free. If we want to hotplug network interfaces or"},{"line_number":11,"context_line":"storage devices then we quickly run out of available pcie slots."},{"line_number":12,"context_line":""},{"line_number":13,"context_line":"This patch allows to configure amount of PCIe slots in instance. Method"},{"line_number":14,"context_line":"was discussed with libvirt developers."},{"line_number":15,"context_line":""},{"line_number":16,"context_line":"We have two ways of adding pcie-root-port entries:"},{"line_number":17,"context_line":""}],"source_content_type":"text/x-gerrit-commit-message","patch_set":8,"id":"3fa0c359_834b8b85","line":14,"range":{"start_line":13,"start_character":64,"end_line":14,"end_character":38},"updated":"2018-02-19 09:28:22.000000000","message":"Where ? Who ones ? The Nova libvirt maintainers or the upstream libvirt developers ?","commit_id":"e9d5985b87aabe99d874ac4db5e3c00d1dcf1648"},{"author":{"_account_id":24072,"name":"Marcin Juszkiewicz","email":"mjuszkiewicz@redhat.com","username":"hrw"},"change_message_id":"43eed5ab4e39a67f82d50cff8aeada4741b04c00","unresolved":false,"context_lines":[{"line_number":10,"context_line":"it needs and adds one free. If we want to hotplug network interfaces or"},{"line_number":11,"context_line":"storage devices then we quickly run out of available pcie slots."},{"line_number":12,"context_line":""},{"line_number":13,"context_line":"This patch allows to configure amount of PCIe slots in instance. Method"},{"line_number":14,"context_line":"was discussed with libvirt developers."},{"line_number":15,"context_line":""},{"line_number":16,"context_line":"We have two ways of adding pcie-root-port entries:"},{"line_number":17,"context_line":""}],"source_content_type":"text/x-gerrit-commit-message","patch_set":8,"id":"3fa0c359_862dd947","line":14,"range":{"start_line":13,"start_character":64,"end_line":14,"end_character":38},"in_reply_to":"3fa0c359_834b8b85","updated":"2018-02-19 09:58:05.000000000","message":"upstream libvirt","commit_id":"e9d5985b87aabe99d874ac4db5e3c00d1dcf1648"},{"author":{"_account_id":7166,"name":"Sylvain Bauza","email":"sbauza@redhat.com","username":"sbauza"},"change_message_id":"bc4e1816296d33a210c3c00c1d775eb559dfdf60","unresolved":false,"context_lines":[{"line_number":16,"context_line":"We have two ways of adding pcie-root-port entries:"},{"line_number":17,"context_line":""},{"line_number":18,"context_line":"1. We add it with index \u003e0 and hope it will work (handling missing index"},{"line_number":19,"context_line":"   entries may be undefined in guest systems)"},{"line_number":20,"context_line":"2. We create whole PCIe structure starting with pcie-root/0 and then add"},{"line_number":21,"context_line":"   as many pcie-root-port/0 entries as we want slots. Libvirt will not"},{"line_number":22,"context_line":"   autoadd any entry for requested hardware."}],"source_content_type":"text/x-gerrit-commit-message","patch_set":8,"id":"3fa0c359_a3332713","line":19,"updated":"2018-02-19 09:28:22.000000000","message":"That is unclear, I don\u0027t see where you implemented that.","commit_id":"e9d5985b87aabe99d874ac4db5e3c00d1dcf1648"},{"author":{"_account_id":24072,"name":"Marcin Juszkiewicz","email":"mjuszkiewicz@redhat.com","username":"hrw"},"change_message_id":"43eed5ab4e39a67f82d50cff8aeada4741b04c00","unresolved":false,"context_lines":[{"line_number":16,"context_line":"We have two ways of adding pcie-root-port entries:"},{"line_number":17,"context_line":""},{"line_number":18,"context_line":"1. We add it with index \u003e0 and hope it will work (handling missing index"},{"line_number":19,"context_line":"   entries may be undefined in guest systems)"},{"line_number":20,"context_line":"2. We create whole PCIe structure starting with pcie-root/0 and then add"},{"line_number":21,"context_line":"   as many pcie-root-port/0 entries as we want slots. Libvirt will not"},{"line_number":22,"context_line":"   autoadd any entry for requested hardware."}],"source_content_type":"text/x-gerrit-commit-message","patch_set":8,"id":"3fa0c359_46b591ed","line":19,"in_reply_to":"3fa0c359_a3332713","updated":"2018-02-19 09:58:05.000000000","message":"There is no and will not be implementation of that way because 2nd one is proper one.\n\nWill rephrase commit message to remove that list.","commit_id":"e9d5985b87aabe99d874ac4db5e3c00d1dcf1648"},{"author":{"_account_id":7166,"name":"Sylvain Bauza","email":"sbauza@redhat.com","username":"sbauza"},"change_message_id":"bc4e1816296d33a210c3c00c1d775eb559dfdf60","unresolved":false,"context_lines":[{"line_number":19,"context_line":"   entries may be undefined in guest systems)"},{"line_number":20,"context_line":"2. We create whole PCIe structure starting with pcie-root/0 and then add"},{"line_number":21,"context_line":"   as many pcie-root-port/0 entries as we want slots. Libvirt will not"},{"line_number":22,"context_line":"   autoadd any entry for requested hardware."},{"line_number":23,"context_line":""},{"line_number":24,"context_line":"Change-Id: Ic3c8761bcde3e842d1b8e1feff1d158630de59ae"}],"source_content_type":"text/x-gerrit-commit-message","patch_set":8,"id":"3fa0c359_03245bc5","line":22,"updated":"2018-02-19 09:28:22.000000000","message":"You also provide a backwards compatability by saying that if the operator doesn\u0027t modify nova.conf, libvirtd will just autocreate the needed pcie devices like it was doing previously.","commit_id":"e9d5985b87aabe99d874ac4db5e3c00d1dcf1648"},{"author":{"_account_id":24072,"name":"Marcin Juszkiewicz","email":"mjuszkiewicz@redhat.com","username":"hrw"},"change_message_id":"43eed5ab4e39a67f82d50cff8aeada4741b04c00","unresolved":false,"context_lines":[{"line_number":19,"context_line":"   entries may be undefined in guest systems)"},{"line_number":20,"context_line":"2. We create whole PCIe structure starting with pcie-root/0 and then add"},{"line_number":21,"context_line":"   as many pcie-root-port/0 entries as we want slots. Libvirt will not"},{"line_number":22,"context_line":"   autoadd any entry for requested hardware."},{"line_number":23,"context_line":""},{"line_number":24,"context_line":"Change-Id: Ic3c8761bcde3e842d1b8e1feff1d158630de59ae"}],"source_content_type":"text/x-gerrit-commit-message","patch_set":8,"id":"3fa0c359_66b8cde4","line":22,"in_reply_to":"3fa0c359_03245bc5","updated":"2018-02-19 09:58:05.000000000","message":"yes","commit_id":"e9d5985b87aabe99d874ac4db5e3c00d1dcf1648"},{"author":{"_account_id":7,"name":"Jay Pipes","email":"jaypipes@gmail.com","username":"jaypipes"},"change_message_id":"6d60889ceb99c13fcf16f29042f266b2669d31be","unresolved":false,"context_lines":[{"line_number":6,"context_line":""},{"line_number":7,"context_line":"Allow to configure amount of PCIe ports"},{"line_number":8,"context_line":""},{"line_number":9,"context_line":"On x86-64/q35 and aarch64/virt instances libvirt adds as much pcie-root-port"},{"line_number":10,"context_line":"entries (aka virtual pcie slots) as it needs and adds one free. If we want to"},{"line_number":11,"context_line":"hotplug network interfaces or storage devices then we quickly run out of"},{"line_number":12,"context_line":"available pcie slots."}],"source_content_type":"text/x-gerrit-commit-message","patch_set":10,"id":"3fa0c359_9953ba39","line":9,"range":{"start_line":9,"start_character":57,"end_line":9,"end_character":61},"updated":"2018-02-21 16:46:04.000000000","message":"many","commit_id":"785e915bba9ab9360d92813e529df5d47b2806e4"},{"author":{"_account_id":24072,"name":"Marcin Juszkiewicz","email":"mjuszkiewicz@redhat.com","username":"hrw"},"change_message_id":"3297133cd933ea52fad90f8ebbba26f6f354bc33","unresolved":false,"context_lines":[{"line_number":6,"context_line":""},{"line_number":7,"context_line":"Allow to configure amount of PCIe ports"},{"line_number":8,"context_line":""},{"line_number":9,"context_line":"On x86-64/q35 and aarch64/virt instances libvirt adds as much pcie-root-port"},{"line_number":10,"context_line":"entries (aka virtual pcie slots) as it needs and adds one free. If we want to"},{"line_number":11,"context_line":"hotplug network interfaces or storage devices then we quickly run out of"},{"line_number":12,"context_line":"available pcie slots."}],"source_content_type":"text/x-gerrit-commit-message","patch_set":10,"id":"3fa0c359_f469a3f7","line":9,"range":{"start_line":9,"start_character":57,"end_line":9,"end_character":61},"in_reply_to":"3fa0c359_9953ba39","updated":"2018-02-21 17:06:50.000000000","message":"Done","commit_id":"785e915bba9ab9360d92813e529df5d47b2806e4"},{"author":{"_account_id":15334,"name":"Stephen Finucane","display_name":"stephenfin","email":"stephenfin@redhat.com","username":"sfinucan"},"change_message_id":"92980fe13dd69f394bafe45f847139695c39916e","unresolved":false,"context_lines":[{"line_number":11,"context_line":"free. If we want to hotplug network interfaces or storage devices then"},{"line_number":12,"context_line":"we quickly run out of available pcie slots."},{"line_number":13,"context_line":""},{"line_number":14,"context_line":"This patch allows to configure amount of PCIe slots in instance. Method"},{"line_number":15,"context_line":"was discussed with upstream libvirt developers."},{"line_number":16,"context_line":""},{"line_number":17,"context_line":"To have requested amount of pcie-root-port entries we have to create"},{"line_number":18,"context_line":"whole PCIe structure starting with pcie-root/0 and then add as many"}],"source_content_type":"text/x-gerrit-commit-message","patch_set":13,"id":"df7087c5_16cf0480","line":15,"range":{"start_line":14,"start_character":64,"end_line":15,"end_character":47},"updated":"2018-03-07 16:36:40.000000000","message":"link?","commit_id":"c09d6caa50faf87670534726237568e35cae2244"},{"author":{"_account_id":24072,"name":"Marcin Juszkiewicz","email":"mjuszkiewicz@redhat.com","username":"hrw"},"change_message_id":"1cf3a3b38e246c0f8f5e081a784fd5cd40c3747e","unresolved":false,"context_lines":[{"line_number":11,"context_line":"free. If we want to hotplug network interfaces or storage devices then"},{"line_number":12,"context_line":"we quickly run out of available pcie slots."},{"line_number":13,"context_line":""},{"line_number":14,"context_line":"This patch allows to configure amount of PCIe slots in instance. Method"},{"line_number":15,"context_line":"was discussed with upstream libvirt developers."},{"line_number":16,"context_line":""},{"line_number":17,"context_line":"To have requested amount of pcie-root-port entries we have to create"},{"line_number":18,"context_line":"whole PCIe structure starting with pcie-root/0 and then add as many"}],"source_content_type":"text/x-gerrit-commit-message","patch_set":13,"id":"df7087c5_768760d9","line":15,"range":{"start_line":14,"start_character":64,"end_line":15,"end_character":47},"in_reply_to":"df7087c5_16cf0480","updated":"2018-03-07 16:51:40.000000000","message":"\u003e link?\n\nAre IRC logs fine? Would have to check was channel logged publically at all.","commit_id":"c09d6caa50faf87670534726237568e35cae2244"}],"nova/conf/libvirt.py":[{"author":{"_account_id":24072,"name":"Marcin Juszkiewicz","email":"mjuszkiewicz@redhat.com","username":"hrw"},"change_message_id":"fecc8c81d4ca61d728534f8269001f2e57b1f102","unresolved":false,"context_lines":[{"line_number":631,"context_line":"  https://libvirt.org/html/libvirt-libvirt-domain.html ,"},{"line_number":632,"context_line":"  which you may need to search key words ``VIR_PERF_PARAM_*``"},{"line_number":633,"context_line":"\"\"\"),"},{"line_number":634,"context_line":"    cfg.IntOpt(\u0027num_of_pcie_ports\u0027,"},{"line_number":635,"context_line":"               default\u003d0,"},{"line_number":636,"context_line":"               help\u003d \"\"\""},{"line_number":637,"context_line":"A number of PCIe ports (pcie-root-port controllers in libvirt speak) target"}],"source_content_type":"text/x-python","patch_set":8,"id":"3fa0c359_3a373f50","line":634,"range":{"start_line":634,"start_character":16,"end_line":634,"end_character":33},"updated":"2018-02-18 18:30:11.000000000","message":"Still not convinced is it the best name for that option.","commit_id":"e9d5985b87aabe99d874ac4db5e3c00d1dcf1648"},{"author":{"_account_id":7166,"name":"Sylvain Bauza","email":"sbauza@redhat.com","username":"sbauza"},"change_message_id":"bc4e1816296d33a210c3c00c1d775eb559dfdf60","unresolved":false,"context_lines":[{"line_number":636,"context_line":"               help\u003d \"\"\""},{"line_number":637,"context_line":"A number of PCIe ports (pcie-root-port controllers in libvirt speak) target"},{"line_number":638,"context_line":"instance will get. Some will be used by default, rest will be available for"},{"line_number":639,"context_line":"hotplug use. Due to Qemu limitations maximum value is set to \u002728\u0027."},{"line_number":640,"context_line":""},{"line_number":641,"context_line":"Default value \u00270\u0027 moves calculating amount of ports to libvirt."},{"line_number":642,"context_line":"\"\"\"),"}],"source_content_type":"text/x-python","patch_set":8,"id":"3fa0c359_06122959","line":639,"range":{"start_line":639,"start_character":19,"end_line":639,"end_character":36},"updated":"2018-02-19 09:28:22.000000000","message":"is there an upstream bug telling about the limitation, so in case someone is modifying Qemu in a next version, we could just make sure to remove that limitation here too.","commit_id":"e9d5985b87aabe99d874ac4db5e3c00d1dcf1648"},{"author":{"_account_id":24072,"name":"Marcin Juszkiewicz","email":"mjuszkiewicz@redhat.com","username":"hrw"},"change_message_id":"43eed5ab4e39a67f82d50cff8aeada4741b04c00","unresolved":false,"context_lines":[{"line_number":636,"context_line":"               help\u003d \"\"\""},{"line_number":637,"context_line":"A number of PCIe ports (pcie-root-port controllers in libvirt speak) target"},{"line_number":638,"context_line":"instance will get. Some will be used by default, rest will be available for"},{"line_number":639,"context_line":"hotplug use. Due to Qemu limitations maximum value is set to \u002728\u0027."},{"line_number":640,"context_line":""},{"line_number":641,"context_line":"Default value \u00270\u0027 moves calculating amount of ports to libvirt."},{"line_number":642,"context_line":"\"\"\"),"}],"source_content_type":"text/x-python","patch_set":8,"id":"3fa0c359_06f9c97e","line":639,"range":{"start_line":639,"start_character":19,"end_line":639,"end_character":36},"in_reply_to":"3fa0c359_06122959","updated":"2018-02-19 09:58:05.000000000","message":"Have to check.","commit_id":"e9d5985b87aabe99d874ac4db5e3c00d1dcf1648"},{"author":{"_account_id":27248,"name":"Prateek Goel","email":"prateek.goel2@tatacommunications.com","username":"prateek.goel"},"change_message_id":"a385a8eb1e86840498a1e7147c8cc49d6faf0f2e","unresolved":false,"context_lines":[{"line_number":631,"context_line":"  https://libvirt.org/html/libvirt-libvirt-domain.html ,"},{"line_number":632,"context_line":"  which you may need to search key words ``VIR_PERF_PARAM_*``"},{"line_number":633,"context_line":"\"\"\"),"},{"line_number":634,"context_line":"    cfg.IntOpt(\u0027num_of_pcie_ports\u0027,"},{"line_number":635,"context_line":"               default\u003d0,"},{"line_number":636,"context_line":"               help\u003d \"\"\""},{"line_number":637,"context_line":"A number of PCIe ports (pcie-root-port controllers in libvirt speak) target"},{"line_number":638,"context_line":"instance will get. Some will be used by default, rest will be available for"},{"line_number":639,"context_line":"hotplug use. Due to Qemu limitations maximum value is set to \u002728\u0027."}],"source_content_type":"text/x-python","patch_set":9,"id":"3fa0c359_1079e6fa","line":636,"range":{"start_line":634,"start_character":1,"end_line":636,"end_character":24},"updated":"2018-02-20 06:44:28.000000000","message":"Since we know the maximum limit, it might be good to set max\u003d28 as a clause here.","commit_id":"ff04850965c5242fe4c9cdebec271471aaf551ec"},{"author":{"_account_id":24072,"name":"Marcin Juszkiewicz","email":"mjuszkiewicz@redhat.com","username":"hrw"},"change_message_id":"f20b45e67c926e3f05bea7177d43ec15ac7cb27d","unresolved":false,"context_lines":[{"line_number":631,"context_line":"  https://libvirt.org/html/libvirt-libvirt-domain.html ,"},{"line_number":632,"context_line":"  which you may need to search key words ``VIR_PERF_PARAM_*``"},{"line_number":633,"context_line":"\"\"\"),"},{"line_number":634,"context_line":"    cfg.IntOpt(\u0027num_of_pcie_ports\u0027,"},{"line_number":635,"context_line":"               default\u003d0,"},{"line_number":636,"context_line":"               help\u003d \"\"\""},{"line_number":637,"context_line":"A number of PCIe ports (pcie-root-port controllers in libvirt speak) target"},{"line_number":638,"context_line":"instance will get. Some will be used by default, rest will be available for"},{"line_number":639,"context_line":"hotplug use. Due to Qemu limitations maximum value is set to \u002728\u0027."}],"source_content_type":"text/x-python","patch_set":9,"id":"3fa0c359_de486f88","line":636,"range":{"start_line":634,"start_character":1,"end_line":636,"end_character":24},"in_reply_to":"3fa0c359_1079e6fa","updated":"2018-02-20 09:00:05.000000000","message":"Thanks! Did not know that it can be done here.","commit_id":"ff04850965c5242fe4c9cdebec271471aaf551ec"},{"author":{"_account_id":7,"name":"Jay Pipes","email":"jaypipes@gmail.com","username":"jaypipes"},"change_message_id":"6d60889ceb99c13fcf16f29042f266b2669d31be","unresolved":false,"context_lines":[{"line_number":631,"context_line":"  https://libvirt.org/html/libvirt-libvirt-domain.html ,"},{"line_number":632,"context_line":"  which you may need to search key words ``VIR_PERF_PARAM_*``"},{"line_number":633,"context_line":"\"\"\"),"},{"line_number":634,"context_line":"    cfg.IntOpt(\u0027num_of_pcie_ports\u0027,"},{"line_number":635,"context_line":"               default\u003d0,"},{"line_number":636,"context_line":"               max\u003d28,"},{"line_number":637,"context_line":"               help\u003d \"\"\""}],"source_content_type":"text/x-python","patch_set":10,"id":"3fa0c359_b90eb638","line":634,"range":{"start_line":634,"start_character":20,"end_line":634,"end_character":23},"updated":"2018-02-21 16:46:04.000000000","message":"s/of_//","commit_id":"785e915bba9ab9360d92813e529df5d47b2806e4"},{"author":{"_account_id":24072,"name":"Marcin Juszkiewicz","email":"mjuszkiewicz@redhat.com","username":"hrw"},"change_message_id":"3297133cd933ea52fad90f8ebbba26f6f354bc33","unresolved":false,"context_lines":[{"line_number":631,"context_line":"  https://libvirt.org/html/libvirt-libvirt-domain.html ,"},{"line_number":632,"context_line":"  which you may need to search key words ``VIR_PERF_PARAM_*``"},{"line_number":633,"context_line":"\"\"\"),"},{"line_number":634,"context_line":"    cfg.IntOpt(\u0027num_of_pcie_ports\u0027,"},{"line_number":635,"context_line":"               default\u003d0,"},{"line_number":636,"context_line":"               max\u003d28,"},{"line_number":637,"context_line":"               help\u003d \"\"\""}],"source_content_type":"text/x-python","patch_set":10,"id":"3fa0c359_947a9fb7","line":634,"range":{"start_line":634,"start_character":20,"end_line":634,"end_character":23},"in_reply_to":"3fa0c359_b90eb638","updated":"2018-02-21 17:06:50.000000000","message":"Done","commit_id":"785e915bba9ab9360d92813e529df5d47b2806e4"},{"author":{"_account_id":7,"name":"Jay Pipes","email":"jaypipes@gmail.com","username":"jaypipes"},"change_message_id":"6d60889ceb99c13fcf16f29042f266b2669d31be","unresolved":false,"context_lines":[{"line_number":635,"context_line":"               default\u003d0,"},{"line_number":636,"context_line":"               max\u003d28,"},{"line_number":637,"context_line":"               help\u003d \"\"\""},{"line_number":638,"context_line":"A number of PCIe ports (pcie-root-port controllers in libvirt speak) target"},{"line_number":639,"context_line":"instance will get. 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Otherwise, there\u0027s no way to prevent the creation of virtual PCIe ports.","commit_id":"785e915bba9ab9360d92813e529df5d47b2806e4"},{"author":{"_account_id":7,"name":"Jay Pipes","email":"jaypipes@gmail.com","username":"jaypipes"},"change_message_id":"6d60889ceb99c13fcf16f29042f266b2669d31be","unresolved":false,"context_lines":[{"line_number":639,"context_line":"instance will get. Some will be used by default, rest will be available for"},{"line_number":640,"context_line":"hotplug use. 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Due to Qemu limitations maximum value is set to \u002728\u0027."},{"line_number":641,"context_line":""},{"line_number":642,"context_line":"Default value \u00270\u0027 moves calculating amount of ports to libvirt."},{"line_number":643,"context_line":"\"\"\"),"},{"line_number":644,"context_line":"]"},{"line_number":645,"context_line":""}],"source_content_type":"text/x-python","patch_set":10,"id":"3fa0c359_94285f97","line":642,"range":{"start_line":642,"start_character":17,"end_line":642,"end_character":63},"in_reply_to":"3fa0c359_542e5792","updated":"2018-02-21 17:06:50.000000000","message":"Done","commit_id":"785e915bba9ab9360d92813e529df5d47b2806e4"},{"author":{"_account_id":24072,"name":"Marcin Juszkiewicz","email":"mjuszkiewicz@redhat.com","username":"hrw"},"change_message_id":"3297133cd933ea52fad90f8ebbba26f6f354bc33","unresolved":false,"context_lines":[{"line_number":639,"context_line":"instance will get. Some will be used by default, rest will be available for"},{"line_number":640,"context_line":"hotplug use. Due to Qemu limitations maximum value is set to \u002728\u0027."},{"line_number":641,"context_line":""},{"line_number":642,"context_line":"Default value \u00270\u0027 moves calculating amount of ports to libvirt."},{"line_number":643,"context_line":"\"\"\"),"},{"line_number":644,"context_line":"]"},{"line_number":645,"context_line":""}],"source_content_type":"text/x-python","patch_set":10,"id":"3fa0c359_f410c35b","line":642,"range":{"start_line":642,"start_character":0,"end_line":642,"end_character":17},"in_reply_to":"3fa0c359_b4131b5c","updated":"2018-02-21 17:06:50.000000000","message":"It\u0027s IntOpt so 0. None was used as default only for \u0027vzstorage_cache_path\u0027 option.","commit_id":"785e915bba9ab9360d92813e529df5d47b2806e4"},{"author":{"_account_id":7,"name":"Jay Pipes","email":"jaypipes@gmail.com","username":"jaypipes"},"change_message_id":"3f7cc729f5e4a8d81939ebc801ab3f6f480a3a3c","unresolved":false,"context_lines":[{"line_number":632,"context_line":"  which you may need to search key words ``VIR_PERF_PARAM_*``"},{"line_number":633,"context_line":"\"\"\"),"},{"line_number":634,"context_line":"    cfg.IntOpt(\u0027num_pcie_ports\u0027,"},{"line_number":635,"context_line":"               default\u003d0,"},{"line_number":636,"context_line":"               max\u003d28,"},{"line_number":637,"context_line":"               help\u003d \"\"\""},{"line_number":638,"context_line":"The number of PCIe ports (pcie-root-port controllers in libvirt speak) target"}],"source_content_type":"text/x-python","patch_set":11,"id":"3fa0c359_8f8b6c66","line":635,"range":{"start_line":635,"start_character":15,"end_line":635,"end_character":25},"updated":"2018-02-21 17:11:35.000000000","message":"default to None","commit_id":"edaca8df2b38a133b76aeb083ea404f76922cd75"},{"author":{"_account_id":7,"name":"Jay Pipes","email":"jaypipes@gmail.com","username":"jaypipes"},"change_message_id":"3f7cc729f5e4a8d81939ebc801ab3f6f480a3a3c","unresolved":false,"context_lines":[{"line_number":639,"context_line":"instance will get. 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Some will be used by default, rest will be available for"},{"line_number":640,"context_line":"hotplug use. Due to QEMU limitations maximum value is set to \u002728\u0027."},{"line_number":641,"context_line":""},{"line_number":642,"context_line":"Default value \u00270\u0027 moves calculating amount of ports to libvirt."},{"line_number":643,"context_line":"\"\"\"),"},{"line_number":644,"context_line":"]"},{"line_number":645,"context_line":""}],"source_content_type":"text/x-python","patch_set":11,"id":"3fa0c359_6f56202d","line":642,"range":{"start_line":642,"start_character":0,"end_line":642,"end_character":63},"in_reply_to":"3fa0c359_4fefa41d","updated":"2018-02-21 17:42:57.000000000","message":"I will do some testing and then rewrite whole comment section.","commit_id":"edaca8df2b38a133b76aeb083ea404f76922cd75"},{"author":{"_account_id":6873,"name":"Matt Riedemann","email":"mriedem.os@gmail.com","username":"mriedem"},"change_message_id":"127b2f5cf9cf7b872d4e491f38930f664aa84080","unresolved":false,"context_lines":[{"line_number":637,"context_line":"  https://libvirt.org/html/libvirt-libvirt-domain.html ,"},{"line_number":638,"context_line":"  which you may need to search key words ``VIR_PERF_PARAM_*``"},{"line_number":639,"context_line":"\"\"\"),"},{"line_number":640,"context_line":"    cfg.IntOpt(\u0027num_pcie_ports\u0027,"},{"line_number":641,"context_line":"               default\u003d0,"},{"line_number":642,"context_line":"               max\u003d28,"},{"line_number":643,"context_line":"               help\u003d \"\"\""}],"source_content_type":"text/x-python","patch_set":13,"id":"df7087c5_61b1d8e1","line":640,"updated":"2018-03-07 17:07:41.000000000","message":"Kind of surprised the help doesn\u0027t mention this is only used for x86_64 and aarch64 with certain types of guests. zKVM, pKVM, xen, lxc, parallels, etc deployments don\u0027t need to care about this.","commit_id":"c09d6caa50faf87670534726237568e35cae2244"},{"author":{"_account_id":15334,"name":"Stephen Finucane","display_name":"stephenfin","email":"stephenfin@redhat.com","username":"sfinucan"},"change_message_id":"92980fe13dd69f394bafe45f847139695c39916e","unresolved":false,"context_lines":[{"line_number":643,"context_line":"               help\u003d \"\"\""},{"line_number":644,"context_line":"The number of PCIe ports (pcie-root-port controllers in libvirt speak) target"},{"line_number":645,"context_line":"instance will get. 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Due to QEMU limitations for aarch64/virt maximum value is set to"},{"line_number":647,"context_line":"\u002728\u0027."},{"line_number":648,"context_line":""},{"line_number":649,"context_line":"Default value \u00270\u0027 moves calculating amount of ports to libvirt."},{"line_number":650,"context_line":"\"\"\"),"}],"source_content_type":"text/x-python","patch_set":13,"id":"df7087c5_b62f38f5","line":647,"range":{"start_line":646,"start_character":13,"end_line":647,"end_character":5},"updated":"2018-03-07 16:36:40.000000000","message":"It doesn\u0027t need to go in here, but a link to resources proving this would be appreciated (it might change in the future).","commit_id":"c09d6caa50faf87670534726237568e35cae2244"},{"author":{"_account_id":15334,"name":"Stephen Finucane","display_name":"stephenfin","email":"stephenfin@redhat.com","username":"sfinucan"},"change_message_id":"92980fe13dd69f394bafe45f847139695c39916e","unresolved":false,"context_lines":[{"line_number":641,"context_line":"               default\u003d0,"},{"line_number":642,"context_line":"               max\u003d28,"},{"line_number":643,"context_line":"               help\u003d \"\"\""},{"line_number":644,"context_line":"The number of PCIe ports (pcie-root-port controllers in libvirt speak) target"},{"line_number":645,"context_line":"instance will get. Some will be used by default, rest will be available for"},{"line_number":646,"context_line":"hotplug use. Due to QEMU limitations for aarch64/virt maximum value is set to"},{"line_number":647,"context_line":"\u002728\u0027."},{"line_number":648,"context_line":""},{"line_number":649,"context_line":"Default value \u00270\u0027 moves calculating amount of ports to libvirt."},{"line_number":650,"context_line":"\"\"\"),"}],"source_content_type":"text/x-python","patch_set":13,"id":"df7087c5_d69d0c67","line":647,"range":{"start_line":644,"start_character":0,"end_line":647,"end_character":5},"updated":"2018-03-07 16:36:40.000000000","message":"nit: We don\u0027t do this consistently, but I\u0027d really appreciate a quick summary line before the body of this text. Perhaps just:\n\n    The number of PCIe ports an instance will get.\n\n    Libvirt allows a custom number of PCIe ports (pcie-root-port\n    controllers in...)\n\nI\u0027d probably also include a note about why an operator would like to configure this manually.","commit_id":"c09d6caa50faf87670534726237568e35cae2244"},{"author":{"_account_id":24072,"name":"Marcin Juszkiewicz","email":"mjuszkiewicz@redhat.com","username":"hrw"},"change_message_id":"1cf3a3b38e246c0f8f5e081a784fd5cd40c3747e","unresolved":false,"context_lines":[{"line_number":643,"context_line":"               help\u003d \"\"\""},{"line_number":644,"context_line":"The number of PCIe ports (pcie-root-port controllers in libvirt speak) target"},{"line_number":645,"context_line":"instance will get. Some will be used by default, rest will be available for"},{"line_number":646,"context_line":"hotplug use. Due to QEMU limitations for aarch64/virt maximum value is set to"},{"line_number":647,"context_line":"\u002728\u0027."},{"line_number":648,"context_line":""},{"line_number":649,"context_line":"Default value \u00270\u0027 moves calculating amount of ports to libvirt."},{"line_number":650,"context_line":"\"\"\"),"}],"source_content_type":"text/x-python","patch_set":13,"id":"df7087c5_c17a2487","line":647,"range":{"start_line":646,"start_character":13,"end_line":647,"end_character":5},"in_reply_to":"df7087c5_b62f38f5","updated":"2018-03-07 16:51:40.000000000","message":"Done","commit_id":"c09d6caa50faf87670534726237568e35cae2244"},{"author":{"_account_id":24072,"name":"Marcin Juszkiewicz","email":"mjuszkiewicz@redhat.com","username":"hrw"},"change_message_id":"1cf3a3b38e246c0f8f5e081a784fd5cd40c3747e","unresolved":false,"context_lines":[{"line_number":641,"context_line":"               default\u003d0,"},{"line_number":642,"context_line":"               max\u003d28,"},{"line_number":643,"context_line":"               help\u003d \"\"\""},{"line_number":644,"context_line":"The number of PCIe ports (pcie-root-port controllers in libvirt speak) target"},{"line_number":645,"context_line":"instance will get. Some will be used by default, rest will be available for"},{"line_number":646,"context_line":"hotplug use. Due to QEMU limitations for aarch64/virt maximum value is set to"},{"line_number":647,"context_line":"\u002728\u0027."},{"line_number":648,"context_line":""},{"line_number":649,"context_line":"Default value \u00270\u0027 moves calculating amount of ports to libvirt."},{"line_number":650,"context_line":"\"\"\"),"}],"source_content_type":"text/x-python","patch_set":13,"id":"df7087c5_410ff42d","line":647,"range":{"start_line":644,"start_character":0,"end_line":647,"end_character":5},"in_reply_to":"df7087c5_d69d0c67","updated":"2018-03-07 16:51:40.000000000","message":"Done","commit_id":"c09d6caa50faf87670534726237568e35cae2244"},{"author":{"_account_id":6873,"name":"Matt Riedemann","email":"mriedem.os@gmail.com","username":"mriedem"},"change_message_id":"f6098246b461b4049d44f71078f83ed8e211cedd","unresolved":false,"context_lines":[{"line_number":637,"context_line":"  https://libvirt.org/html/libvirt-libvirt-domain.html ,"},{"line_number":638,"context_line":"  which you may need to search key words ``VIR_PERF_PARAM_*``"},{"line_number":639,"context_line":"\"\"\"),"},{"line_number":640,"context_line":"    cfg.IntOpt(\u0027num_pcie_ports\u0027,"},{"line_number":641,"context_line":"               default\u003d0,"},{"line_number":642,"context_line":"               max\u003d28,"},{"line_number":643,"context_line":"               help\u003d \"\"\""}],"source_content_type":"text/x-python","patch_set":15,"id":"df7087c5_24e1a99b","line":640,"range":{"start_line":640,"start_character":4,"end_line":640,"end_character":32},"updated":"2018-03-07 22:20:42.000000000","message":"Is there a min\u003d value for this? 0? Without specifying min\u003d0 someone could put -1 or -1000 for this.","commit_id":"63555e098c9eb8f125292a33cf731d36e8c7a65e"},{"author":{"_account_id":24072,"name":"Marcin Juszkiewicz","email":"mjuszkiewicz@redhat.com","username":"hrw"},"change_message_id":"955631c387bf70e7ba88acc272c4713294ca7543","unresolved":false,"context_lines":[{"line_number":637,"context_line":"  https://libvirt.org/html/libvirt-libvirt-domain.html ,"},{"line_number":638,"context_line":"  which you may need to search key words ``VIR_PERF_PARAM_*``"},{"line_number":639,"context_line":"\"\"\"),"},{"line_number":640,"context_line":"    cfg.IntOpt(\u0027num_pcie_ports\u0027,"},{"line_number":641,"context_line":"               default\u003d0,"},{"line_number":642,"context_line":"               max\u003d28,"},{"line_number":643,"context_line":"               help\u003d \"\"\""}],"source_content_type":"text/x-python","patch_set":15,"id":"df7087c5_499e2d64","line":640,"range":{"start_line":640,"start_character":4,"end_line":640,"end_character":32},"in_reply_to":"df7087c5_24e1a99b","updated":"2018-03-08 07:52:37.000000000","message":"Done","commit_id":"63555e098c9eb8f125292a33cf731d36e8c7a65e"},{"author":{"_account_id":6873,"name":"Matt Riedemann","email":"mriedem.os@gmail.com","username":"mriedem"},"change_message_id":"f6098246b461b4049d44f71078f83ed8e211cedd","unresolved":false,"context_lines":[{"line_number":651,"context_line":""},{"line_number":652,"context_line":"More info: https://github.com/qemu/qemu/blob/master/docs/pcie.txt"},{"line_number":653,"context_line":""},{"line_number":654,"context_line":"Due to QEMU limitations for aarch64/virt maximum value is set to \u002728\u0027."},{"line_number":655,"context_line":""},{"line_number":656,"context_line":"Default value \u00270\u0027 moves calculating amount of ports to libvirt."},{"line_number":657,"context_line":"\"\"\"),"}],"source_content_type":"text/x-python","patch_set":15,"id":"df7087c5_849e7505","line":654,"range":{"start_line":654,"start_character":0,"end_line":654,"end_character":70},"updated":"2018-03-07 22:20:42.000000000","message":"What is the max value for x86_64/q35? If it\u0027s higher than 28, then it seems this limit should be enforced in the code based on the type used.\n\nReading the libvirt domain docs it sounds like there are 31 slots for x86_64?\n\n\"For machine types which provide an implicit PCI Express (PCIe) bus (for example, the machine types based on the Q35 chipset), the pcie-root controller with index\u003d0 is auto-added to the domain\u0027s configuration. pcie-root has also no address, provides 31 slots (numbered 1-31) that can be used to attach PCIe or PCI devices (although libvirt will never auto-assign a PCI device to a PCIe slot, it will allow manual specification of such an assignment).\"","commit_id":"63555e098c9eb8f125292a33cf731d36e8c7a65e"},{"author":{"_account_id":24072,"name":"Marcin Juszkiewicz","email":"mjuszkiewicz@redhat.com","username":"hrw"},"change_message_id":"955631c387bf70e7ba88acc272c4713294ca7543","unresolved":false,"context_lines":[{"line_number":651,"context_line":""},{"line_number":652,"context_line":"More info: https://github.com/qemu/qemu/blob/master/docs/pcie.txt"},{"line_number":653,"context_line":""},{"line_number":654,"context_line":"Due to QEMU limitations for aarch64/virt maximum value is set to \u002728\u0027."},{"line_number":655,"context_line":""},{"line_number":656,"context_line":"Default value \u00270\u0027 moves calculating amount of ports to libvirt."},{"line_number":657,"context_line":"\"\"\"),"}],"source_content_type":"text/x-python","patch_set":15,"id":"df7087c5_29e2d9d6","line":654,"range":{"start_line":654,"start_character":0,"end_line":654,"end_character":70},"in_reply_to":"df7087c5_849e7505","updated":"2018-03-08 07:52:37.000000000","message":"31 ports is (in theory) possible on aarch64 too. But due to QEMU memory map it is not working. That\u0027s why 28 is used as max.\n\nQ35 probably will work with bigger values but still 28 is better than default few it has (with one-two free in them)","commit_id":"63555e098c9eb8f125292a33cf731d36e8c7a65e"}],"nova/tests/unit/virt/libvirt/test_driver.py":[{"author":{"_account_id":7,"name":"Jay Pipes","email":"jaypipes@gmail.com","username":"jaypipes"},"change_message_id":"6d60889ceb99c13fcf16f29042f266b2669d31be","unresolved":false,"context_lines":[{"line_number":2124,"context_line":"                                     _fake_network_info(self, 1),"},{"line_number":2125,"context_line":"                                     image_meta, disk_info)"},{"line_number":2126,"context_line":""},{"line_number":2127,"context_line":"        amount_of_pcierootports \u003d 0"},{"line_number":2128,"context_line":"        for device in cfg.devices:"},{"line_number":2129,"context_line":"            try:"},{"line_number":2130,"context_line":"                if device.root_name \u003d\u003d \u0027controller\u0027 and \\"}],"source_content_type":"text/x-python","patch_set":10,"id":"3fa0c359_34386b9e","line":2127,"range":{"start_line":2127,"start_character":8,"end_line":2127,"end_character":35},"updated":"2018-02-21 16:46:04.000000000","message":"femto-nit... this (and the constant) seem like a little verbosely-named :)\n\nHow about just num_ports and TEST_NUM_SLOTS?","commit_id":"785e915bba9ab9360d92813e529df5d47b2806e4"},{"author":{"_account_id":24072,"name":"Marcin Juszkiewicz","email":"mjuszkiewicz@redhat.com","username":"hrw"},"change_message_id":"3297133cd933ea52fad90f8ebbba26f6f354bc33","unresolved":false,"context_lines":[{"line_number":2124,"context_line":"                                     _fake_network_info(self, 1),"},{"line_number":2125,"context_line":"                                     image_meta, disk_info)"},{"line_number":2126,"context_line":""},{"line_number":2127,"context_line":"        amount_of_pcierootports \u003d 0"},{"line_number":2128,"context_line":"        for device in cfg.devices:"},{"line_number":2129,"context_line":"            try:"},{"line_number":2130,"context_line":"                if device.root_name \u003d\u003d \u0027controller\u0027 and \\"}],"source_content_type":"text/x-python","patch_set":10,"id":"3fa0c359_d40b4727","line":2127,"range":{"start_line":2127,"start_character":8,"end_line":2127,"end_character":35},"in_reply_to":"3fa0c359_34386b9e","updated":"2018-02-21 17:06:50.000000000","message":"Done","commit_id":"785e915bba9ab9360d92813e529df5d47b2806e4"},{"author":{"_account_id":7,"name":"Jay Pipes","email":"jaypipes@gmail.com","username":"jaypipes"},"change_message_id":"6d60889ceb99c13fcf16f29042f266b2669d31be","unresolved":false,"context_lines":[{"line_number":2127,"context_line":"        amount_of_pcierootports \u003d 0"},{"line_number":2128,"context_line":"        for device in cfg.devices:"},{"line_number":2129,"context_line":"            try:"},{"line_number":2130,"context_line":"                if device.root_name \u003d\u003d \u0027controller\u0027 and \\"},{"line_number":2131,"context_line":"                device.model \u003d\u003d \u0027pcie-root-port\u0027:"},{"line_number":2132,"context_line":"                    amount_of_pcierootports +\u003d 1"},{"line_number":2133,"context_line":"            except AttributeError:"}],"source_content_type":"text/x-python","patch_set":10,"id":"3fa0c359_34eaab0e","line":2130,"range":{"start_line":2130,"start_character":55,"end_line":2130,"end_character":57},"updated":"2018-02-21 16:46:04.000000000","message":"here and below, the convention is to use a parens and indent the followon line in the conditional one extra indent, like so:\n\n if (device.root_name \u003d\u003d \u0027controller\u0027 and\n         device.model \u003d\u003d \u0027pcie-root-port\u0027):\n     amount_of_pcierootports +\u003d 1","commit_id":"785e915bba9ab9360d92813e529df5d47b2806e4"},{"author":{"_account_id":24072,"name":"Marcin Juszkiewicz","email":"mjuszkiewicz@redhat.com","username":"hrw"},"change_message_id":"3297133cd933ea52fad90f8ebbba26f6f354bc33","unresolved":false,"context_lines":[{"line_number":2127,"context_line":"        amount_of_pcierootports \u003d 0"},{"line_number":2128,"context_line":"        for device in cfg.devices:"},{"line_number":2129,"context_line":"            try:"},{"line_number":2130,"context_line":"                if device.root_name \u003d\u003d \u0027controller\u0027 and \\"},{"line_number":2131,"context_line":"                device.model \u003d\u003d \u0027pcie-root-port\u0027:"},{"line_number":2132,"context_line":"                    amount_of_pcierootports +\u003d 1"},{"line_number":2133,"context_line":"            except AttributeError:"}],"source_content_type":"text/x-python","patch_set":10,"id":"3fa0c359_94013f09","line":2130,"range":{"start_line":2130,"start_character":55,"end_line":2130,"end_character":57},"in_reply_to":"3fa0c359_34eaab0e","updated":"2018-02-21 17:06:50.000000000","message":"Done","commit_id":"785e915bba9ab9360d92813e529df5d47b2806e4"},{"author":{"_account_id":7,"name":"Jay Pipes","email":"jaypipes@gmail.com","username":"jaypipes"},"change_message_id":"3f7cc729f5e4a8d81939ebc801ab3f6f480a3a3c","unresolved":false,"context_lines":[{"line_number":2127,"context_line":"        num_ports \u003d 0"},{"line_number":2128,"context_line":"        for device in cfg.devices:"},{"line_number":2129,"context_line":"            try:"},{"line_number":2130,"context_line":"                if device.root_name \u003d\u003d \u0027controller\u0027 and \\"},{"line_number":2131,"context_line":"                device.model \u003d\u003d \u0027pcie-root-port\u0027:"},{"line_number":2132,"context_line":"                    num_ports +\u003d 1"},{"line_number":2133,"context_line":"            except AttributeError:"},{"line_number":2134,"context_line":"                pass"}],"source_content_type":"text/x-python","patch_set":11,"id":"3fa0c359_4fd8047a","line":2131,"range":{"start_line":2130,"start_character":16,"end_line":2131,"end_character":49},"updated":"2018-02-21 17:11:35.000000000","message":"you didn\u0027t make the change I\u0027d requested:\n\n if (device.root_name \u003d\u003d \u0027controller\u0027 and\n         device.model \u003d\u003d \u0027pcie-root-port\u0027):\n     num_ports +\u003d 1","commit_id":"edaca8df2b38a133b76aeb083ea404f76922cd75"},{"author":{"_account_id":24072,"name":"Marcin Juszkiewicz","email":"mjuszkiewicz@redhat.com","username":"hrw"},"change_message_id":"0d50059605dbbacd743498ad8ac376857ccdaed2","unresolved":false,"context_lines":[{"line_number":2127,"context_line":"        num_ports \u003d 0"},{"line_number":2128,"context_line":"        for device in cfg.devices:"},{"line_number":2129,"context_line":"            try:"},{"line_number":2130,"context_line":"                if device.root_name \u003d\u003d \u0027controller\u0027 and \\"},{"line_number":2131,"context_line":"                device.model \u003d\u003d \u0027pcie-root-port\u0027:"},{"line_number":2132,"context_line":"                    num_ports +\u003d 1"},{"line_number":2133,"context_line":"            except AttributeError:"},{"line_number":2134,"context_line":"                pass"}],"source_content_type":"text/x-python","patch_set":11,"id":"3fa0c359_4f66c4c3","line":2131,"range":{"start_line":2130,"start_character":16,"end_line":2131,"end_character":49},"in_reply_to":"3fa0c359_4fd8047a","updated":"2018-02-21 17:42:57.000000000","message":"Done","commit_id":"edaca8df2b38a133b76aeb083ea404f76922cd75"},{"author":{"_account_id":7,"name":"Jay Pipes","email":"jaypipes@gmail.com","username":"jaypipes"},"change_message_id":"3f7cc729f5e4a8d81939ebc801ab3f6f480a3a3c","unresolved":false,"context_lines":[{"line_number":5674,"context_line":"        num_ports \u003d 0"},{"line_number":5675,"context_line":"        for device in cfg.devices:"},{"line_number":5676,"context_line":"            try:"},{"line_number":5677,"context_line":"                if (device.root_name \u003d\u003d \u0027controller\u0027 and"},{"line_number":5678,"context_line":"                        device.model \u003d\u003d \u0027pcie-root-port\u0027):"},{"line_number":5679,"context_line":"                    num_ports +\u003d 1"},{"line_number":5680,"context_line":"            except AttributeError:"},{"line_number":5681,"context_line":"                pass"}],"source_content_type":"text/x-python","patch_set":11,"id":"3fa0c359_afc66899","line":5678,"range":{"start_line":5677,"start_character":16,"end_line":5678,"end_character":58},"updated":"2018-02-21 17:11:35.000000000","message":"but you made it here :)","commit_id":"edaca8df2b38a133b76aeb083ea404f76922cd75"},{"author":{"_account_id":6873,"name":"Matt Riedemann","email":"mriedem.os@gmail.com","username":"mriedem"},"change_message_id":"f6098246b461b4049d44f71078f83ed8e211cedd","unresolved":false,"context_lines":[{"line_number":2142,"context_line":"                   group\u003d\u0027libvirt\u0027)"},{"line_number":2143,"context_line":""},{"line_number":2144,"context_line":"        TEST_AMOUNT_OF_PCIE_SLOTS \u003d 8"},{"line_number":2145,"context_line":"        CONF.set_override(\"num_pcie_ports\", TEST_AMOUNT_OF_PCIE_SLOTS,"},{"line_number":2146,"context_line":"                group\u003d\u0027libvirt\u0027)"},{"line_number":2147,"context_line":""},{"line_number":2148,"context_line":"        drvr \u003d libvirt_driver.LibvirtDriver(fake.FakeVirtAPI(), True)"}],"source_content_type":"text/x-python","patch_set":15,"id":"df7087c5_248f69cd","line":2145,"range":{"start_line":2145,"start_character":8,"end_line":2145,"end_character":25},"updated":"2018-03-07 22:20:42.000000000","message":"nit: we usually use self.flags() for this but it\u0027s basically the same thing.","commit_id":"63555e098c9eb8f125292a33cf731d36e8c7a65e"},{"author":{"_account_id":24072,"name":"Marcin Juszkiewicz","email":"mjuszkiewicz@redhat.com","username":"hrw"},"change_message_id":"955631c387bf70e7ba88acc272c4713294ca7543","unresolved":false,"context_lines":[{"line_number":2142,"context_line":"                   group\u003d\u0027libvirt\u0027)"},{"line_number":2143,"context_line":""},{"line_number":2144,"context_line":"        TEST_AMOUNT_OF_PCIE_SLOTS \u003d 8"},{"line_number":2145,"context_line":"        CONF.set_override(\"num_pcie_ports\", TEST_AMOUNT_OF_PCIE_SLOTS,"},{"line_number":2146,"context_line":"                group\u003d\u0027libvirt\u0027)"},{"line_number":2147,"context_line":""},{"line_number":2148,"context_line":"        drvr \u003d libvirt_driver.LibvirtDriver(fake.FakeVirtAPI(), True)"}],"source_content_type":"text/x-python","patch_set":15,"id":"df7087c5_c9ff9d65","line":2145,"range":{"start_line":2145,"start_character":8,"end_line":2145,"end_character":25},"in_reply_to":"df7087c5_248f69cd","updated":"2018-03-08 07:52:37.000000000","message":"both ways are used in tests - I probably followed first found.","commit_id":"63555e098c9eb8f125292a33cf731d36e8c7a65e"},{"author":{"_account_id":6873,"name":"Matt Riedemann","email":"mriedem.os@gmail.com","username":"mriedem"},"change_message_id":"f6098246b461b4049d44f71078f83ed8e211cedd","unresolved":false,"context_lines":[{"line_number":2164,"context_line":"        for device in cfg.devices:"},{"line_number":2165,"context_line":"            try:"},{"line_number":2166,"context_line":"                if (device.root_name \u003d\u003d \u0027controller\u0027 and"},{"line_number":2167,"context_line":"                device.model \u003d\u003d \u0027pcie-root-port\u0027):"},{"line_number":2168,"context_line":"                    num_ports +\u003d 1"},{"line_number":2169,"context_line":"            except AttributeError:"},{"line_number":2170,"context_line":"                pass"}],"source_content_type":"text/x-python","patch_set":15,"id":"df7087c5_c4622d17","line":2167,"updated":"2018-03-07 22:20:42.000000000","message":"indenting here is a bit odd, would have expected pep8 to complain about this, and instead used:\n\nif (device.root_name \u003d\u003d \u0027controller\u0027 and\n        device.model \u003d\u003d \u0027pcie-root-port\u0027):\n    num_ports +\u003d 1","commit_id":"63555e098c9eb8f125292a33cf731d36e8c7a65e"},{"author":{"_account_id":24072,"name":"Marcin Juszkiewicz","email":"mjuszkiewicz@redhat.com","username":"hrw"},"change_message_id":"955631c387bf70e7ba88acc272c4713294ca7543","unresolved":false,"context_lines":[{"line_number":2164,"context_line":"        for device in cfg.devices:"},{"line_number":2165,"context_line":"            try:"},{"line_number":2166,"context_line":"                if (device.root_name \u003d\u003d \u0027controller\u0027 and"},{"line_number":2167,"context_line":"                device.model \u003d\u003d \u0027pcie-root-port\u0027):"},{"line_number":2168,"context_line":"                    num_ports +\u003d 1"},{"line_number":2169,"context_line":"            except AttributeError:"},{"line_number":2170,"context_line":"                pass"}],"source_content_type":"text/x-python","patch_set":15,"id":"df7087c5_a97a6921","line":2167,"in_reply_to":"df7087c5_c4622d17","updated":"2018-03-08 07:52:37.000000000","message":"Done","commit_id":"63555e098c9eb8f125292a33cf731d36e8c7a65e"},{"author":{"_account_id":6873,"name":"Matt Riedemann","email":"mriedem.os@gmail.com","username":"mriedem"},"change_message_id":"f6098246b461b4049d44f71078f83ed8e211cedd","unresolved":false,"context_lines":[{"line_number":2169,"context_line":"            except AttributeError:"},{"line_number":2170,"context_line":"                pass"},{"line_number":2171,"context_line":""},{"line_number":2172,"context_line":"        self.assertEqual(num_ports, TEST_AMOUNT_OF_PCIE_SLOTS)"},{"line_number":2173,"context_line":""},{"line_number":2174,"context_line":"    def test_get_guest_config_missing_ownership_info(self):"},{"line_number":2175,"context_line":"        drvr \u003d libvirt_driver.LibvirtDriver(fake.FakeVirtAPI(), True)"}],"source_content_type":"text/x-python","patch_set":15,"id":"df7087c5_647321e9","line":2172,"range":{"start_line":2172,"start_character":25,"end_line":2172,"end_character":61},"updated":"2018-03-07 22:20:42.000000000","message":"These should be flipped:\n\nassertEqual(expected, actual)\n\nIt matters for the error message if the assertion fails.","commit_id":"63555e098c9eb8f125292a33cf731d36e8c7a65e"},{"author":{"_account_id":24072,"name":"Marcin Juszkiewicz","email":"mjuszkiewicz@redhat.com","username":"hrw"},"change_message_id":"955631c387bf70e7ba88acc272c4713294ca7543","unresolved":false,"context_lines":[{"line_number":2169,"context_line":"            except AttributeError:"},{"line_number":2170,"context_line":"                pass"},{"line_number":2171,"context_line":""},{"line_number":2172,"context_line":"        self.assertEqual(num_ports, TEST_AMOUNT_OF_PCIE_SLOTS)"},{"line_number":2173,"context_line":""},{"line_number":2174,"context_line":"    def test_get_guest_config_missing_ownership_info(self):"},{"line_number":2175,"context_line":"        drvr \u003d libvirt_driver.LibvirtDriver(fake.FakeVirtAPI(), True)"}],"source_content_type":"text/x-python","patch_set":15,"id":"df7087c5_298f392b","line":2172,"range":{"start_line":2172,"start_character":25,"end_line":2172,"end_character":61},"in_reply_to":"df7087c5_647321e9","updated":"2018-03-08 07:52:37.000000000","message":"Done","commit_id":"63555e098c9eb8f125292a33cf731d36e8c7a65e"},{"author":{"_account_id":6873,"name":"Matt Riedemann","email":"mriedem.os@gmail.com","username":"mriedem"},"change_message_id":"f6098246b461b4049d44f71078f83ed8e211cedd","unresolved":false,"context_lines":[{"line_number":5716,"context_line":"            except AttributeError:"},{"line_number":5717,"context_line":"                pass"},{"line_number":5718,"context_line":""},{"line_number":5719,"context_line":"        self.assertEqual(num_ports, TEST_AMOUNT_OF_PCIE_SLOTS)"},{"line_number":5720,"context_line":""},{"line_number":5721,"context_line":"    @mock.patch.object(libvirt_driver.LibvirtDriver,"},{"line_number":5722,"context_line":"                       \"_get_guest_storage_config\")"}],"source_content_type":"text/x-python","patch_set":15,"id":"df7087c5_843af5e4","line":5719,"updated":"2018-03-07 22:20:42.000000000","message":"same as above","commit_id":"63555e098c9eb8f125292a33cf731d36e8c7a65e"},{"author":{"_account_id":24072,"name":"Marcin Juszkiewicz","email":"mjuszkiewicz@redhat.com","username":"hrw"},"change_message_id":"955631c387bf70e7ba88acc272c4713294ca7543","unresolved":false,"context_lines":[{"line_number":5716,"context_line":"            except AttributeError:"},{"line_number":5717,"context_line":"                pass"},{"line_number":5718,"context_line":""},{"line_number":5719,"context_line":"        self.assertEqual(num_ports, TEST_AMOUNT_OF_PCIE_SLOTS)"},{"line_number":5720,"context_line":""},{"line_number":5721,"context_line":"    @mock.patch.object(libvirt_driver.LibvirtDriver,"},{"line_number":5722,"context_line":"                       \"_get_guest_storage_config\")"}],"source_content_type":"text/x-python","patch_set":15,"id":"df7087c5_e9886120","line":5719,"in_reply_to":"df7087c5_843af5e4","updated":"2018-03-08 07:52:37.000000000","message":"Done","commit_id":"63555e098c9eb8f125292a33cf731d36e8c7a65e"}],"nova/virt/libvirt/config.py":[{"author":{"_account_id":7166,"name":"Sylvain Bauza","email":"sbauza@redhat.com","username":"sbauza"},"change_message_id":"bc4e1816296d33a210c3c00c1d775eb559dfdf60","unresolved":false,"context_lines":[{"line_number":1660,"context_line":"        super(LibvirtConfigGuestPCIeRootPortController, self).\\"},{"line_number":1661,"context_line":"                __init__(**kwargs)"},{"line_number":1662,"context_line":"        self.type \u003d \u0027pci\u0027"},{"line_number":1663,"context_line":"        self.model \u003d \u0027pcie-root-port\u0027"},{"line_number":1664,"context_line":""},{"line_number":1665,"context_line":""},{"line_number":1666,"context_line":"class LibvirtConfigGuestHostdev(LibvirtConfigGuestDevice):"}],"source_content_type":"text/x-python","patch_set":8,"id":"3fa0c359_83194b89","line":1663,"updated":"2018-02-19 09:28:22.000000000","message":"I don\u0027t see where you ask libvirtd to not autocreate the PCIe devices. Is it because you provide a specific port controller ?","commit_id":"e9d5985b87aabe99d874ac4db5e3c00d1dcf1648"},{"author":{"_account_id":24072,"name":"Marcin Juszkiewicz","email":"mjuszkiewicz@redhat.com","username":"hrw"},"change_message_id":"43eed5ab4e39a67f82d50cff8aeada4741b04c00","unresolved":false,"context_lines":[{"line_number":1660,"context_line":"        super(LibvirtConfigGuestPCIeRootPortController, self).\\"},{"line_number":1661,"context_line":"                __init__(**kwargs)"},{"line_number":1662,"context_line":"        self.type \u003d \u0027pci\u0027"},{"line_number":1663,"context_line":"        self.model \u003d \u0027pcie-root-port\u0027"},{"line_number":1664,"context_line":""},{"line_number":1665,"context_line":""},{"line_number":1666,"context_line":"class LibvirtConfigGuestHostdev(LibvirtConfigGuestDevice):"}],"source_content_type":"text/x-python","patch_set":8,"id":"3fa0c359_a691f548","line":1663,"in_reply_to":"3fa0c359_83194b89","updated":"2018-02-19 09:58:05.000000000","message":"On x86-64/q35 or aarch64/virt (or any other pcie based machine) libvirtd always autocreates some ports for pcie devices. If admin set \u0027num_of_pcie_ports\u0027 to too low value then libvirtd will just add required ports.\n\n\u0027num_of_pcie_ports\u0027 is a way to tell \"I want X of ports in total\" not \"I want X free ports\" as such way would complicate patch too much - we would have to count every PCI card, remember which ones are PCI and which are not etc.","commit_id":"e9d5985b87aabe99d874ac4db5e3c00d1dcf1648"},{"author":{"_account_id":7166,"name":"Sylvain Bauza","email":"sbauza@redhat.com","username":"sbauza"},"change_message_id":"bc4e1816296d33a210c3c00c1d775eb559dfdf60","unresolved":false,"context_lines":[{"line_number":1661,"context_line":"                __init__(**kwargs)"},{"line_number":1662,"context_line":"        self.type \u003d \u0027pci\u0027"},{"line_number":1663,"context_line":"        self.model \u003d \u0027pcie-root-port\u0027"},{"line_number":1664,"context_line":""},{"line_number":1665,"context_line":""},{"line_number":1666,"context_line":"class LibvirtConfigGuestHostdev(LibvirtConfigGuestDevice):"},{"line_number":1667,"context_line":"    def __init__(self, **kwargs):"}],"source_content_type":"text/x-python","patch_set":8,"id":"3fa0c359_c3067321","line":1664,"updated":"2018-02-19 09:28:22.000000000","message":"all of that is missing unittests","commit_id":"e9d5985b87aabe99d874ac4db5e3c00d1dcf1648"},{"author":{"_account_id":24072,"name":"Marcin Juszkiewicz","email":"mjuszkiewicz@redhat.com","username":"hrw"},"change_message_id":"43eed5ab4e39a67f82d50cff8aeada4741b04c00","unresolved":false,"context_lines":[{"line_number":1661,"context_line":"                __init__(**kwargs)"},{"line_number":1662,"context_line":"        self.type \u003d \u0027pci\u0027"},{"line_number":1663,"context_line":"        self.model \u003d \u0027pcie-root-port\u0027"},{"line_number":1664,"context_line":""},{"line_number":1665,"context_line":""},{"line_number":1666,"context_line":"class LibvirtConfigGuestHostdev(LibvirtConfigGuestDevice):"},{"line_number":1667,"context_line":"    def __init__(self, **kwargs):"}],"source_content_type":"text/x-python","patch_set":8,"id":"3fa0c359_66ad2d9a","line":1664,"in_reply_to":"3fa0c359_c3067321","updated":"2018-02-19 09:58:05.000000000","message":"test_get_guest_config_q35 tests that\ntest_get_guest_config_aarch64 covers that too","commit_id":"e9d5985b87aabe99d874ac4db5e3c00d1dcf1648"},{"author":{"_account_id":6873,"name":"Matt Riedemann","email":"mriedem.os@gmail.com","username":"mriedem"},"change_message_id":"f6098246b461b4049d44f71078f83ed8e211cedd","unresolved":false,"context_lines":[{"line_number":1651,"context_line":"        super(LibvirtConfigGuestPCIeRootController, self).\\"},{"line_number":1652,"context_line":"                __init__(**kwargs)"},{"line_number":1653,"context_line":"        self.type \u003d \u0027pci\u0027"},{"line_number":1654,"context_line":"        self.model \u003d \u0027pcie-root\u0027"},{"line_number":1655,"context_line":""},{"line_number":1656,"context_line":""},{"line_number":1657,"context_line":"class LibvirtConfigGuestPCIeRootPortController(LibvirtConfigGuestController):"}],"source_content_type":"text/x-python","patch_set":15,"id":"df7087c5_e41e516f","line":1654,"updated":"2018-03-07 22:20:42.000000000","message":"This is in libvirt since 1.1.2 and we require 3.6.0 for aarch64 so this should be OK.\n\nOtherwise for x86_64 we require libvirt\u003e\u003d1.2.9 so again this is OK.","commit_id":"63555e098c9eb8f125292a33cf731d36e8c7a65e"},{"author":{"_account_id":6873,"name":"Matt Riedemann","email":"mriedem.os@gmail.com","username":"mriedem"},"change_message_id":"f6098246b461b4049d44f71078f83ed8e211cedd","unresolved":false,"context_lines":[{"line_number":1660,"context_line":"        super(LibvirtConfigGuestPCIeRootPortController, self).\\"},{"line_number":1661,"context_line":"                __init__(**kwargs)"},{"line_number":1662,"context_line":"        self.type \u003d \u0027pci\u0027"},{"line_number":1663,"context_line":"        self.model \u003d \u0027pcie-root-port\u0027"},{"line_number":1664,"context_line":""},{"line_number":1665,"context_line":""},{"line_number":1666,"context_line":"class LibvirtConfigGuestHostdev(LibvirtConfigGuestDevice):"}],"source_content_type":"text/x-python","patch_set":15,"id":"df7087c5_a4185981","line":1663,"updated":"2018-03-07 22:20:42.000000000","message":"In libvirt since 1.2.19 so should be OK.","commit_id":"63555e098c9eb8f125292a33cf731d36e8c7a65e"}],"nova/virt/libvirt/driver.py":[{"author":{"_account_id":24072,"name":"Marcin Juszkiewicz","email":"mjuszkiewicz@redhat.com","username":"hrw"},"change_message_id":"22d873a706cc84376b0726323609bf588f1fd5b2","unresolved":false,"context_lines":[{"line_number":5107,"context_line":"            self._set_qemu_guest_agent(guest, flavor, instance, image_meta)"},{"line_number":5108,"context_line":""},{"line_number":5109,"context_line":"        if caps.host.cpu.arch \u003d\u003d fields.Architecture.AARCH64:"},{"line_number":5110,"context_line":"            _guest_add_pcie_root_ports(guest)"},{"line_number":5111,"context_line":""},{"line_number":5112,"context_line":"        self._guest_add_pci_devices(guest, instance)"},{"line_number":5113,"context_line":""}],"source_content_type":"text/x-python","patch_set":1,"id":"3fa0c359_87f50986","line":5110,"range":{"start_line":5110,"start_character":0,"end_line":5110,"end_character":45},"updated":"2018-02-15 19:14:00.000000000","message":"self. ;D","commit_id":"d1b15f4f4102fc6112843b0c4eb29da97e22f206"},{"author":{"_account_id":1779,"name":"Daniel Berrange","email":"berrange@redhat.com","username":"berrange"},"change_message_id":"492e6fce8437a5693852681d383be08147e45760","unresolved":false,"context_lines":[{"line_number":5113,"context_line":""},{"line_number":5114,"context_line":"        if caps.host.cpu.arch \u003d\u003d fields.Architecture.AARCH64:"},{"line_number":5115,"context_line":"            self._guest_add_pcie_root_ports(guest)"},{"line_number":5116,"context_line":""},{"line_number":5117,"context_line":"        self._guest_add_pci_devices(guest, instance)"},{"line_number":5118,"context_line":""},{"line_number":5119,"context_line":"        self._guest_add_watchdog_action(guest, flavor, image_meta)"}],"source_content_type":"text/x-python","patch_set":3,"id":"3fa0c359_ac449db8","line":5116,"updated":"2018-02-16 12:47:21.000000000","message":"This should filter on machine type name having a prefix of \"virt\" too, and also allow for X86_64 with machine type prefix of \"q35\". Nova needs to prepare for q35 becoming the default machine type for QEMU in the not too distant future...","commit_id":"55b289d31ddca86044c350a0dbe7acee4cb06888"},{"author":{"_account_id":24072,"name":"Marcin Juszkiewicz","email":"mjuszkiewicz@redhat.com","username":"hrw"},"change_message_id":"93afd82b740d714237333639fb846fa3b87532b8","unresolved":false,"context_lines":[{"line_number":5113,"context_line":""},{"line_number":5114,"context_line":"        if caps.host.cpu.arch \u003d\u003d fields.Architecture.AARCH64:"},{"line_number":5115,"context_line":"            self._guest_add_pcie_root_ports(guest)"},{"line_number":5116,"context_line":""},{"line_number":5117,"context_line":"        self._guest_add_pci_devices(guest, instance)"},{"line_number":5118,"context_line":""},{"line_number":5119,"context_line":"        self._guest_add_watchdog_action(guest, flavor, image_meta)"}],"source_content_type":"text/x-python","patch_set":3,"id":"3fa0c359_79b7323c","line":5116,"in_reply_to":"3fa0c359_ac449db8","updated":"2018-02-16 14:05:18.000000000","message":"Done","commit_id":"55b289d31ddca86044c350a0dbe7acee4cb06888"},{"author":{"_account_id":1779,"name":"Daniel Berrange","email":"berrange@redhat.com","username":"berrange"},"change_message_id":"551a8239ae4e2570af6110d3922ebb2600dc9f70","unresolved":false,"context_lines":[{"line_number":5113,"context_line":""},{"line_number":5114,"context_line":"        # Add PCIe root port controllers for PCI Express machines"},{"line_number":5115,"context_line":"        if caps.host.cpu.arch \u003d\u003d fields.Architecture.AARCH64 or \\"},{"line_number":5116,"context_line":"            \u0027q35\u0027 in guest.os_mach_type:"},{"line_number":5117,"context_line":"            self._guest_add_pcie_root_ports(guest)"},{"line_number":5118,"context_line":""},{"line_number":5119,"context_line":"        self._guest_add_pci_devices(guest, instance)"}],"source_content_type":"text/x-python","patch_set":5,"id":"3fa0c359_5966f653","line":5116,"updated":"2018-02-16 14:30:14.000000000","message":"This is really not a good match. It still misses the matching of \"virt\" machine type in aarch64, and the matching of q35 machine type isn\u0027t filtered for arch\u003d\u003dx86_64.\n\nAs mentioned previously too, you should do a *prefix* match not an exact string match, because these machine types may have versioned suffixes on them. eg  virt-rhel-7.5.0, not simply virt","commit_id":"ae8177597078e700799d182263535acdfa8a01cc"},{"author":{"_account_id":24072,"name":"Marcin Juszkiewicz","email":"mjuszkiewicz@redhat.com","username":"hrw"},"change_message_id":"f7f4aa0c79f4c09f3f4b97b4108bd8dccf551a26","unresolved":false,"context_lines":[{"line_number":5113,"context_line":""},{"line_number":5114,"context_line":"        # Add PCIe root port controllers for PCI Express machines"},{"line_number":5115,"context_line":"        if caps.host.cpu.arch \u003d\u003d fields.Architecture.AARCH64 or \\"},{"line_number":5116,"context_line":"            \u0027q35\u0027 in guest.os_mach_type:"},{"line_number":5117,"context_line":"            self._guest_add_pcie_root_ports(guest)"},{"line_number":5118,"context_line":""},{"line_number":5119,"context_line":"        self._guest_add_pci_devices(guest, instance)"}],"source_content_type":"text/x-python","patch_set":5,"id":"3fa0c359_d21dfb0f","line":5116,"in_reply_to":"3fa0c359_5966f653","updated":"2018-02-16 15:49:46.000000000","message":"Done","commit_id":"ae8177597078e700799d182263535acdfa8a01cc"},{"author":{"_account_id":7166,"name":"Sylvain Bauza","email":"sbauza@redhat.com","username":"sbauza"},"change_message_id":"bc4e1816296d33a210c3c00c1d775eb559dfdf60","unresolved":false,"context_lines":[{"line_number":4964,"context_line":"        guest.add_device(pcieroot)"},{"line_number":4965,"context_line":""},{"line_number":4966,"context_line":"        try:"},{"line_number":4967,"context_line":"            if (CONF.libvirt.num_of_pcie_ports):"},{"line_number":4968,"context_line":"                num_of_pcie_ports \u003d CONF.libvirt.num_of_pcie_ports"},{"line_number":4969,"context_line":"            else:"},{"line_number":4970,"context_line":"                # libvirt will add what it needs"}],"source_content_type":"text/x-python","patch_set":8,"id":"3fa0c359_e6161d4a","line":4967,"updated":"2018-02-19 09:28:22.000000000","message":"you don\u0027t need to verify if the opt is set. Since it defaults to 0, it\u0027s *always* set.","commit_id":"e9d5985b87aabe99d874ac4db5e3c00d1dcf1648"},{"author":{"_account_id":24072,"name":"Marcin Juszkiewicz","email":"mjuszkiewicz@redhat.com","username":"hrw"},"change_message_id":"43eed5ab4e39a67f82d50cff8aeada4741b04c00","unresolved":false,"context_lines":[{"line_number":4964,"context_line":"        guest.add_device(pcieroot)"},{"line_number":4965,"context_line":""},{"line_number":4966,"context_line":"        try:"},{"line_number":4967,"context_line":"            if (CONF.libvirt.num_of_pcie_ports):"},{"line_number":4968,"context_line":"                num_of_pcie_ports \u003d CONF.libvirt.num_of_pcie_ports"},{"line_number":4969,"context_line":"            else:"},{"line_number":4970,"context_line":"                # libvirt will add what it needs"}],"source_content_type":"text/x-python","patch_set":8,"id":"3fa0c359_669bed65","line":4967,"in_reply_to":"3fa0c359_e6161d4a","updated":"2018-02-19 09:58:05.000000000","message":"Probably leftover from time before adding config option. Will take care of it.","commit_id":"e9d5985b87aabe99d874ac4db5e3c00d1dcf1648"},{"author":{"_account_id":7166,"name":"Sylvain Bauza","email":"sbauza@redhat.com","username":"sbauza"},"change_message_id":"bc4e1816296d33a210c3c00c1d775eb559dfdf60","unresolved":false,"context_lines":[{"line_number":4969,"context_line":"            else:"},{"line_number":4970,"context_line":"                # libvirt will add what it needs"},{"line_number":4971,"context_line":"                num_of_pcie_ports \u003d 0"},{"line_number":4972,"context_line":"        except cfg.NoSuchOptError:"},{"line_number":4973,"context_line":"                # libvirt will add what it needs"},{"line_number":4974,"context_line":"                num_of_pcie_ports \u003d 0"},{"line_number":4975,"context_line":""}],"source_content_type":"text/x-python","patch_set":8,"id":"3fa0c359_c61be170","line":4972,"updated":"2018-02-19 09:28:22.000000000","message":"you don\u0027t need to catch that exception, since the conf option is used by the compute service directly.","commit_id":"e9d5985b87aabe99d874ac4db5e3c00d1dcf1648"},{"author":{"_account_id":24072,"name":"Marcin Juszkiewicz","email":"mjuszkiewicz@redhat.com","username":"hrw"},"change_message_id":"43eed5ab4e39a67f82d50cff8aeada4741b04c00","unresolved":false,"context_lines":[{"line_number":4969,"context_line":"            else:"},{"line_number":4970,"context_line":"                # libvirt will add what it needs"},{"line_number":4971,"context_line":"                num_of_pcie_ports \u003d 0"},{"line_number":4972,"context_line":"        except cfg.NoSuchOptError:"},{"line_number":4973,"context_line":"                # libvirt will add what it needs"},{"line_number":4974,"context_line":"                num_of_pcie_ports \u003d 0"},{"line_number":4975,"context_line":""}],"source_content_type":"text/x-python","patch_set":8,"id":"3fa0c359_66b44dd2","line":4972,"in_reply_to":"3fa0c359_c61be170","updated":"2018-02-19 09:58:05.000000000","message":"Done","commit_id":"e9d5985b87aabe99d874ac4db5e3c00d1dcf1648"},{"author":{"_account_id":7166,"name":"Sylvain Bauza","email":"sbauza@redhat.com","username":"sbauza"},"change_message_id":"bc4e1816296d33a210c3c00c1d775eb559dfdf60","unresolved":false,"context_lines":[{"line_number":4973,"context_line":"                # libvirt will add what it needs"},{"line_number":4974,"context_line":"                num_of_pcie_ports \u003d 0"},{"line_number":4975,"context_line":""},{"line_number":4976,"context_line":"        # Due to memory map limits in Qemu we are limited to 28 ports."},{"line_number":4977,"context_line":"        if num_of_pcie_ports \u003e 28:"},{"line_number":4978,"context_line":"            num_of_pcie_ports \u003d 28"},{"line_number":4979,"context_line":""}],"source_content_type":"text/x-python","patch_set":8,"id":"3fa0c359_035f7b41","line":4976,"updated":"2018-02-19 09:28:22.000000000","message":"you should comment that in the release note","commit_id":"e9d5985b87aabe99d874ac4db5e3c00d1dcf1648"},{"author":{"_account_id":24072,"name":"Marcin Juszkiewicz","email":"mjuszkiewicz@redhat.com","username":"hrw"},"change_message_id":"43eed5ab4e39a67f82d50cff8aeada4741b04c00","unresolved":false,"context_lines":[{"line_number":4973,"context_line":"                # libvirt will add what it needs"},{"line_number":4974,"context_line":"                num_of_pcie_ports \u003d 0"},{"line_number":4975,"context_line":""},{"line_number":4976,"context_line":"        # Due to memory map limits in Qemu we are limited to 28 ports."},{"line_number":4977,"context_line":"        if num_of_pcie_ports \u003e 28:"},{"line_number":4978,"context_line":"            num_of_pcie_ports \u003d 28"},{"line_number":4979,"context_line":""}],"source_content_type":"text/x-python","patch_set":8,"id":"3fa0c359_26c6454b","line":4976,"in_reply_to":"3fa0c359_035f7b41","updated":"2018-02-19 09:58:05.000000000","message":"Done","commit_id":"e9d5985b87aabe99d874ac4db5e3c00d1dcf1648"},{"author":{"_account_id":24072,"name":"Marcin Juszkiewicz","email":"mjuszkiewicz@redhat.com","username":"hrw"},"change_message_id":"fecc8c81d4ca61d728534f8269001f2e57b1f102","unresolved":false,"context_lines":[{"line_number":5116,"context_line":"                guest.os_mach_type.startswith(\u0027virt\u0027)) or"},{"line_number":5117,"context_line":"                (caps.host.cpu.arch \u003d\u003d fields.Architecture.X86_64 and"},{"line_number":5118,"context_line":"                (guest.os_mach_type is not None) and"},{"line_number":5119,"context_line":"                \u0027q35\u0027 in guest.os_mach_type)):"},{"line_number":5120,"context_line":"            self._guest_add_pcie_root_ports(guest)"},{"line_number":5121,"context_line":""},{"line_number":5122,"context_line":"        self._guest_add_pci_devices(guest, instance)"}],"source_content_type":"text/x-python","patch_set":8,"id":"3fa0c359_5a2a4be7","line":5119,"range":{"start_line":5119,"start_character":11,"end_line":5119,"end_character":46},"updated":"2018-02-18 18:30:11.000000000","message":"Can not use .startswith(\u0027q35\u0027) as in previous patch:\n\n(venv-for-all) 19:28 (4s) hrw@puchatek:nova$ qemu-system-x86_64 -M ?|grep q35\npc-q35-2.9           Standard PC (Q35 + ICH9, 2009)\npc-q35-2.8           Standard PC (Q35 + ICH9, 2009)\npc-q35-2.7           Standard PC (Q35 + ICH9, 2009)\npc-q35-2.6           Standard PC (Q35 + ICH9, 2009)\npc-q35-2.5           Standard PC (Q35 + ICH9, 2009)\npc-q35-2.4           Standard PC (Q35 + ICH9, 2009)\nq35                  Standard PC (Q35 + ICH9, 2009) (alias of pc-q35-2.10)\npc-q35-2.10          Standard PC (Q35 + ICH9, 2009)","commit_id":"e9d5985b87aabe99d874ac4db5e3c00d1dcf1648"},{"author":{"_account_id":27248,"name":"Prateek Goel","email":"prateek.goel2@tatacommunications.com","username":"prateek.goel"},"change_message_id":"a385a8eb1e86840498a1e7147c8cc49d6faf0f2e","unresolved":false,"context_lines":[{"line_number":4963,"context_line":""},{"line_number":4964,"context_line":"        num_of_pcie_ports \u003d CONF.libvirt.num_of_pcie_ports"},{"line_number":4965,"context_line":""},{"line_number":4966,"context_line":"        # Due to memory map limits in Qemu we are limited to 28 ports."},{"line_number":4967,"context_line":"        if num_of_pcie_ports \u003e 28:"},{"line_number":4968,"context_line":"            num_of_pcie_ports \u003d 28"},{"line_number":4969,"context_line":""},{"line_number":4970,"context_line":"        for x in range(0, num_of_pcie_ports):"},{"line_number":4971,"context_line":"            pcierootport \u003d vconfig.LibvirtConfigGuestPCIeRootPortController()"}],"source_content_type":"text/x-python","patch_set":9,"id":"3fa0c359_307c22ea","line":4968,"range":{"start_line":4966,"start_character":0,"end_line":4968,"end_character":34},"updated":"2018-02-20 06:44:28.000000000","message":"Would we not want to error out here? However, if, we limit the num_of_pcie_ports by max attribute in conf/libvirt.py then this can be eliminated.","commit_id":"ff04850965c5242fe4c9cdebec271471aaf551ec"},{"author":{"_account_id":24072,"name":"Marcin Juszkiewicz","email":"mjuszkiewicz@redhat.com","username":"hrw"},"change_message_id":"f20b45e67c926e3f05bea7177d43ec15ac7cb27d","unresolved":false,"context_lines":[{"line_number":4963,"context_line":""},{"line_number":4964,"context_line":"        num_of_pcie_ports \u003d CONF.libvirt.num_of_pcie_ports"},{"line_number":4965,"context_line":""},{"line_number":4966,"context_line":"        # Due to memory map limits in Qemu we are limited to 28 ports."},{"line_number":4967,"context_line":"        if num_of_pcie_ports \u003e 28:"},{"line_number":4968,"context_line":"            num_of_pcie_ports \u003d 28"},{"line_number":4969,"context_line":""},{"line_number":4970,"context_line":"        for x in range(0, num_of_pcie_ports):"},{"line_number":4971,"context_line":"            pcierootport \u003d vconfig.LibvirtConfigGuestPCIeRootPortController()"}],"source_content_type":"text/x-python","patch_set":9,"id":"3fa0c359_fe30cb09","line":4968,"range":{"start_line":4966,"start_character":0,"end_line":4968,"end_character":34},"in_reply_to":"3fa0c359_307c22ea","updated":"2018-02-20 09:00:05.000000000","message":"Code eliminated","commit_id":"ff04850965c5242fe4c9cdebec271471aaf551ec"},{"author":{"_account_id":24072,"name":"Marcin Juszkiewicz","email":"mjuszkiewicz@redhat.com","username":"hrw"},"change_message_id":"f20b45e67c926e3f05bea7177d43ec15ac7cb27d","unresolved":false,"context_lines":[{"line_number":5102,"context_line":"            self._set_qemu_guest_agent(guest, flavor, instance, image_meta)"},{"line_number":5103,"context_line":""},{"line_number":5104,"context_line":"        # Add PCIe root port controllers for PCI Express machines"},{"line_number":5105,"context_line":"        if ((caps.host.cpu.arch \u003d\u003d fields.Architecture.AARCH64 and"},{"line_number":5106,"context_line":"                guest.os_mach_type.startswith(\u0027virt\u0027)) or"},{"line_number":5107,"context_line":"                (caps.host.cpu.arch \u003d\u003d fields.Architecture.X86_64 and"},{"line_number":5108,"context_line":"                (guest.os_mach_type is not None) and"},{"line_number":5109,"context_line":"                \u0027q35\u0027 in guest.os_mach_type)):"},{"line_number":5110,"context_line":"            self._guest_add_pcie_root_ports(guest)"},{"line_number":5111,"context_line":""},{"line_number":5112,"context_line":"        self._guest_add_pci_devices(guest, instance)"}],"source_content_type":"text/x-python","patch_set":9,"id":"3fa0c359_7e24bbc6","line":5109,"range":{"start_line":5105,"start_character":8,"end_line":5109,"end_character":46},"updated":"2018-02-20 09:00:05.000000000","message":"Added check for num_of_pcie_ports being configured as if it is not set then we go with defaults.","commit_id":"ff04850965c5242fe4c9cdebec271471aaf551ec"},{"author":{"_account_id":7,"name":"Jay Pipes","email":"jaypipes@gmail.com","username":"jaypipes"},"change_message_id":"6d60889ceb99c13fcf16f29042f266b2669d31be","unresolved":false,"context_lines":[{"line_number":4951,"context_line":"    def _guest_add_pcie_root_ports(self, guest):"},{"line_number":4952,"context_line":"        \"\"\"Add PCI Express root ports."},{"line_number":4953,"context_line":""},{"line_number":4954,"context_line":"        PCI Express machine can have so many PCIe devices as it has"},{"line_number":4955,"context_line":"        pcie-root-port controllers (slots in virtual motherboard)."},{"line_number":4956,"context_line":""},{"line_number":4957,"context_line":"        If we want to have more PCIe slots for hotplug then we need to create"}],"source_content_type":"text/x-python","patch_set":10,"id":"3fa0c359_d4f6e7d7","line":4954,"range":{"start_line":4954,"start_character":37,"end_line":4954,"end_character":39},"updated":"2018-02-21 16:46:04.000000000","message":"s/so/as/\n\n\"as many devices as it has controllers...\"","commit_id":"785e915bba9ab9360d92813e529df5d47b2806e4"},{"author":{"_account_id":24072,"name":"Marcin Juszkiewicz","email":"mjuszkiewicz@redhat.com","username":"hrw"},"change_message_id":"3297133cd933ea52fad90f8ebbba26f6f354bc33","unresolved":false,"context_lines":[{"line_number":4951,"context_line":"    def _guest_add_pcie_root_ports(self, guest):"},{"line_number":4952,"context_line":"        \"\"\"Add PCI Express root ports."},{"line_number":4953,"context_line":""},{"line_number":4954,"context_line":"        PCI Express machine can have so many PCIe devices as it has"},{"line_number":4955,"context_line":"        pcie-root-port controllers (slots in virtual motherboard)."},{"line_number":4956,"context_line":""},{"line_number":4957,"context_line":"        If we want to have more PCIe slots for hotplug then we need to create"}],"source_content_type":"text/x-python","patch_set":10,"id":"3fa0c359_ef055011","line":4954,"range":{"start_line":4954,"start_character":37,"end_line":4954,"end_character":39},"in_reply_to":"3fa0c359_d4f6e7d7","updated":"2018-02-21 17:06:50.000000000","message":"Done","commit_id":"785e915bba9ab9360d92813e529df5d47b2806e4"},{"author":{"_account_id":7,"name":"Jay Pipes","email":"jaypipes@gmail.com","username":"jaypipes"},"change_message_id":"6d60889ceb99c13fcf16f29042f266b2669d31be","unresolved":false,"context_lines":[{"line_number":5101,"context_line":"                (caps.host.cpu.arch \u003d\u003d fields.Architecture.AARCH64 and"},{"line_number":5102,"context_line":"                guest.os_mach_type.startswith(\u0027virt\u0027)) or"},{"line_number":5103,"context_line":"                (caps.host.cpu.arch \u003d\u003d fields.Architecture.X86_64 and"},{"line_number":5104,"context_line":"                (guest.os_mach_type is not None) and"},{"line_number":5105,"context_line":"                \u0027q35\u0027 in guest.os_mach_type)):"},{"line_number":5106,"context_line":"            self._guest_add_pcie_root_ports(guest)"},{"line_number":5107,"context_line":""}],"source_content_type":"text/x-python","patch_set":10,"id":"3fa0c359_d4cd8785","line":5104,"range":{"start_line":5104,"start_character":16,"end_line":5104,"end_character":48},"updated":"2018-02-21 16:46:04.000000000","message":"parens not needed around this conditional","commit_id":"785e915bba9ab9360d92813e529df5d47b2806e4"},{"author":{"_account_id":24072,"name":"Marcin Juszkiewicz","email":"mjuszkiewicz@redhat.com","username":"hrw"},"change_message_id":"3297133cd933ea52fad90f8ebbba26f6f354bc33","unresolved":false,"context_lines":[{"line_number":5101,"context_line":"                (caps.host.cpu.arch \u003d\u003d fields.Architecture.AARCH64 and"},{"line_number":5102,"context_line":"                guest.os_mach_type.startswith(\u0027virt\u0027)) or"},{"line_number":5103,"context_line":"                (caps.host.cpu.arch \u003d\u003d fields.Architecture.X86_64 and"},{"line_number":5104,"context_line":"                (guest.os_mach_type is not None) and"},{"line_number":5105,"context_line":"                \u0027q35\u0027 in guest.os_mach_type)):"},{"line_number":5106,"context_line":"            self._guest_add_pcie_root_ports(guest)"},{"line_number":5107,"context_line":""}],"source_content_type":"text/x-python","patch_set":10,"id":"3fa0c359_0f0bdc23","line":5104,"range":{"start_line":5104,"start_character":16,"end_line":5104,"end_character":48},"in_reply_to":"3fa0c359_d4cd8785","updated":"2018-02-21 17:06:50.000000000","message":"Done","commit_id":"785e915bba9ab9360d92813e529df5d47b2806e4"},{"author":{"_account_id":6873,"name":"Matt Riedemann","email":"mriedem.os@gmail.com","username":"mriedem"},"change_message_id":"a2fe6c250640034066357b83f3d8704cedb22af7","unresolved":false,"context_lines":[{"line_number":4087,"context_line":"                mach_type \u003d \"vexpress-a15\""},{"line_number":4088,"context_line":""},{"line_number":4089,"context_line":"            if caps.host.cpu.arch \u003d\u003d fields.Architecture.AARCH64:"},{"line_number":4090,"context_line":"                mach_type \u003d \"virt\""},{"line_number":4091,"context_line":""},{"line_number":4092,"context_line":"            if caps.host.cpu.arch in (fields.Architecture.S390,"},{"line_number":4093,"context_line":"                                      fields.Architecture.S390X):"}],"source_content_type":"text/x-python","patch_set":13,"id":"df7087c5_1c3ba3d1","line":4090,"updated":"2018-03-07 17:27:48.000000000","message":"OK I see where mach_type is hard-coded for aarch64.","commit_id":"c09d6caa50faf87670534726237568e35cae2244"},{"author":{"_account_id":6873,"name":"Matt Riedemann","email":"mriedem.os@gmail.com","username":"mriedem"},"change_message_id":"127b2f5cf9cf7b872d4e491f38930f664aa84080","unresolved":false,"context_lines":[{"line_number":5105,"context_line":"                ((caps.host.cpu.arch \u003d\u003d fields.Architecture.AARCH64 and"},{"line_number":5106,"context_line":"                guest.os_mach_type.startswith(\u0027virt\u0027)) or"},{"line_number":5107,"context_line":"                (caps.host.cpu.arch \u003d\u003d fields.Architecture.X86_64 and"},{"line_number":5108,"context_line":"                guest.os_mach_type is not None and"},{"line_number":5109,"context_line":"                \u0027q35\u0027 in guest.os_mach_type))):"},{"line_number":5110,"context_line":"            self._guest_add_pcie_root_ports(guest)"},{"line_number":5111,"context_line":""}],"source_content_type":"text/x-python","patch_set":13,"id":"df7087c5_21a2009c","line":5108,"range":{"start_line":5108,"start_character":16,"end_line":5108,"end_character":46},"updated":"2018-03-07 17:07:41.000000000","message":"Why do you check is not None for x86 but not aarch64?","commit_id":"c09d6caa50faf87670534726237568e35cae2244"},{"author":{"_account_id":24072,"name":"Marcin Juszkiewicz","email":"mjuszkiewicz@redhat.com","username":"hrw"},"change_message_id":"ad7e3acf7706693b70fb1c2408acda960ccaf973","unresolved":false,"context_lines":[{"line_number":5105,"context_line":"                ((caps.host.cpu.arch \u003d\u003d fields.Architecture.AARCH64 and"},{"line_number":5106,"context_line":"                guest.os_mach_type.startswith(\u0027virt\u0027)) or"},{"line_number":5107,"context_line":"                (caps.host.cpu.arch \u003d\u003d fields.Architecture.X86_64 and"},{"line_number":5108,"context_line":"                guest.os_mach_type is not None and"},{"line_number":5109,"context_line":"                \u0027q35\u0027 in guest.os_mach_type))):"},{"line_number":5110,"context_line":"            self._guest_add_pcie_root_ports(guest)"},{"line_number":5111,"context_line":""}],"source_content_type":"text/x-python","patch_set":13,"id":"df7087c5_81d50cbc","line":5108,"range":{"start_line":5108,"start_character":16,"end_line":5108,"end_character":46},"in_reply_to":"df7087c5_21a2009c","updated":"2018-03-07 17:16:59.000000000","message":"On aarch64 nova sets it to \u0027virt\u0027 in libvirt/driver.py:L4152 when on x86-64 it needs to be set by config/image option.","commit_id":"c09d6caa50faf87670534726237568e35cae2244"},{"author":{"_account_id":15334,"name":"Stephen Finucane","display_name":"stephenfin","email":"stephenfin@redhat.com","username":"sfinucan"},"change_message_id":"92980fe13dd69f394bafe45f847139695c39916e","unresolved":false,"context_lines":[{"line_number":5102,"context_line":"        # Add PCIe root port controllers for PCI Express machines"},{"line_number":5103,"context_line":"        # but only if their amount is configured"},{"line_number":5104,"context_line":"        if (CONF.libvirt.num_pcie_ports and"},{"line_number":5105,"context_line":"                ((caps.host.cpu.arch \u003d\u003d fields.Architecture.AARCH64 and"},{"line_number":5106,"context_line":"                guest.os_mach_type.startswith(\u0027virt\u0027)) or"},{"line_number":5107,"context_line":"                (caps.host.cpu.arch \u003d\u003d fields.Architecture.X86_64 and"},{"line_number":5108,"context_line":"                guest.os_mach_type is not None and"},{"line_number":5109,"context_line":"                \u0027q35\u0027 in guest.os_mach_type))):"},{"line_number":5110,"context_line":"            self._guest_add_pcie_root_ports(guest)"},{"line_number":5111,"context_line":""},{"line_number":5112,"context_line":"        self._guest_add_pci_devices(guest, instance)"}],"source_content_type":"text/x-python","patch_set":13,"id":"df7087c5_369fa851","line":5109,"range":{"start_line":5105,"start_character":0,"end_line":5109,"end_character":47},"updated":"2018-03-07 16:36:40.000000000","message":"Do we need to warn if the user has configured the option and we can\u0027t support it? We should probably add a warning in \u0027_do_quality_warnings\u0027 if so.","commit_id":"c09d6caa50faf87670534726237568e35cae2244"},{"author":{"_account_id":24072,"name":"Marcin Juszkiewicz","email":"mjuszkiewicz@redhat.com","username":"hrw"},"change_message_id":"ad7e3acf7706693b70fb1c2408acda960ccaf973","unresolved":false,"context_lines":[{"line_number":5102,"context_line":"        # Add PCIe root port controllers for PCI Express machines"},{"line_number":5103,"context_line":"        # but only if their amount is configured"},{"line_number":5104,"context_line":"        if (CONF.libvirt.num_pcie_ports and"},{"line_number":5105,"context_line":"                ((caps.host.cpu.arch \u003d\u003d fields.Architecture.AARCH64 and"},{"line_number":5106,"context_line":"                guest.os_mach_type.startswith(\u0027virt\u0027)) or"},{"line_number":5107,"context_line":"                (caps.host.cpu.arch \u003d\u003d fields.Architecture.X86_64 and"},{"line_number":5108,"context_line":"                guest.os_mach_type is not None and"},{"line_number":5109,"context_line":"                \u0027q35\u0027 in guest.os_mach_type))):"},{"line_number":5110,"context_line":"            self._guest_add_pcie_root_ports(guest)"},{"line_number":5111,"context_line":""},{"line_number":5112,"context_line":"        self._guest_add_pci_devices(guest, instance)"}],"source_content_type":"text/x-python","patch_set":13,"id":"df7087c5_c199c41f","line":5109,"range":{"start_line":5105,"start_character":0,"end_line":5109,"end_character":47},"in_reply_to":"df7087c5_019b3c72","updated":"2018-03-07 17:16:59.000000000","message":"On aarch64/virt it would be called on all instances. On x86-64 depends on configuration/images.","commit_id":"c09d6caa50faf87670534726237568e35cae2244"},{"author":{"_account_id":15334,"name":"Stephen Finucane","display_name":"stephenfin","email":"stephenfin@redhat.com","username":"sfinucan"},"change_message_id":"e07cc3be483bbe215ecc982b7be33e52a5929b4e","unresolved":false,"context_lines":[{"line_number":5102,"context_line":"        # Add PCIe root port controllers for PCI Express machines"},{"line_number":5103,"context_line":"        # but only if their amount is configured"},{"line_number":5104,"context_line":"        if (CONF.libvirt.num_pcie_ports and"},{"line_number":5105,"context_line":"                ((caps.host.cpu.arch \u003d\u003d fields.Architecture.AARCH64 and"},{"line_number":5106,"context_line":"                guest.os_mach_type.startswith(\u0027virt\u0027)) or"},{"line_number":5107,"context_line":"                (caps.host.cpu.arch \u003d\u003d fields.Architecture.X86_64 and"},{"line_number":5108,"context_line":"                guest.os_mach_type is not None and"},{"line_number":5109,"context_line":"                \u0027q35\u0027 in guest.os_mach_type))):"},{"line_number":5110,"context_line":"            self._guest_add_pcie_root_ports(guest)"},{"line_number":5111,"context_line":""},{"line_number":5112,"context_line":"        self._guest_add_pci_devices(guest, instance)"}],"source_content_type":"text/x-python","patch_set":13,"id":"df7087c5_e12088fa","line":5109,"range":{"start_line":5105,"start_character":0,"end_line":5109,"end_character":47},"in_reply_to":"df7087c5_019b3c72","updated":"2018-03-07 17:13:23.000000000","message":"Um, yeah, actually that\u0027s true. The warning would go here if anywhere. Per IRC discussion, it looks like we\u0027re thinking it\u0027s not necessary. Guess that\u0027s good","commit_id":"c09d6caa50faf87670534726237568e35cae2244"},{"author":{"_account_id":24072,"name":"Marcin Juszkiewicz","email":"mjuszkiewicz@redhat.com","username":"hrw"},"change_message_id":"1cf3a3b38e246c0f8f5e081a784fd5cd40c3747e","unresolved":false,"context_lines":[{"line_number":5102,"context_line":"        # Add PCIe root port controllers for PCI Express machines"},{"line_number":5103,"context_line":"        # but only if their amount is configured"},{"line_number":5104,"context_line":"        if (CONF.libvirt.num_pcie_ports and"},{"line_number":5105,"context_line":"                ((caps.host.cpu.arch \u003d\u003d fields.Architecture.AARCH64 and"},{"line_number":5106,"context_line":"                guest.os_mach_type.startswith(\u0027virt\u0027)) or"},{"line_number":5107,"context_line":"                (caps.host.cpu.arch \u003d\u003d fields.Architecture.X86_64 and"},{"line_number":5108,"context_line":"                guest.os_mach_type is not None and"},{"line_number":5109,"context_line":"                \u0027q35\u0027 in guest.os_mach_type))):"},{"line_number":5110,"context_line":"            self._guest_add_pcie_root_ports(guest)"},{"line_number":5111,"context_line":""},{"line_number":5112,"context_line":"        self._guest_add_pci_devices(guest, instance)"}],"source_content_type":"text/x-python","patch_set":13,"id":"df7087c5_b6f4185d","line":5109,"range":{"start_line":5105,"start_character":0,"end_line":5109,"end_character":47},"in_reply_to":"df7087c5_369fa851","updated":"2018-03-07 16:51:40.000000000","message":"Do not think that we need to give a warning if option is used for !(x86/q35 | aarch64/virt) machines.","commit_id":"c09d6caa50faf87670534726237568e35cae2244"},{"author":{"_account_id":6873,"name":"Matt Riedemann","email":"mriedem.os@gmail.com","username":"mriedem"},"change_message_id":"127b2f5cf9cf7b872d4e491f38930f664aa84080","unresolved":false,"context_lines":[{"line_number":5102,"context_line":"        # Add PCIe root port controllers for PCI Express machines"},{"line_number":5103,"context_line":"        # but only if their amount is configured"},{"line_number":5104,"context_line":"        if (CONF.libvirt.num_pcie_ports and"},{"line_number":5105,"context_line":"                ((caps.host.cpu.arch \u003d\u003d fields.Architecture.AARCH64 and"},{"line_number":5106,"context_line":"                guest.os_mach_type.startswith(\u0027virt\u0027)) or"},{"line_number":5107,"context_line":"                (caps.host.cpu.arch \u003d\u003d fields.Architecture.X86_64 and"},{"line_number":5108,"context_line":"                guest.os_mach_type is not None and"},{"line_number":5109,"context_line":"                \u0027q35\u0027 in guest.os_mach_type))):"},{"line_number":5110,"context_line":"            self._guest_add_pcie_root_ports(guest)"},{"line_number":5111,"context_line":""},{"line_number":5112,"context_line":"        self._guest_add_pci_devices(guest, instance)"}],"source_content_type":"text/x-python","patch_set":13,"id":"df7087c5_019b3c72","line":5109,"range":{"start_line":5105,"start_character":0,"end_line":5109,"end_character":47},"in_reply_to":"df7087c5_b6f4185d","updated":"2018-03-07 17:07:41.000000000","message":"_do_quality_warnings isn\u0027t appropriate if this is a per-guest condition, which it looks like it is based on guest.os_match_type, right? _do_quality_warnings is for global warnings when starting up the driver. Is this condition based on each guest which is based on something like the flavor or image used?","commit_id":"c09d6caa50faf87670534726237568e35cae2244"},{"author":{"_account_id":6873,"name":"Matt Riedemann","email":"mriedem.os@gmail.com","username":"mriedem"},"change_message_id":"f6098246b461b4049d44f71078f83ed8e211cedd","unresolved":false,"context_lines":[{"line_number":5177,"context_line":""},{"line_number":5178,"context_line":"        # Add PCIe root port controllers for PCI Express machines"},{"line_number":5179,"context_line":"        # but only if their amount is configured"},{"line_number":5180,"context_line":"        if (CONF.libvirt.num_pcie_ports and"},{"line_number":5181,"context_line":"                ((caps.host.cpu.arch \u003d\u003d fields.Architecture.AARCH64 and"},{"line_number":5182,"context_line":"                guest.os_mach_type.startswith(\u0027virt\u0027)) or"},{"line_number":5183,"context_line":"                (caps.host.cpu.arch \u003d\u003d fields.Architecture.X86_64 and"}],"source_content_type":"text/x-python","patch_set":15,"id":"df7087c5_7f564c09","line":5180,"updated":"2018-03-07 22:20:42.000000000","message":"nit: it would be nice to have another test where num_pcie_ports\u003e0 but the arch is not x86_64 or aarch64 (ppc64?) and/or the machine type is not q35 or virt, respectively, to show that the num_pcie_ports value is ignored.","commit_id":"63555e098c9eb8f125292a33cf731d36e8c7a65e"},{"author":{"_account_id":24072,"name":"Marcin Juszkiewicz","email":"mjuszkiewicz@redhat.com","username":"hrw"},"change_message_id":"955631c387bf70e7ba88acc272c4713294ca7543","unresolved":false,"context_lines":[{"line_number":5177,"context_line":""},{"line_number":5178,"context_line":"        # Add PCIe root port controllers for PCI Express machines"},{"line_number":5179,"context_line":"        # but only if their amount is configured"},{"line_number":5180,"context_line":"        if (CONF.libvirt.num_pcie_ports and"},{"line_number":5181,"context_line":"                ((caps.host.cpu.arch \u003d\u003d fields.Architecture.AARCH64 and"},{"line_number":5182,"context_line":"                guest.os_mach_type.startswith(\u0027virt\u0027)) or"},{"line_number":5183,"context_line":"                (caps.host.cpu.arch \u003d\u003d fields.Architecture.X86_64 and"}],"source_content_type":"text/x-python","patch_set":15,"id":"df7087c5_89cbe551","line":5180,"in_reply_to":"df7087c5_7f564c09","updated":"2018-03-08 07:52:37.000000000","message":"test_get_guest_config_pcie_i440fx added - same as test_get_guest_config_q35 but with \u0027pc-i440fx-test\u0027 as hw_machine_type and assertEqual with 0","commit_id":"63555e098c9eb8f125292a33cf731d36e8c7a65e"}],"releasenotes/notes/configure-amount-of-pcie-ports-486bfa44e9fbdd84.yaml":[{"author":{"_account_id":7166,"name":"Sylvain Bauza","email":"sbauza@redhat.com","username":"sbauza"},"change_message_id":"bc4e1816296d33a210c3c00c1d775eb559dfdf60","unresolved":false,"context_lines":[{"line_number":1,"context_line":"---"},{"line_number":2,"context_line":"features:"},{"line_number":3,"context_line":"  - |"},{"line_number":4,"context_line":"    Amount of PCI Express ports (slots in virtual motherboard) can be configured"},{"line_number":5,"context_line":"    with ``num_of_pcie_ports`` option in ``libvirt`` section of nova.conf file."}],"source_content_type":"text/x-yaml","patch_set":8,"id":"3fa0c359_4621119f","line":2,"range":{"start_line":2,"start_character":0,"end_line":2,"end_character":8},"updated":"2018-02-19 09:28:22.000000000","message":"the most important comment is here: I think you should add a blueprint for that change and discuss with the nova team whether you need a spec.","commit_id":"e9d5985b87aabe99d874ac4db5e3c00d1dcf1648"},{"author":{"_account_id":7,"name":"Jay Pipes","email":"jaypipes@gmail.com","username":"jaypipes"},"change_message_id":"6d60889ceb99c13fcf16f29042f266b2669d31be","unresolved":false,"context_lines":[{"line_number":2,"context_line":"features:"},{"line_number":3,"context_line":"  - |"},{"line_number":4,"context_line":"    Amount of PCI Express ports (slots in virtual motherboard) can be configured"},{"line_number":5,"context_line":"    with ``num_of_pcie_ports`` option in ``libvirt`` section of nova.conf file."},{"line_number":6,"context_line":"    This affects x86-64 with ``hw_machine_type`` set to \u0027pc-q35\u0027 value and"},{"line_number":7,"context_line":"    AArch64 instances of \u0027virt\u0027 ``hw_machine_type`` (which is default for that"},{"line_number":8,"context_line":"    architecture). Due to Qemu\u0027s memory map limits maximum value is limited to"}],"source_content_type":"text/x-yaml","patch_set":10,"id":"3fa0c359_5490974a","line":5,"range":{"start_line":5,"start_character":15,"end_line":5,"end_character":18},"updated":"2018-02-21 16:46:04.000000000","message":"s/of_//","commit_id":"785e915bba9ab9360d92813e529df5d47b2806e4"},{"author":{"_account_id":24072,"name":"Marcin Juszkiewicz","email":"mjuszkiewicz@redhat.com","username":"hrw"},"change_message_id":"3297133cd933ea52fad90f8ebbba26f6f354bc33","unresolved":false,"context_lines":[{"line_number":2,"context_line":"features:"},{"line_number":3,"context_line":"  - |"},{"line_number":4,"context_line":"    Amount of PCI Express ports (slots in virtual motherboard) can be configured"},{"line_number":5,"context_line":"    with ``num_of_pcie_ports`` option in ``libvirt`` section of nova.conf file."},{"line_number":6,"context_line":"    This affects x86-64 with ``hw_machine_type`` set to \u0027pc-q35\u0027 value and"},{"line_number":7,"context_line":"    AArch64 instances of \u0027virt\u0027 ``hw_machine_type`` (which is default for that"},{"line_number":8,"context_line":"    architecture). Due to Qemu\u0027s memory map limits maximum value is limited to"}],"source_content_type":"text/x-yaml","patch_set":10,"id":"3fa0c359_6f194078","line":5,"range":{"start_line":5,"start_character":15,"end_line":5,"end_character":18},"in_reply_to":"3fa0c359_5490974a","updated":"2018-02-21 17:06:50.000000000","message":"Done","commit_id":"785e915bba9ab9360d92813e529df5d47b2806e4"},{"author":{"_account_id":7,"name":"Jay Pipes","email":"jaypipes@gmail.com","username":"jaypipes"},"change_message_id":"6d60889ceb99c13fcf16f29042f266b2669d31be","unresolved":false,"context_lines":[{"line_number":5,"context_line":"    with ``num_of_pcie_ports`` option in ``libvirt`` section of nova.conf file."},{"line_number":6,"context_line":"    This affects x86-64 with ``hw_machine_type`` set to \u0027pc-q35\u0027 value and"},{"line_number":7,"context_line":"    AArch64 instances of \u0027virt\u0027 ``hw_machine_type`` (which is default for that"},{"line_number":8,"context_line":"    architecture). Due to Qemu\u0027s memory map limits maximum value is limited to"},{"line_number":9,"context_line":"    28."}],"source_content_type":"text/x-yaml","patch_set":10,"id":"3fa0c359_14868f14","line":8,"range":{"start_line":8,"start_character":26,"end_line":8,"end_character":30},"updated":"2018-02-21 16:46:04.000000000","message":"QEMU","commit_id":"785e915bba9ab9360d92813e529df5d47b2806e4"},{"author":{"_account_id":24072,"name":"Marcin Juszkiewicz","email":"mjuszkiewicz@redhat.com","username":"hrw"},"change_message_id":"3297133cd933ea52fad90f8ebbba26f6f354bc33","unresolved":false,"context_lines":[{"line_number":5,"context_line":"    with ``num_of_pcie_ports`` option in ``libvirt`` section of nova.conf file."},{"line_number":6,"context_line":"    This affects x86-64 with ``hw_machine_type`` set to \u0027pc-q35\u0027 value and"},{"line_number":7,"context_line":"    AArch64 instances of \u0027virt\u0027 ``hw_machine_type`` (which is default for that"},{"line_number":8,"context_line":"    architecture). Due to Qemu\u0027s memory map limits maximum value is limited to"},{"line_number":9,"context_line":"    28."}],"source_content_type":"text/x-yaml","patch_set":10,"id":"3fa0c359_2f29f888","line":8,"range":{"start_line":8,"start_character":26,"end_line":8,"end_character":30},"in_reply_to":"3fa0c359_14868f14","updated":"2018-02-21 17:06:50.000000000","message":"Done","commit_id":"785e915bba9ab9360d92813e529df5d47b2806e4"},{"author":{"_account_id":15334,"name":"Stephen Finucane","display_name":"stephenfin","email":"stephenfin@redhat.com","username":"sfinucan"},"change_message_id":"92980fe13dd69f394bafe45f847139695c39916e","unresolved":false,"context_lines":[{"line_number":1,"context_line":"---"},{"line_number":2,"context_line":"features:"},{"line_number":3,"context_line":"  - |"},{"line_number":4,"context_line":"    Amount of PCI Express ports (slots in virtual motherboard) can be configured"},{"line_number":5,"context_line":"    with ``num_pcie_ports`` option in ``libvirt`` section of nova.conf file."},{"line_number":6,"context_line":"    This affects x86-64 with ``hw_machine_type`` set to \u0027pc-q35\u0027 value and"},{"line_number":7,"context_line":"    AArch64 instances of \u0027virt\u0027 ``hw_machine_type`` (which is default for that"}],"source_content_type":"text/x-yaml","patch_set":13,"id":"df7087c5_16cb8453","line":4,"range":{"start_line":4,"start_character":4,"end_line":4,"end_character":10},"updated":"2018-03-07 16:36:40.000000000","message":"The amount","commit_id":"c09d6caa50faf87670534726237568e35cae2244"},{"author":{"_account_id":15334,"name":"Stephen Finucane","display_name":"stephenfin","email":"stephenfin@redhat.com","username":"sfinucan"},"change_message_id":"92980fe13dd69f394bafe45f847139695c39916e","unresolved":false,"context_lines":[{"line_number":1,"context_line":"---"},{"line_number":2,"context_line":"features:"},{"line_number":3,"context_line":"  - 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Due to QEMU\u0027s memory map limits on aarch64/virt maximum"}],"source_content_type":"text/x-yaml","patch_set":13,"id":"df7087c5_56e6dcea","line":5,"range":{"start_line":5,"start_character":61,"end_line":5,"end_character":70},"updated":"2018-03-07 16:36:40.000000000","message":"``nova.conf``","commit_id":"c09d6caa50faf87670534726237568e35cae2244"},{"author":{"_account_id":15334,"name":"Stephen Finucane","display_name":"stephenfin","email":"stephenfin@redhat.com","username":"sfinucan"},"change_message_id":"92980fe13dd69f394bafe45f847139695c39916e","unresolved":false,"context_lines":[{"line_number":2,"context_line":"features:"},{"line_number":3,"context_line":"  - |"},{"line_number":4,"context_line":"    Amount of PCI Express ports (slots in virtual motherboard) can be configured"},{"line_number":5,"context_line":"    with ``num_pcie_ports`` option in ``libvirt`` section of nova.conf file."},{"line_number":6,"context_line":"    This affects x86-64 with ``hw_machine_type`` set to \u0027pc-q35\u0027 value and"},{"line_number":7,"context_line":"    AArch64 instances of \u0027virt\u0027 ``hw_machine_type`` (which is default for that"},{"line_number":8,"context_line":"    architecture). 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