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This commit increase the maximum limit to 64 and\nset a maximum value of 28 only for AARCH64.\n\nChange-Id: I71682d1d8d2f1574e7f9fe04cac1e03d7c77f0f2\n","web_links":[{"name":"gitea","tooltip":"Open in GitWeb","url":"https://opendev.org/openstack/nova/commit/e14cb3292f2ffa8ab5e9a0c1c1461de6a0a5304a"}],"resolve_conflicts_web_links":[{"name":"gitea","tooltip":"Open in GitWeb","url":"https://opendev.org/openstack/nova/commit/e14cb3292f2ffa8ab5e9a0c1c1461de6a0a5304a"}]},"branch":"refs/heads/master"},"ef7ffe066a10f57603478e886c5fec354cb471a3":{"kind":"NO_CODE_CHANGE","_number":2,"created":"2023-01-20 17:11:58.000000000","uploader":{"_account_id":7130,"name":"David Hill","email":"davidchill@hotmail.com","username":"dhill"},"ref":"refs/changes/05/871305/2","fetch":{"anonymous http":{"url":"https://review.opendev.org/openstack/nova","ref":"refs/changes/05/871305/2","commands":{"Checkout":"git fetch https://review.opendev.org/openstack/nova refs/changes/05/871305/2 \u0026\u0026 git checkout FETCH_HEAD","Cherry Pick":"git fetch https://review.opendev.org/openstack/nova refs/changes/05/871305/2 \u0026\u0026 git cherry-pick FETCH_HEAD","Format Patch":"git fetch https://review.opendev.org/openstack/nova refs/changes/05/871305/2 \u0026\u0026 git format-patch -1 --stdout FETCH_HEAD","Pull":"git pull https://review.opendev.org/openstack/nova refs/changes/05/871305/2"}}},"commit":{"parents":[{"commit":"6abbcc5033c86c1503d2e8018687476c16ebf6f2","subject":"Merge \"Split ignored_tags in stats.py\"","web_links":[{"name":"gitea","tooltip":"Open in GitWeb","url":"https://opendev.org/openstack/nova/commit/6abbcc5033c86c1503d2e8018687476c16ebf6f2"}]}],"author":{"name":"David Hill","email":"dhill@redhat.com","date":"2023-01-20 16:42:58.000000000","tz":-300},"committer":{"name":"David Hill","email":"dhill@redhat.com","date":"2023-01-20 17:08:18.000000000","tz":-300},"subject":"Change maximum value of pcie-ports to 64","message":"Change maximum value of pcie-ports to 64\n\nThe current value of 28 is due to the fact that pcie-ports in AARCH64\nhas a hardware limitation of that said vaue but some NFV operators\nas well as other users might need more than 28 when the hardware\n(such as x86_64 and AMD) allows more than that limit.   Here, we set\nthe maximum value to 64 for all of the architectures and still use\na hard maximum limit of 28 for AARCH64.\n\nChange-Id: I71682d1d8d2f1574e7f9fe04cac1e03d7c77f0f2\n","web_links":[{"name":"gitea","tooltip":"Open in GitWeb","url":"https://opendev.org/openstack/nova/commit/ef7ffe066a10f57603478e886c5fec354cb471a3"}],"resolve_conflicts_web_links":[{"name":"gitea","tooltip":"Open in GitWeb","url":"https://opendev.org/openstack/nova/commit/ef7ffe066a10f57603478e886c5fec354cb471a3"}]},"branch":"refs/heads/master"},"95769bf883fecaa52e43e9c94c451fd7af78806f":{"kind":"REWORK","_number":3,"created":"2023-01-20 17:35:01.000000000","uploader":{"_account_id":7130,"name":"David Hill","email":"davidchill@hotmail.com","username":"dhill"},"ref":"refs/changes/05/871305/3","fetch":{"anonymous http":{"url":"https://review.opendev.org/openstack/nova","ref":"refs/changes/05/871305/3","commands":{"Checkout":"git fetch https://review.opendev.org/openstack/nova refs/changes/05/871305/3 \u0026\u0026 git checkout FETCH_HEAD","Cherry Pick":"git fetch https://review.opendev.org/openstack/nova refs/changes/05/871305/3 \u0026\u0026 git cherry-pick FETCH_HEAD","Format Patch":"git fetch https://review.opendev.org/openstack/nova refs/changes/05/871305/3 \u0026\u0026 git format-patch -1 --stdout FETCH_HEAD","Pull":"git pull https://review.opendev.org/openstack/nova refs/changes/05/871305/3"}}},"commit":{"parents":[{"commit":"6abbcc5033c86c1503d2e8018687476c16ebf6f2","subject":"Merge \"Split ignored_tags in stats.py\"","web_links":[{"name":"gitea","tooltip":"Open in GitWeb","url":"https://opendev.org/openstack/nova/commit/6abbcc5033c86c1503d2e8018687476c16ebf6f2"}]}],"author":{"name":"David Hill","email":"dhill@redhat.com","date":"2023-01-20 16:42:58.000000000","tz":-300},"committer":{"name":"David Hill","email":"dhill@redhat.com","date":"2023-01-20 17:34:41.000000000","tz":-300},"subject":"Change maximum value of pcie-ports to 32","message":"Change maximum value of pcie-ports to 32\n\nThe current value of 28 is due to the fact that pcie-ports in AARCH64\nhas a hardware limitation of that said vaue but some NFV operators\nas well as other users might need more than 28 when the hardware\n(such as x86_64 and AMD) allows more than that limit.   Here, we set\nthe maximum value to 32 for all of the architectures and still use\na hard maximum limit of 28 for AARCH64.\n\nChange-Id: I71682d1d8d2f1574e7f9fe04cac1e03d7c77f0f2\n","web_links":[{"name":"gitea","tooltip":"Open in GitWeb","url":"https://opendev.org/openstack/nova/commit/95769bf883fecaa52e43e9c94c451fd7af78806f"}],"resolve_conflicts_web_links":[{"name":"gitea","tooltip":"Open in GitWeb","url":"https://opendev.org/openstack/nova/commit/95769bf883fecaa52e43e9c94c451fd7af78806f"}]},"branch":"refs/heads/master"},"eb44051170819522cb79c1216bc17f2b36e2ef50":{"kind":"REWORK","_number":4,"created":"2023-02-18 00:20:37.000000000","uploader":{"_account_id":7130,"name":"David Hill","email":"davidchill@hotmail.com","username":"dhill"},"ref":"refs/changes/05/871305/4","fetch":{"anonymous http":{"url":"https://review.opendev.org/openstack/nova","ref":"refs/changes/05/871305/4","commands":{"Checkout":"git fetch https://review.opendev.org/openstack/nova refs/changes/05/871305/4 \u0026\u0026 git checkout FETCH_HEAD","Cherry Pick":"git fetch https://review.opendev.org/openstack/nova refs/changes/05/871305/4 \u0026\u0026 git cherry-pick FETCH_HEAD","Format Patch":"git fetch https://review.opendev.org/openstack/nova refs/changes/05/871305/4 \u0026\u0026 git format-patch -1 --stdout FETCH_HEAD","Pull":"git pull https://review.opendev.org/openstack/nova refs/changes/05/871305/4"}}},"commit":{"parents":[{"commit":"6abbcc5033c86c1503d2e8018687476c16ebf6f2","subject":"Merge \"Split ignored_tags in stats.py\"","web_links":[{"name":"gitea","tooltip":"Open in GitWeb","url":"https://opendev.org/openstack/nova/commit/6abbcc5033c86c1503d2e8018687476c16ebf6f2"}]}],"author":{"name":"David Hill","email":"dhill@redhat.com","date":"2023-01-20 16:42:58.000000000","tz":-300},"committer":{"name":"David Hill","email":"dhill@redhat.com","date":"2023-02-18 00:20:30.000000000","tz":-300},"subject":"Change maximum value of pcie-ports to 32","message":"Change maximum value of pcie-ports to 32\n\nThe current value of 28 is due to the fact that pcie-ports in AARCH64\nhas a hardware limitation of that said vaue but some NFV operators\nas well as other users might need more than 28 when the hardware\n(such as x86_64 and AMD) allows more than that limit.   Here, we set\nthe maximum value to 32 for all of the architectures and still use\na hard maximum limit of 28 for AARCH64.\n\nChange-Id: I71682d1d8d2f1574e7f9fe04cac1e03d7c77f0f2\n","web_links":[{"name":"gitea","tooltip":"Open in GitWeb","url":"https://opendev.org/openstack/nova/commit/eb44051170819522cb79c1216bc17f2b36e2ef50"}],"resolve_conflicts_web_links":[{"name":"gitea","tooltip":"Open in GitWeb","url":"https://opendev.org/openstack/nova/commit/eb44051170819522cb79c1216bc17f2b36e2ef50"}]},"branch":"refs/heads/master"},"3415868bef57bfe3be07334b154add115fa8c343":{"kind":"REWORK","_number":5,"created":"2023-02-18 00:43:19.000000000","uploader":{"_account_id":7130,"name":"David Hill","email":"davidchill@hotmail.com","username":"dhill"},"ref":"refs/changes/05/871305/5","fetch":{"anonymous http":{"url":"https://review.opendev.org/openstack/nova","ref":"refs/changes/05/871305/5","commands":{"Checkout":"git fetch https://review.opendev.org/openstack/nova refs/changes/05/871305/5 \u0026\u0026 git checkout FETCH_HEAD","Cherry Pick":"git fetch https://review.opendev.org/openstack/nova refs/changes/05/871305/5 \u0026\u0026 git cherry-pick FETCH_HEAD","Format Patch":"git fetch https://review.opendev.org/openstack/nova refs/changes/05/871305/5 \u0026\u0026 git format-patch -1 --stdout FETCH_HEAD","Pull":"git pull https://review.opendev.org/openstack/nova refs/changes/05/871305/5"}}},"commit":{"parents":[{"commit":"6abbcc5033c86c1503d2e8018687476c16ebf6f2","subject":"Merge \"Split ignored_tags in stats.py\"","web_links":[{"name":"gitea","tooltip":"Open in GitWeb","url":"https://opendev.org/openstack/nova/commit/6abbcc5033c86c1503d2e8018687476c16ebf6f2"}]}],"author":{"name":"David Hill","email":"dhill@redhat.com","date":"2023-01-20 16:42:58.000000000","tz":-300},"committer":{"name":"David Hill","email":"dhill@redhat.com","date":"2023-02-18 00:43:13.000000000","tz":-300},"subject":"Change maximum value of pcie-ports to 32","message":"Change maximum value of pcie-ports to 32\n\nThe current value of 28 is due to the fact that pcie-ports in AARCH64\nhas a hardware limitation of that said vaue but some NFV operators\nas well as other users might need more than 28 when the hardware\n(such as x86_64 and AMD) allows more than that limit.   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