)]}'
{"/COMMIT_MSG":[{"author":{"_account_id":10497,"name":"KATO Tomoyuki","email":"kato.tomoyuki@jp.fujitsu.com","username":"to222"},"change_message_id":"12b0b599682875e46fb92c0d7c07001da55084fd","unresolved":false,"context_lines":[{"line_number":6,"context_line":""},{"line_number":7,"context_line":"Update pci passthrough for netwon"},{"line_number":8,"context_line":""},{"line_number":9,"context_line":"This patch reorder the secation that controller"},{"line_number":10,"context_line":"change will be first."},{"line_number":11,"context_line":"It also update recent confiugration change to allow"},{"line_number":12,"context_line":"resize pci to work on the compute nodes"}],"source_content_type":"text/x-gerrit-commit-message","patch_set":2,"id":"dada55a8_71ec352a","line":9,"range":{"start_line":9,"start_character":23,"end_line":9,"end_character":31},"updated":"2016-07-21 14:14:43.000000000","message":"section","commit_id":"c2f1dd975de0b4e523452aa07008e77a4cb1fd27"},{"author":{"_account_id":17973,"name":"Ludovic Beliveau","email":"lbeliveau@gmail.com","username":"lbeliveau"},"change_message_id":"736bcdeaebf0d020842782c218662f969b745b65","unresolved":false,"context_lines":[{"line_number":4,"context_line":"Commit:     Moshe Levi \u003cmoshele@mellanox.com\u003e"},{"line_number":5,"context_line":"CommitDate: 2016-07-21 14:30:15 +0000"},{"line_number":6,"context_line":""},{"line_number":7,"context_line":"Update pci passthrough for netwon"},{"line_number":8,"context_line":""},{"line_number":9,"context_line":"This patch reorder the section that controller"},{"line_number":10,"context_line":"change will be first."}],"source_content_type":"text/x-gerrit-commit-message","patch_set":3,"id":"dada55a8_70b94acb","line":7,"updated":"2016-07-25 14:37:27.000000000","message":"s/netwon/newton/","commit_id":"4173205c8646170e7a70c5871dd77ac636e6e517"},{"author":{"_account_id":12171,"name":"Moshe Levi","email":"moshele@nvidia.com","username":"moshele"},"change_message_id":"a85e07c07cffedf6282d32e2fe7c2dd9a4a17992","unresolved":false,"context_lines":[{"line_number":4,"context_line":"Commit:     Moshe Levi \u003cmoshele@mellanox.com\u003e"},{"line_number":5,"context_line":"CommitDate: 2016-07-21 14:30:15 +0000"},{"line_number":6,"context_line":""},{"line_number":7,"context_line":"Update pci passthrough for netwon"},{"line_number":8,"context_line":""},{"line_number":9,"context_line":"This patch reorder the section that controller"},{"line_number":10,"context_line":"change will be first."}],"source_content_type":"text/x-gerrit-commit-message","patch_set":3,"id":"dada55a8_534c1070","line":7,"in_reply_to":"dada55a8_70b94acb","updated":"2016-07-25 14:43:37.000000000","message":"Done","commit_id":"4173205c8646170e7a70c5871dd77ac636e6e517"},{"author":{"_account_id":17973,"name":"Ludovic Beliveau","email":"lbeliveau@gmail.com","username":"lbeliveau"},"change_message_id":"736bcdeaebf0d020842782c218662f969b745b65","unresolved":false,"context_lines":[{"line_number":6,"context_line":""},{"line_number":7,"context_line":"Update pci passthrough for netwon"},{"line_number":8,"context_line":""},{"line_number":9,"context_line":"This patch reorder the section that controller"},{"line_number":10,"context_line":"change will be first."},{"line_number":11,"context_line":"It also update recent confiugration change to allow"},{"line_number":12,"context_line":"resize pci to work on the compute nodes"}],"source_content_type":"text/x-gerrit-commit-message","patch_set":3,"id":"dada55a8_7015ca99","line":9,"updated":"2016-07-25 14:37:27.000000000","message":"s/that/so that/","commit_id":"4173205c8646170e7a70c5871dd77ac636e6e517"},{"author":{"_account_id":12171,"name":"Moshe Levi","email":"moshele@nvidia.com","username":"moshele"},"change_message_id":"a85e07c07cffedf6282d32e2fe7c2dd9a4a17992","unresolved":false,"context_lines":[{"line_number":6,"context_line":""},{"line_number":7,"context_line":"Update pci passthrough for netwon"},{"line_number":8,"context_line":""},{"line_number":9,"context_line":"This patch reorder the section that controller"},{"line_number":10,"context_line":"change will be first."},{"line_number":11,"context_line":"It also update recent confiugration change to allow"},{"line_number":12,"context_line":"resize pci to work on the compute nodes"}],"source_content_type":"text/x-gerrit-commit-message","patch_set":3,"id":"dada55a8_f3bf04fa","line":9,"in_reply_to":"dada55a8_7015ca99","updated":"2016-07-25 14:43:37.000000000","message":"Done","commit_id":"4173205c8646170e7a70c5871dd77ac636e6e517"},{"author":{"_account_id":17973,"name":"Ludovic Beliveau","email":"lbeliveau@gmail.com","username":"lbeliveau"},"change_message_id":"736bcdeaebf0d020842782c218662f969b745b65","unresolved":false,"context_lines":[{"line_number":8,"context_line":""},{"line_number":9,"context_line":"This patch reorder the section that controller"},{"line_number":10,"context_line":"change will be first."},{"line_number":11,"context_line":"It also update recent confiugration change to allow"},{"line_number":12,"context_line":"resize pci to work on the compute nodes"},{"line_number":13,"context_line":""},{"line_number":14,"context_line":"Change-Id: I9f5251386aece3a41c827ace84ef38350ac24b4c"}],"source_content_type":"text/x-gerrit-commit-message","patch_set":3,"id":"dada55a8_d0359646","line":11,"range":{"start_line":11,"start_character":22,"end_line":11,"end_character":23},"updated":"2016-07-25 14:37:27.000000000","message":"s/confiugration/configuration/","commit_id":"4173205c8646170e7a70c5871dd77ac636e6e517"},{"author":{"_account_id":12171,"name":"Moshe Levi","email":"moshele@nvidia.com","username":"moshele"},"change_message_id":"a85e07c07cffedf6282d32e2fe7c2dd9a4a17992","unresolved":false,"context_lines":[{"line_number":8,"context_line":""},{"line_number":9,"context_line":"This patch reorder the section that controller"},{"line_number":10,"context_line":"change will be first."},{"line_number":11,"context_line":"It also update recent confiugration change to allow"},{"line_number":12,"context_line":"resize pci to work on the compute nodes"},{"line_number":13,"context_line":""},{"line_number":14,"context_line":"Change-Id: I9f5251386aece3a41c827ace84ef38350ac24b4c"}],"source_content_type":"text/x-gerrit-commit-message","patch_set":3,"id":"dada55a8_9337a8af","line":11,"range":{"start_line":11,"start_character":22,"end_line":11,"end_character":23},"in_reply_to":"dada55a8_d0359646","updated":"2016-07-25 14:43:37.000000000","message":"Done","commit_id":"4173205c8646170e7a70c5871dd77ac636e6e517"}],"doc/admin-guide/source/compute-pci-passthrough.rst":[{"author":{"_account_id":612,"name":"Tom Fifield","email":"tom@openstack.org","username":"fifieldt"},"change_message_id":"5e3e010272209492360621666b8143171eac1f10","unresolved":false,"context_lines":[{"line_number":109,"context_line":""},{"line_number":110,"context_line":"#. Specify the PCI alias for the device (form newton)"},{"line_number":111,"context_line":""},{"line_number":112,"context_line":"   To be able to resize guest with PCI device the PCI alias should be configured"},{"line_number":113,"context_line":"   on the compute node as well."},{"line_number":114,"context_line":"   Configure a PCI alias ``a1`` to request a PCI device with a ``vendor_id`` of"},{"line_number":115,"context_line":"   ``0x8086`` and a ``product_id`` of ``0x154d``. The ``vendor_id`` and"}],"source_content_type":"text/x-rst","patch_set":1,"id":"dada55a8_c71f3a59","line":112,"updated":"2016-07-21 07:07:54.000000000","message":"According to the niceness check, this line is too long :|\n\n doc/admin-guide/source/compute-pci-passthrough.rst:112: D001 Line too long","commit_id":"80c7ebe83220dbac4561cb91f16790d6d8b6abd8"},{"author":{"_account_id":12171,"name":"Moshe Levi","email":"moshele@nvidia.com","username":"moshele"},"change_message_id":"1829b30819afbf87b520b188de72839df3733ff2","unresolved":false,"context_lines":[{"line_number":109,"context_line":""},{"line_number":110,"context_line":"#. Specify the PCI alias for the device (form newton)"},{"line_number":111,"context_line":""},{"line_number":112,"context_line":"   To be able to resize guest with PCI device the PCI alias should be configured"},{"line_number":113,"context_line":"   on the compute node as well."},{"line_number":114,"context_line":"   Configure a PCI alias ``a1`` to request a PCI device with a ``vendor_id`` of"},{"line_number":115,"context_line":"   ``0x8086`` and a ``product_id`` of ``0x154d``. The ``vendor_id`` and"}],"source_content_type":"text/x-rst","patch_set":1,"id":"dada55a8_a7a16648","line":112,"in_reply_to":"dada55a8_c71f3a59","updated":"2016-07-21 07:27:03.000000000","message":"Done","commit_id":"80c7ebe83220dbac4561cb91f16790d6d8b6abd8"}]}