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vector neural network instructions"},{"line_number":44,"context_line":"    \u0027AVX512VBMI\u0027, # vector byte manipulation instructions"},{"line_number":45,"context_line":"    \u0027AVX512IFMA\u0027, # integer fused multiply add"},{"line_number":46,"context_line":"    \u0027AVX512VBMI2\u0027, # vector byte manipulation instructions 2"},{"line_number":47,"context_line":"    \u0027AVX512BITALG\u0027, # bit algorithms"},{"line_number":48,"context_line":"    \u0027AVX512VAES\u0027, # vector aes instructions"},{"line_number":49,"context_line":"    \u0027AVX512GFNI\u0027, # galois field new instructions"}],"source_content_type":"text/x-python","patch_set":1,"id":"ff570b3c_2adb247c","line":46,"updated":"2020-05-15 21:09:39.000000000","message":"pep8: E261 at least two spaces before inline comment","commit_id":"52f4d3d5daf7d1264219d558c9980598cb93eeec"},{"author":{"_account_id":22348,"name":"Zuul","username":"zuul","tags":["SERVICE_USER"]},"tag":"autogenerated:zuul:check","change_message_id":"595b9d8a2e15af3797216ad3bd4e6e9698d1d855","unresolved":false,"context_lines":[{"line_number":44,"context_line":"    \u0027AVX512VBMI\u0027, # vector byte manipulation instructions"},{"line_number":45,"context_line":"    \u0027AVX512IFMA\u0027, # integer fused multiply add"},{"line_number":46,"context_line":"    \u0027AVX512VBMI2\u0027, # vector byte manipulation instructions 2"},{"line_number":47,"context_line":"    \u0027AVX512BITALG\u0027, # bit algorithms"},{"line_number":48,"context_line":"    \u0027AVX512VAES\u0027, # vector aes instructions"},{"line_number":49,"context_line":"    \u0027AVX512GFNI\u0027, # galois field new instructions"},{"line_number":50,"context_line":"    \u0027AVX512VPCLMULQDQ\u0027, # carry-less multiplication of quadwords"}],"source_content_type":"text/x-python","patch_set":1,"id":"ff570b3c_8ae4f03d","line":47,"updated":"2020-05-15 21:09:39.000000000","message":"pep8: E261 at least two spaces before inline comment","commit_id":"52f4d3d5daf7d1264219d558c9980598cb93eeec"},{"author":{"_account_id":22348,"name":"Zuul","username":"zuul","tags":["SERVICE_USER"]},"tag":"autogenerated:zuul:check","change_message_id":"595b9d8a2e15af3797216ad3bd4e6e9698d1d855","unresolved":false,"context_lines":[{"line_number":45,"context_line":"    \u0027AVX512IFMA\u0027, # integer fused multiply add"},{"line_number":46,"context_line":"    \u0027AVX512VBMI2\u0027, # vector byte manipulation instructions 2"},{"line_number":47,"context_line":"    \u0027AVX512BITALG\u0027, # bit algorithms"},{"line_number":48,"context_line":"    \u0027AVX512VAES\u0027, # vector aes instructions"},{"line_number":49,"context_line":"    \u0027AVX512GFNI\u0027, # galois field new instructions"},{"line_number":50,"context_line":"    \u0027AVX512VPCLMULQDQ\u0027, # carry-less multiplication of quadwords"},{"line_number":51,"context_line":"    \u0027AVX512VPOPCNTDQ\u0027, # vector population count instruction"}],"source_content_type":"text/x-python","patch_set":1,"id":"ff570b3c_6ae19c2a","line":48,"updated":"2020-05-15 21:09:39.000000000","message":"pep8: E261 at least two spaces before inline comment","commit_id":"52f4d3d5daf7d1264219d558c9980598cb93eeec"},{"author":{"_account_id":22348,"name":"Zuul","username":"zuul","tags":["SERVICE_USER"]},"tag":"autogenerated:zuul:check","change_message_id":"595b9d8a2e15af3797216ad3bd4e6e9698d1d855","unresolved":false,"context_lines":[{"line_number":46,"context_line":"    \u0027AVX512VBMI2\u0027, # vector byte manipulation instructions 2"},{"line_number":47,"context_line":"    \u0027AVX512BITALG\u0027, # bit algorithms"},{"line_number":48,"context_line":"    \u0027AVX512VAES\u0027, # vector aes instructions"},{"line_number":49,"context_line":"    \u0027AVX512GFNI\u0027, # galois field new instructions"},{"line_number":50,"context_line":"    \u0027AVX512VPCLMULQDQ\u0027, # carry-less multiplication of quadwords"},{"line_number":51,"context_line":"    \u0027AVX512VPOPCNTDQ\u0027, # vector population count instruction"},{"line_number":52,"context_line":"    # ref: https://en.wikipedia.org/wiki/Bit_Manipulation_Instruction_Sets"}],"source_content_type":"text/x-python","patch_set":1,"id":"ff570b3c_cad3885f","line":49,"updated":"2020-05-15 21:09:39.000000000","message":"pep8: E261 at least two spaces before inline comment","commit_id":"52f4d3d5daf7d1264219d558c9980598cb93eeec"},{"author":{"_account_id":22348,"name":"Zuul","username":"zuul","tags":["SERVICE_USER"]},"tag":"autogenerated:zuul:check","change_message_id":"595b9d8a2e15af3797216ad3bd4e6e9698d1d855","unresolved":false,"context_lines":[{"line_number":47,"context_line":"    \u0027AVX512BITALG\u0027, # bit algorithms"},{"line_number":48,"context_line":"    \u0027AVX512VAES\u0027, # vector aes instructions"},{"line_number":49,"context_line":"    \u0027AVX512GFNI\u0027, # galois field new instructions"},{"line_number":50,"context_line":"    \u0027AVX512VPCLMULQDQ\u0027, # carry-less multiplication of quadwords"},{"line_number":51,"context_line":"    \u0027AVX512VPOPCNTDQ\u0027, # vector population count instruction"},{"line_number":52,"context_line":"    # ref: https://en.wikipedia.org/wiki/Bit_Manipulation_Instruction_Sets"},{"line_number":53,"context_line":"    \u0027ABM\u0027,"}],"source_content_type":"text/x-python","patch_set":1,"id":"ff570b3c_aad8d47a","line":50,"updated":"2020-05-15 21:09:39.000000000","message":"pep8: E261 at least two spaces before inline comment","commit_id":"52f4d3d5daf7d1264219d558c9980598cb93eeec"},{"author":{"_account_id":22348,"name":"Zuul","username":"zuul","tags":["SERVICE_USER"]},"tag":"autogenerated:zuul:check","change_message_id":"595b9d8a2e15af3797216ad3bd4e6e9698d1d855","unresolved":false,"context_lines":[{"line_number":48,"context_line":"    \u0027AVX512VAES\u0027, # vector aes instructions"},{"line_number":49,"context_line":"    \u0027AVX512GFNI\u0027, # galois field new instructions"},{"line_number":50,"context_line":"    \u0027AVX512VPCLMULQDQ\u0027, # carry-less multiplication of quadwords"},{"line_number":51,"context_line":"    \u0027AVX512VPOPCNTDQ\u0027, # vector population count instruction"},{"line_number":52,"context_line":"    # ref: https://en.wikipedia.org/wiki/Bit_Manipulation_Instruction_Sets"},{"line_number":53,"context_line":"    \u0027ABM\u0027,"},{"line_number":54,"context_line":"    \u0027BMI\u0027,"}],"source_content_type":"text/x-python","patch_set":1,"id":"ff570b3c_0acaa09f","line":51,"updated":"2020-05-15 21:09:39.000000000","message":"pep8: E261 at least two spaces before inline comment","commit_id":"52f4d3d5daf7d1264219d558c9980598cb93eeec"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"9ad1359411e221110d7eae49712c42751863f4f7","unresolved":false,"context_lines":[{"line_number":41,"context_line":"    \u0027AVX512BW\u0027,  # byte + word"},{"line_number":42,"context_line":"    \u0027AVX512DQ\u0027,  # double word + quad word"},{"line_number":43,"context_line":"    \u0027AVX512VNNI\u0027,  # vector neural network instructions"},{"line_number":44,"context_line":"    \u0027AVX512VBMI\u0027,  # vector byte manipulation instructions"},{"line_number":45,"context_line":"    \u0027AVX512IFMA\u0027,  # integer fused multiply add"},{"line_number":46,"context_line":"    \u0027AVX512VBMI2\u0027,  # vector byte manipulation instructions 2"},{"line_number":47,"context_line":"    \u0027AVX512BITALG\u0027,  # bit algorithms"},{"line_number":48,"context_line":"    \u0027AVX512VAES\u0027,  # vector aes instructions"},{"line_number":49,"context_line":"    \u0027AVX512GFNI\u0027,  # galois field new instructions"},{"line_number":50,"context_line":"    \u0027AVX512VPCLMULQDQ\u0027,  # carry-less multiplication of quadwords"},{"line_number":51,"context_line":"    \u0027AVX512VPOPCNTDQ\u0027,  # vector population count instruction"},{"line_number":52,"context_line":"    # ref: https://en.wikipedia.org/wiki/Bit_Manipulation_Instruction_Sets"},{"line_number":53,"context_line":"    \u0027ABM\u0027,"},{"line_number":54,"context_line":"    \u0027BMI\u0027,"}],"source_content_type":"text/x-python","patch_set":2,"id":"ff570b3c_e24c4c43","line":51,"range":{"start_line":44,"start_character":5,"end_line":51,"end_character":61},"updated":"2020-05-21 10:01:25.000000000","message":"are theses all reported as distinct cpu feature flags and will they change based on cpu model.\n\nif so then each makes sense to have its own trait.\nif not then we should just have proxy tratis that corever all of them.\n\nin this specific case using an AVX512_TGL for Tiger Lake might make more sense then adding them all indivigually.\n\nhttps://en.wikipedia.org/wiki/AVX-512#BW,_DQ_and_VBMI#CPUs_with_AVX-512\n\nthe original intent withthe insuction set traits was to list familaies of instuction set likk SSE3 and SSE4 instead of indigugal feature flags.\n\nthat said im not against doing this if each will be repored as indigiual feature flags in /proc/cpuinfo","commit_id":"066a2a972d2d5636c528630b16549e85ae0207c2"},{"author":{"_account_id":12597,"name":"Lin Yang","email":"lin.a.yang@intel.com","username":"lin.yang"},"change_message_id":"96dfd84b20c9dc1bf3333454e737377618176ba4","unresolved":false,"context_lines":[{"line_number":41,"context_line":"    \u0027AVX512BW\u0027,  # byte + word"},{"line_number":42,"context_line":"    \u0027AVX512DQ\u0027,  # double word + quad word"},{"line_number":43,"context_line":"    \u0027AVX512VNNI\u0027,  # vector neural network instructions"},{"line_number":44,"context_line":"    \u0027AVX512VBMI\u0027,  # vector byte manipulation instructions"},{"line_number":45,"context_line":"    \u0027AVX512IFMA\u0027,  # integer fused multiply add"},{"line_number":46,"context_line":"    \u0027AVX512VBMI2\u0027,  # vector byte manipulation instructions 2"},{"line_number":47,"context_line":"    \u0027AVX512BITALG\u0027,  # bit algorithms"},{"line_number":48,"context_line":"    \u0027AVX512VAES\u0027,  # vector aes instructions"},{"line_number":49,"context_line":"    \u0027AVX512GFNI\u0027,  # galois field new instructions"},{"line_number":50,"context_line":"    \u0027AVX512VPCLMULQDQ\u0027,  # carry-less multiplication of quadwords"},{"line_number":51,"context_line":"    \u0027AVX512VPOPCNTDQ\u0027,  # vector population count instruction"},{"line_number":52,"context_line":"    # ref: https://en.wikipedia.org/wiki/Bit_Manipulation_Instruction_Sets"},{"line_number":53,"context_line":"    \u0027ABM\u0027,"},{"line_number":54,"context_line":"    \u0027BMI\u0027,"}],"source_content_type":"text/x-python","patch_set":2,"id":"ff570b3c_e8c5ff3e","line":51,"range":{"start_line":44,"start_character":5,"end_line":51,"end_character":61},"in_reply_to":"ff570b3c_e24c4c43","updated":"2020-05-26 22:37:30.000000000","message":"Thanks for reviewing this, @Sean.\n\nhttps://github.com/libvirt/libvirt/blob/master/src/cpu_map/x86_features.xml#L289-L309\nFrom the above link, we can see cpuid and libvirt will report all of them as individual cpu feature.\n\nThose 8 cpu feature are new in IceLake, and \"avx512vbmi\" and \"avx512ifma\" are also included in CannonLake. We cannot predict those features or just part of them will or will not be included in the successor model. It might be better to continue to report them as individual traits. If needed, we can create the Proxy trait as you mentioned and automatically convert it to proper cpu feature traits.","commit_id":"066a2a972d2d5636c528630b16549e85ae0207c2"},{"author":{"_account_id":11604,"name":"sean mooney","email":"smooney@redhat.com","username":"sean-k-mooney"},"change_message_id":"f13c2cd2c0bf42749e18e7f35e189f1c8a6aa572","unresolved":false,"context_lines":[{"line_number":41,"context_line":"    \u0027AVX512BW\u0027,  # byte + word"},{"line_number":42,"context_line":"    \u0027AVX512DQ\u0027,  # double word + quad word"},{"line_number":43,"context_line":"    \u0027AVX512VNNI\u0027,  # vector neural network instructions"},{"line_number":44,"context_line":"    \u0027AVX512VBMI\u0027,  # vector byte manipulation instructions"},{"line_number":45,"context_line":"    \u0027AVX512IFMA\u0027,  # integer fused multiply add"},{"line_number":46,"context_line":"    \u0027AVX512VBMI2\u0027,  # vector byte manipulation instructions 2"},{"line_number":47,"context_line":"    \u0027AVX512BITALG\u0027,  # bit algorithms"},{"line_number":48,"context_line":"    \u0027AVX512VAES\u0027,  # vector aes instructions"},{"line_number":49,"context_line":"    \u0027AVX512GFNI\u0027,  # galois field new instructions"},{"line_number":50,"context_line":"    \u0027AVX512VPCLMULQDQ\u0027,  # carry-less multiplication of quadwords"},{"line_number":51,"context_line":"    \u0027AVX512VPOPCNTDQ\u0027,  # vector population count instruction"},{"line_number":52,"context_line":"    # ref: https://en.wikipedia.org/wiki/Bit_Manipulation_Instruction_Sets"},{"line_number":53,"context_line":"    \u0027ABM\u0027,"},{"line_number":54,"context_line":"    \u0027BMI\u0027,"}],"source_content_type":"text/x-python","patch_set":2,"id":"ff570b3c_8b4b9d85","line":51,"range":{"start_line":44,"start_character":5,"end_line":51,"end_character":61},"in_reply_to":"ff570b3c_e8c5ff3e","updated":"2020-05-27 00:42:02.000000000","message":"ok if they are reported as seperate feature flags form libvirt then im fine with them being seperate traits.\nwhat i wanted to avoid was 1 flag being reported by libvirt then being translated into multiple tratis.\n\nif its 1:1 its fine","commit_id":"066a2a972d2d5636c528630b16549e85ae0207c2"}]}